(1) Keep the `.init_array` and `.ctors` symbols and sort them according to their initialization priority.
(2) Exclude symbols ending with crtend.* and crtbegin.* to support c++
application.if we not exclude crtend.* crtbegin.* frame_dummy will be
added when enable any c++ application with global variables, this symbol
execution is problematic, removing it does not affect the application.
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
Add partition parsing logic to emmcsd and support for configuring either CDCACM alone or
both CDCACM and USBMCS for composite mode.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
The original names are confusing; the symbols' addresses point to the start and end of the
sbi executable ram area. This may also reside in l2lim and not in ddr, depending on the
configuration, and this is defined in the linker script.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Version 1.3.1 is the latest tagged version as of November
the 21st, 2023. This patch prepares the required changes
to make v1.3.1 work.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Fix:
```
riscv-none-elf-ld: sotest.o: ABI is incompatible with that of the selected emulation:
target emulation `elf64-littleriscv' does not match `elf32-littleriscv'
riscv-none-elf-ld: failed to merge target specific data of file sotest.o
```
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
The class device only handles descriptor information specific to the class,
and shared descriptor information is passed through parameters and
handled by the composite driver.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
SiFive document: "ECC Error Handling Guide" states:
"Any SRAM block or cache memory containing ECC functionality needs to be
initialized prior to use. ECC will correct defective bits based on memory
contents, so if memory is not first initialized to a known state, then ECC
will not operate as expected. It is recommended to use a DMA, if available,
to write the entire SRAM or cache to zeros prior to enabling ECC reporting.
If no DMA is present, use store instructions issued from the processor."
Clean the cache at this early stage so no ECC errors will be flooding later.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
When I try to set priorities in certain programs, such as init_priority(HIGH_PRIORITY), I've noticed that during linking, there's no guarantee that the programs will be compiled in the sequence I've specified based on priority. This has led to some runtime errors in my program.
I realized that in the ld file, when initializing dynamic arrays, there's no assurance of initializing init_array.* before init_array. This has resulted in runtime errors in the program. Consequently, I've rearranged the init_array.* in the ld file of NuttX to be placed before init_array and added a SORT operation to init_array.* to ensure accurate initialization based on priorities during linking.
Decreasing the value may increase DQ/DQS window size. Keep the default value
(1) for the existing board configurations.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
This also removes kconfig warning:
Normalize icicle/knsh
.config:248:warning: symbol value '' invalid for ARCH_KMAP_VBASE
.config:248:warning: symbol value '' invalid for ARCH_KMAP_VBASE
Adds a driver for an FPGA fabric / CoreSPI implementation.
Supports multiple instances, assuming they reside in some base address,
offsettable by a constant value.
This incorporates an fpga i2c driver into the existing i2c driver.
This fpga i2c works almost 100% as the MSS i2c, but the difference
is that the fpga driver terminates all transactions with a stop
sent -interrupt. That needs to be handled.
Fpga clock source is also different, act accordingly.
SEC2TICK(10) is an overkill to any app, use just one second instead.
modifyreg32s are simplified as well, no need to clear and set
as set is enough.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Summary:
- This commit fixes the CI build errors regressed by
https://github.com/apache/incubator-nuttx/pull/7351
Impact:
- None
Testing:
- Build only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Currently the IHC (Inter Hart Communication) depends on OpenAMP and
rptun. However, the bootloader portion of the IHC doesn't need
either of them. Now they are wasting a lot of bootloader space.
Reorganize the bootloader portion into a separate file 'mpfs_ihc_sbi.c'.
This file contains the OpenSBI vendor extensions, or the only required
functionalities for the bootloader. On the other hand, 'mpfs_ihc.c'
contains the non-bootloader code.
This patch also makes it possible to utilize 2 RPMSG channels. This
has been tested so that 2 separate NuttXs on harts 1 and 2 communicate
with Linux kernel that runs on harts 3 and 4.
New configuration files are added as well:
- rpmsg-ch1: sample config for RPMSG
- rpmsg-ch2: sample config for another RPMSG channel
- rpmsg-sbi: sample bootloader config for RPMSG/OpenSBI
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Summary:
- I noticed that the OpenSBI library depends on the BSD license
- This commit fixes this issue
Impact:
- None
Testing:
- Build only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Simplify the clock mode from the board.h -files. Also make the
SD clock definable as well.
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Some related products, such as Aries m100pfs, don't support eMMC
speeds up to 200MHz. Thus, provide option to select slower clock.
This has only to do with the clocking, no CMD6 is sent to select
high speed modes.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
The underlying hardware supports 9 endpoints:
- EP0
- 4x IN EPs
- 4x OUT EPs
Currently the driver assumes every EP number is unique. This limits
the amount of EPs to 1 + 4 = 5. Utilize the EPs in such a manner
that all may be used.
Also fix a few error handling related bugs. Update the composite
driver to match the current situation as well.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
