Commit Graph

858 Commits

Author SHA1 Message Date
Xiang Xiao
8b4ecac6c2 libc: Move math library from libs/libc/math to libs/libm/libm
to prepare the support of other implementation e.g.:
https://github.com/JuliaMath/openlibm
https://gitlab.com/gtd-gmbh/libmcs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-02-23 10:40:07 +02:00
Nathan Hartman
b881948b27 arch/pic32mz: Fix compiler warnings in pic32mz_ethernet.c
* arch/mips/src/pic32mz/pic32mz_ethernet.c
  (): Fix warnings related to printf-style format specifiers.
2023-02-17 09:58:02 +08:00
Nathan Hartman
1d5c8380b1 arch/pic32mz: Serial TIOCxBRK BSD-compatible BREAK support
In the lower half UART driver for PIC32MZ architecture, adding the
TIOCxBRK ioctl calls, which allow an application to transmit a UART
line BREAK signal.

This architecture does not support BSD-style BREAK in hardware so our
implementation follows the precedent set in STM32, GD32, and Kinetis
architectures: By default, if only PIC32MZ_UART_BREAKS is configured,
we produce the hardware-native BREAK, which lasts for 12 bit lengths;
if, in addition, PIC32MZ_SERIALBRK_BSDCOMPAT is configured, we
generate a BSD-style BREAK by putting the TX pin in GPIO mode and
driving it low "manually" until told to stop.

* arch/mips/src/pic32mz/Kconfig
  (config PIC32MZ_UART_BREAKS): New. Appears as
   CONFIG_PIC32MZ_UART_BREAKS in code.
  (config PIC32MZ_SERIALBRK_BSDCOMPAT): New. Appears as
   CONFIG_PIC32MZ_SERIALBRK_BSDCOMPAT in code.

* arch/mips/src/pic32mz/hardware/pic32mz_pps.h
  (__PPS_OUTPUT_REGADDR_TO_GPIO, PPS_OUTPUT_REGADDR_TO_GPIO): New
   macros to automatically determine the GPIO port and pin from the
   corresponding PPS (Peripheral Pin Select) define. Since there is a
   one-to-one correspondence between PPS output mappings and a single
   port and pin, these macros avoid writing redundant pin mappings. We
   use this when switching the TX pin from UART to GPIO to generate
   the BREAK and we could use it in other peripheral drivers in the
   future to override hardware behavior.

* arch/mips/src/pic32mz/pic32mz_serial.c
  (struct up_dev_s): Add new field 'brk' to indicate line break in
   progress when built with PIC32MZ_UART_BREAKS. If generating BSD-
   compatible BREAKs, also add tx_gpio, tx_pps_reg, and tx_pps_val, to
   let us toggle the pin between UART and GPIO modes.
  (up_ioctl): Add cases for TIOCSBRK and TIOCCBRK to turn BREAK on and
   off, with both hardware-native and BSD-compatible implementations.
   This is similar to the STM32F7 implementation.
  (up_txint): Block enabling TX interrupt if line break in progress.
   This is similar to the STM32F7 implementation.
2023-02-17 09:55:29 +08:00
Nathan Hartman
212ef18803 arch/pic32mz: Fix typos in PPS register mapping defines
The PIC32MZ architecture provides a Peripheral Pin Select (PPS) which
allows mapping peripherals to different GPIO pins. To map a peripheral
output, a value is programmed to a register called RPnxR, where n is
the GPIO port (A thru K) and x is the GPIO pin (0 thru 15). The names
of these registers in code are PIC32MZ_RPnxR. However, in various
definitions, these were mistakenly written as PI32MZ_RPnxR (missing C
in PIC32). This prevents using any of the affected mappings. This
issue is fixed by repairing the define names.

* arch/mips/src/pic32mz/hardware/pic32mzec_pps.h,
  arch/mips/src/pic32mz/hardware/pic32mzef_pps.h:
  (): s/PI32MZ/PIC32MZ/g
2023-02-16 09:27:33 +08:00
Nathan Hartman
7c90fbd7c2 arch/pic32mz: Fix PPS mappings for RPE5R register
The defines for Peripheral Pin Select (PPS) register RPE5R were called
RPE4R inadvertently; however, mappings elsewhere in the file used the
correct name of RPE5R, so the build would break if anyone attempted to
map those peripherals to GPIO pin E5. This issue is now fixed.

* arch/mips/src/pic32mz/hardware/pic32mzec_pps.h,
  arch/mips/src/pic32mz/hardware/pic32mzef_pps.h:
  (PIC32MZ_RPE4R_OFFSET): Rename to PIC32MZ_RPE5R_OFFSET.
  (PIC32MZ_RPE4R): Rename to PIC32MZ_RPE5R.
2023-02-16 09:26:30 +08:00
Nathan Hartman
6fb08b8b03 Fix typos: s/UARt/UART/ 2023-02-16 09:25:35 +08:00
Ville Juven
9ac3e841da group_addrenv: Fix call to group_addrenv for targets that don't need it 2023-02-09 00:14:52 +08:00
Nathan Hartman
375cb09ff0 arch/pic32mz: Serial support for termios
Previously, it was impossible to build for PIC32MZ architecture with
CONFIG_SERIAL_TERMIOS because it introduced compiler errors in the
lower half driver.

Fixing the compiler errors and adding an implementation of the
TIOCSERGSTRUCT, TCGETS, and TCSETS ioctl calls.

* arch/mips/src/pic32mz/pic32mz_serial.c
  (): Include nuttx/fs/ioctl.h, needed for the TIOCSERGSTRUCT, TCGETS,
   and TCSETS defines.
  (up_ioctl): Fix compile breakage. Implement TIOCSERGSTRUCT. Make
   TCGETS return data bits, parity, and stop bits. Make TCSETS apply
   changes to data bits, parity, and stop bits.
2023-02-08 23:55:37 +08:00
Nathan Hartman
1b3cac19a0 serial: Fix typo in comments (s/besued/because/) 2023-02-08 10:05:27 +08:00
Nathan Hartman
5f9cb6faf4 drivers/serial: Fix docstrings on UART interrupt handlers 2023-02-07 04:41:36 +08:00
Gustavo Henrique Nihei
e6b204f438 nuttx: Use MIN/MAX definitions from "sys/param.h"
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-02-01 23:47:44 +08:00
Xiang Xiao
7d66a16c53 Minor style clean up
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-28 19:53:20 +02:00
Xiang Xiao
f64da13e9b libxx: Add CXX_STANDARD to select -std=c++??
and default to "c++17"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-16 15:41:57 +02:00
zhangyuan21
45394eb6dc arch: save user context in assert common code
This is the work continue with #7875

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-24 13:02:56 +08:00
Petro Karashchenko
b107e4f417 nuttx: unify MIN, MAX and ABS macro definition across the code
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-12-21 09:31:28 +08:00
Xiang Xiao
d5689e070b net/arp: Remove nuttx/net/arp.h
1.move ARPHRD_ETHER to netinet/arp.h
1.move arp_entry_s to net/arp/arp.h
2.move arp_input to nuttx/net/netdev.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-16 22:10:59 +02:00
zhangyuan21
453a1a7332 arch: move stack and task dump to common code
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-17 01:59:35 +08:00
zhangyuan21
632d87ee71 arch: remove up_release_pending function
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2022-12-16 21:29:57 +08:00
田昕
0382b63f5d move common assert logic together.
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
2022-12-12 17:05:02 +08:00
Xiang Xiao
c6e9edcbb6 net: Rename arp_arpin to arp_input
align with other similar function(e.g. ipv4_input and ipv6_input)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-04 20:39:21 +08:00
chao an
6fa60627eb net/devif/ip: build l2 header on the IP layer
Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-27 12:13:45 +08:00
chao an
8850dee746 net/devif: move preprocess of txpoll into common code
Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-27 12:11:12 +08:00
zhangyuan21
d8051ba979 nuttx/sched: merge up_block_task and up_unblock_task 2022-11-22 22:59:08 +08:00
zhangyuan21
a8fa51e6bf arch: rename arch special function name 2022-11-22 16:27:56 +08:00
zhangyuan21
5c1b518314 nuttx/sched: move reprioritize process to public function 2022-11-22 15:29:00 +09:00
zhangyuan21
08f7152d9f nuttx/sched: remove nxsched_remove_readytorun from up_block_task
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
add the task from the specified task list to reduce time consuming.
2022-11-22 15:29:00 +09:00
zhangyuan21
e54b602208 nuttx/sched: remove nxsched_remove_blocked from up_unblock_task
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
delete the task from the specified task list to reduce time consuming.
2022-11-22 15:29:00 +09:00
Xiang Xiao
6af9afaa60 Fix error: more '%' conversions than data arguments
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-20 14:34:44 +01:00
anjiahao
a4563b8744 Fix the coding style and typo issue
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-14 09:34:04 +09:00
anjiahao
d07792a343 Initialize global mutext/sem by NXMUTEX_INITIALIZER and SEM_INITIALIZER
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-14 09:34:04 +09:00
yinshengkai
85f727f232 tools: replace INCDIR to Makefile variable
In the past, header file paths were generated by the incdir command
Now they are generated by concatenating environment variables

In this way, when executing makefile, no shell command will be executed,
it will improve the speed of executing makfile
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2022-11-03 19:59:55 +08:00
anjiahao
e1ca516488 use SEM_INITIALIZER inside of NXSEM_INITIALIZER
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-22 14:50:48 +08:00
anjiahao
5724c6b2e4 sem:remove sem default protocl
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-22 14:50:48 +08:00
anjiahao
dee38ce3e8 arch: Replace critical section with nxmutex in i2c/spi/1wire initialization
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
anjiahao
d1d46335df Replace nxsem API when used as a lock with nxmutex API
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
Fotis Panagiotopoulos
bbf3f2866d Fixed non-UTF8 characters. 2022-09-28 09:38:55 +08:00
Xiang Xiao
70290b6e38 arch: Change the linker generated symbols from uint32_t to uint8_t *
and remove the duplicated declaration

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-24 21:26:56 +02:00
Xiang Xiao
3c1c29f2c4 arch: move non arm g_current_regs defintion to common place
to avoid the code duplicaiton

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-21 22:23:11 +02:00
wangbowen6
b15d38246c up_nputs: fix AddressSanitizer: global-buffer-overflow problem
==2117790==ERROR: AddressSanitizer: global-buffer-overflow on address 0x64d9e3c0 at pc 0x59ac4e16 bp 0xcefe8058 sp 0xcefe8048
READ of size 1 at 0x64d9e3c0 thread T0
    #0 0x59ac4e15 in up_nputs sim/up_nputs.c:54
    #1 0x59a67e4c in syslog_default_write syslog/syslog_channel.c:220
    #2 0x59a67823 in syslog_default_write syslog/syslog_write.c:101
    #3 0x59a67f10 in syslog_write syslog/syslog_write.c:153
    #4 0x59a651c3 in syslogstream_flush syslog/syslog_stream.c:60
    #5 0x59a6564e in syslogstream_addchar syslog/syslog_stream.c:104
    #6 0x59a6576f in syslogstream_putc syslog/syslog_stream.c:140
    #7 0x5989fc4d in vsprintf_internal stdio/lib_libvsprintf.c:952
    #8 0x598a1298 in lib_vsprintf stdio/lib_libvsprintf.c:1379
    #9 0x59a64ea4 in nx_vsyslog syslog/vsyslog.c:223
    #10 0x598a601a in vsyslog syslog/lib_syslog.c:68
    #11 0x59b0e3dc in AIOTJS::logPrintf(int, char const*, ...) src/ajs_log.cpp:45
    #12 0x59b03d56 in jse_dump_obj src/jse/quickjs/jse_quickjs.cpp:569
    #13 0x59b03ea1 in jse_dump_error1(JSContext*, unsigned long long) src/jse/quickjs/jse_quickjs.cpp:602
    #14 0x59b03dd9 in jse_dump_error(JSContext*) src/jse/quickjs/jse_quickjs.cpp:591
    #15 0x59bed615 in ferry::DomComponent::callHook(char const*) src/framework/dom/component.cpp:65
    #16 0x59bfe0ff in ferry::DomComponent::initialize() src/framework/dom/component.cpp:645
    #17 0x59bb141d in dom_create_component(JSContext*, unsigned long long, unsigned long long, unsigned long long) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x365c41d)
    #18 0x59b4c0d3 in AIOTJS::__createComponent(JSContext*, unsigned long long, int, unsigned long long*) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x35f70d3)
    #19 0x5a56ec17 in js_call_c_function quickjs/quickjs.c:16108

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-01 11:51:48 +08:00
Robert Middleton
5d12e350da pic32mx: add option to disable JTAG at runtime
Add a new option to optionally disable JTAG at runtime.  Defaults to enabling
JTAG at runtime as that is the state the processor comes up in.
2022-08-11 11:24:41 -03:00
Xiang Xiao
13a7ae3d06 arch: Call board_reset before up_irq_save and spin_trylock
since board_reset may call some kernel functions which try
to acquire the lock again

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-28 08:18:24 -04:00
Xiang Xiao
aad5fbd2fb arch: Add up_nputs function to handle the non '\0' string correctly
and change up_puts as a simple macro

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-17 17:31:19 +03:00
Xiang Xiao
3d1ce144df arch: Move up_getsp from arch.h to irq.h
since all other special register operation in irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-01 10:44:55 -03:00
Gustavo Henrique Nihei
5ce77fad1b arch: Remove "0x" prefix preceding "%p" specifier on format string
The "p" format specifier already prepends the pointer address with "0x"
when printing.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 22:08:58 +03:00
Nimish Telang
4afd25b567 this flag is meaningless for the linker 2022-06-27 20:03:03 -03:00
Xiang Xiao
11e1a8b28b arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h
follow up the below change:
commit 6357523892
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Mon Nov 1 12:40:51 2021 +0800

    arch: Add _wchar_t typedef like other basic types

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-06-03 22:25:49 +03:00
zhanghongyu
035d925864 devif: remove all devif_timer
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2022-06-02 20:11:50 -03:00
chao.an
3f65b562bb arch: inline up_interrupt_context()
inline the up_interrupt_context() to avoid unnecessary stack pushes

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-26 04:36:07 +08:00
Xiang Xiao
b30e0a26ef Move "-nostartfiles -nodefaultlibs" from Make.defs to Toolchian.defs
and replace "-nostartfiles -nodefaultlibs" with "-nostdlib"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-18 08:26:02 -04:00
Xiang Xiao
d3524d4f8b arch/i2c: Change xxx_i2c_tousecs to xxx_i2c_toticks
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 23:22:01 +03:00