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2813 Commits

Author SHA1 Message Date
Gregory Nutt
665f487ed3 SAMA5D4: Add configuration to redirect all interrupts to the AIC 2014-06-26 11:51:39 -06:00
Gregory Nutt
f00ea6ecf9 STM32 I2C reset. Add missing GPIO configuration. From Alex D 2014-06-25 16:08:31 -06:00
Gregory Nutt
579ee6f573 Clean-up packet socket naming 2014-06-25 10:34:52 -06:00
Gregory Nutt
621097b6c8 Rename ip_eth_hdr to eth_hdr_s 2014-06-25 09:57:52 -06:00
Gregory Nutt
4b3bec6bf3 Add support for the SAM4CM. From Max Neklyudov 2014-06-25 08:25:52 -06:00
Gregory Nutt
5d1f8180d4 Move the remaining files from include/nuttx/net/uip to include/nuttx/net; Rename *_internal.h header files in net/ to just *.h 2014-06-24 10:14:15 -06:00
Gregory Nutt
37646044ac Move include/nuttx/net/uip/uip-arch.h to include/nuttx/net/netdev.h 2014-06-24 09:28:44 -06:00
Gregory Nutt
626469e30c Move include/nuttx/net/uipopt.h to include/nuttx/net/netconfig.h 2014-06-24 08:53:28 -06:00
Gregory Nutt
0c0cb50873 Add support for the LPCXpresso's RTC, ADC, DAC, Timer, PWM, and MCPWM. All form Max 2014-06-23 12:13:52 -06:00
Gregory Nutt
04e6fdf043 SAMA5D4: Add missing mappings for the VDEC and L2CC memory regions 2014-06-21 14:25:47 -06:00
Gregory Nutt
942d24a005 Correct type of SAMA5 arm_decodefiq() return value 2014-06-21 10:34:35 -06:00
Gregory Nutt
190cbc766e Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling 2014-06-21 09:55:09 -06:00
Gregory Nutt
1186290a8d SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack 2014-06-20 18:49:01 -06:00
Gregory Nutt
3f6b1642ca SAMA5D4: Add support for secure/FIQ interrupts; SAIC supports need to be be enabled unconditionally 2014-06-20 18:16:41 -06:00
Gregory Nutt
9542994616 SAMA5D4: Fix MATRIX32 base address 2014-06-20 18:15:13 -06:00
Gregory Nutt
ec0fc7756b SAMA5D4: Minor fixes to get working with SAMA5D3 again 2014-06-20 16:01:45 -06:00
Gregory Nutt
fb25ba907c SAMA5D4: Add partial support for secure interrupt controller (SAIC) 2014-06-20 15:22:00 -06:00
Gregory Nutt
083986e814 SAMA5D4: USART peripheral clock appears to be MCK/2 2014-06-20 11:40:36 -06:00
Gregory Nutt
a55457b175 SAMA5D4-EK: Make sure that the H32MX divider is set; correct sense of bit driver red LED 2014-06-20 10:33:33 -06:00
Gregory Nutt
ac6b64dac3 SAMA5D4: Fix peripheral clocking macros: AIC and L2CC are continuously clocked 2014-06-19 15:52:42 -06:00
Gregory Nutt
231fd1b5c8 SAMA5D4: Initial bring-up fixes 2014-06-19 14:16:36 -06:00
Gregory Nutt
2b5f8dbba5 Cosmetic cleanup 2014-06-18 08:24:53 -06:00
Gregory Nutt
9c0de33715 SAMA5D4: XDMAC driver now compiles error/warning free (still untested) 2014-06-17 16:31:09 -06:00
Gregory Nutt
9d44747f60 SAMA5D4: More progress on XDMAC driver (still no complete); Also fixes some critical errors in the SAMA5D3 DMA definitions 2014-06-17 13:18:52 -06:00
Gregory Nutt
260c2676d4 SAMA5D4: Correct MATRIX register addresses 2014-06-14 10:42:53 -06:00
Gregory Nutt
37d06c7444 SAMA5D4: Implement SDRAM initialization 2014-06-14 10:42:26 -06:00
Gregory Nutt
d80c55e8b6 SAMA5D4: Fix some memory remapping issues; updates to comments and README files 2014-06-14 08:02:58 -06:00
Gregory Nutt
2c6c1685de SAMA5: XDMAC update (still not complete) 2014-06-13 11:59:44 -06:00
Gregory Nutt
2423ef3fdc SAMA5D4: Initial XDMAC driver logic; initial check-in is little more the the DMAC driver with some name changes 2014-06-12 16:33:04 -06:00
Gregory Nutt
faaf641490 First check-in of Lazlo's PF_PACKET 'raw' socket implementation 2014-06-12 11:52:06 -06:00
Gregory Nutt
3bfc1effaf STM32: Handle setting of USART CR1_M when 8 bits of data plus parity 2014-06-11 15:49:54 -06:00
Gregory Nutt
fd710fc8db Typo in last SAMA5D4 commit 2014-06-11 13:43:54 -06:00
Gregory Nutt
69c18728f2 SAMA5: Add support for Micrel KSZ8081 PHY 2014-06-11 13:25:59 -06:00
Gregory Nutt
8b450d6d1b SAMA5D4: Add EMAC driver 2014-06-11 12:23:31 -06:00
Gregory Nutt
9d0cfcc21d SAMA5D4: Still trying to reconcile Ethernet interfaces 2014-06-11 08:01:48 -06:00
Gregory Nutt
e0a07125c8 SAMA5D3/4: More renaming. Change SAMA5D3 EMAC to EMACA and SAMA5D4 to EMACB so that the configuration and build system can configure them. I might come up with something better later 2014-06-10 17:40:25 -06:00
Gregory Nutt
03ba83fedb STM32: Expicitly include header file files. From Freddie Chopin 2014-06-10 15:49:48 -06:00
Gregory Nutt
760b60436f SAMA5D4: update MATRIX register definitions for the SAMA5D4 2014-06-10 13:15:29 -06:00
Gregory Nutt
80c07aa2d6 SAMA5D4: Complete MPDDR header file 2014-06-10 11:16:05 -06:00
Gregory Nutt
a64411715b SAMA5D4: Add MPDDRC file (incomplete) 2014-06-10 08:46:14 -06:00
Gregory Nutt
90b82696ac Move SAMA5D3 MPDDRC definitions to a separate header file 2014-06-10 08:11:31 -06:00
Gregory Nutt
55f9e5b465 SAMA5D4: Update LCDC header file 2014-06-09 13:27:08 -06:00
Gregory Nutt
e9e22d7096 Add logic to select between incompatible SAMA5D3 and SAMA5D4 EMAC header files 2014-06-09 12:24:39 -06:00
Gregory Nutt
1f64e9c5b9 SAMA5: Back out most of commit c37b5b7b97d0644743c04f2c3d9e2b7ef9f5d698. Things are going to have to be done differently 2014-06-09 12:16:16 -06:00
Gregory Nutt
46e5d8b153 SAMA5D4: Updated EMAC header file 2014-06-09 11:40:11 -06:00
Gregory Nutt
082ab99e9e SAMA5D4: Add EMAC header file 2014-06-09 11:29:02 -06:00
Gregory Nutt
e057a05c92 SAMA5D4: More header file changes 2014-06-09 10:07:00 -06:00
Gregory Nutt
1c84924373 SAMA5D4: update ISI register definition header file 2014-06-09 09:29:23 -06:00
Gregory Nutt
92d6883a71 SAMA5D4: Completes PMC modifications for the SAMA5D4 2014-06-09 07:55:51 -06:00
Gregory Nutt
4d65dd04e2 SAMA5D4: Completes L2CC register definition header file 2014-06-08 19:08:11 -06:00