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12768 Commits

Author SHA1 Message Date
Gregory Nutt
b9be0279b1 Coding standard requires a blank line after every comment. 2016-12-07 06:52:15 -06:00
Gregory Nutt
cae56b825b Merged in david_s5/nuttx/upstream_to_greg_SDIO_fix (pull request #177) 
Allow a config to override the SDIO clock edge setting
 2016-12-07 12:48:11 +00:00
David Sidrane
cbf863b1ca STM32F7: Allow the config to override the clock edge setting 2016-12-06 13:43:57 -10:00
David Sidrane
7cc0a06f44 STM32: Allow the config to override the clock edge setting 2016-12-06 13:30:07 -10:00
Gregory Nutt
e190e1ee5b stm32fxxxxx_otgfs.h edited online with Bitbucket 2016-12-06 15:58:05 +00:00
Gregory Nutt
8e447453e1 Add a missing bit field definitions that was lost when stm32_otgfs.h was deleted. 2016-12-06 09:22:03 -06:00
Gregory Nutt
d6437407b1 Fix broken build. Previous commit removed a file that was being used. 2016-12-06 09:03:00 -06:00
Gregory Nutt
b6a21edb42 Merged in david_s5/nuttx/upstream_to_greg (pull request #176) 
Upstream to greg
 2016-12-06 12:22:42 +00:00
David Sidrane
885b718552 Expanded otgfs support to stm32F469 and stm32f446 
Added missing bits definitions
   Used stm32F469 and stm32f446 bit definitions
   Removed unsed header file
 2016-12-05 18:07:57 -10:00
David Sidrane
50f36f8967 Added support for stmf469 SAI and I2S PLL configuration and STM446 fixes 2016-12-05 14:21:46 -10:00
David Sidrane
8b31eda4d8 Added Timers 2-5 and control of SAI and I2S PLLs 2016-12-05 14:19:56 -10:00
Gregory Nutt
9ed0387379 Olimex-LPC1766-STK: Enable procfs in NSH configuration. Automount /proc on startup. 2016-12-05 08:52:40 -06:00
Gregory Nutt
6cff0a7012 SAMA5 PWM: Minor improvement to a loop 2016-12-04 15:48:13 -06:00
Gregory Nutt
39c4ecbcd0 SAMA5 PWM: Costmetic 2016-12-04 15:39:53 -06:00
Gregory Nutt
ff76ebfd31 SAMA5 does not build when executing from SDRAM before board frequencies are not constant. Rather, the bootloader configures the clocking and we must derive the clocking from the MCK left by the bootloader. This means lots more computations. This is untested on initial commit because I don't have a good PWM test setup right now. 2016-12-04 15:25:43 -06:00
Masayuki Ishikawa
d92a7886a4 SAM3/4: Add SMP support for the dual-core SAM4CM 2016-12-04 07:23:31 -06:00
Masayuki Ishikawa
84900298b7 ARMv7-M SMP: Applied the latest changes for ARMv7A-SMP 2016-12-04 06:49:49 -06:00
Gregory Nutt
9c65b0321d Eliminate some warnings 2016-12-04 06:24:24 -06:00
Gregory Nutt
920a9592d1 Fix a naming collision introduced in last big commit 2016-12-03 18:19:08 -06:00
Gregory Nutt
7467329a98 Eliminate CONFIG_NO_NOINTS. Lots of files changed -> lots of testing needed. 2016-12-03 16:28:19 -06:00
Gregory Nutt
ad3897531f C5471 Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 12:17:55 -06:00
Gregory Nutt
43459fe75e DM09x0 Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 11:42:15 -06:00
Gregory Nutt
41e35c88bf eZ80 Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 10:43:35 -06:00
Gregory Nutt
eba1e076ec PIC32MX/Z Ethernet: Now supports CONFIG_NET_NOINT 2016-12-03 09:50:14 -06:00
Gregory Nutt
bfa1da14e2 LM3S Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 08:32:49 -06:00
Gregory Nutt
1851e9e837 SAMA5D3: Add support for CONFIG_NET_NOINTS to EMACA and GMAC driver. 2016-12-02 16:36:27 -06:00
Gregory Nutt
b95e1f656b i.MX6: Add an untested SPI driver taken directly from the i.MX1 port. 2016-12-02 13:51:07 -06:00
Gregory Nutt
c0cbea2550 Remove RGMP and RGMP drivers. 2016-12-02 09:49:33 -06:00
Alan Carvalho de Assis
cd119ad544 GPDMA driver for the LPC43xx. The GPDMA block is basically the same as the LPC17xx. Only the clock configuration is different and LPC43xx has four different DMA request sources, where LPC17xx has only two. 2016-12-01 18:01:04 -06:00
Sebastien Lorquet
db24f237d7 STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings 2016-12-01 09:00:59 -06:00
Alan Carvalho de Assis
8b3a6d1eca LPC43 SD/MMC: Correct some git definitions on SMMC control register in lpc43_sdmmc.h 2016-11-30 14:50:32 -06:00
Janne Rosberg
a03d26e88d stm32_otghshost: if STM32F446 increase number of channels to 16 2016-11-30 12:17:12 -06:00
Gregory Nutt
44668c00a0 LPC17 Ethernet: Tiny, trivial, cosmetic spacing change 2016-11-30 12:16:21 -06:00
Gregory Nutt
b29b77532f Update some comments 2016-11-29 18:17:37 -06:00
Gregory Nutt
934aded293 arch/: Adapt all Ethernet drivers to work as though CONFIG_NET_MULTIBUFFER were set. Remove all references to CONFIG_NET_MULTIBUFFER 2016-11-29 16:06:48 -06:00
Gregory Nutt
f06d521c10 Minor extensions to some comments 2016-11-29 10:01:38 -06:00
Ramtin Amin
137586f50a Misoc LM32: Add logic to flush/invalidate caches 2016-11-29 09:09:28 -06:00
Gregory Nutt
79bb895073 i.MX6: Don't output the alphabet if CONFIG_DEBUG_FEATURES is not set. 2016-11-29 08:34:22 -06:00
Gregory Nutt
a8b69c3efe Back out a debug change that was included in commit 2016-11-29 07:51:49 -06:00
Marc Rechté
3f91bd6056 STM32 DAC: Fix shift value whenever there are is a DAC2 and, hence, up to three interfaces. 2016-11-29 07:03:54 -06:00
Gregory Nutt
1f9e3ae5f1 Misoc LM32: Make naming consistent, lm32_sigdeliver vs. up_sigdeliver. 2016-11-28 11:18:07 -06:00
Ramtin Amin
b568bfa813 Misoc LM3: Add Misoc Ethernet driver. Integrate network support into configs/misoc/hello. Remove configs/misoc/include/generated directory. I suppose the the intent now is that this is a symbolic link? DANGER! This means that you cannot compile this code with first generating these files a providing a symbolic link to this location! 2016-11-28 11:08:29 -06:00
Gregory Nutt
d65be718c2 sched_note: Extend OS instrumentation to include some SMP events. 2016-11-27 17:14:57 -06:00
Gregory Nutt
cbf98ae0a0 ARMv7 GIC: SGIs are non-maskable but go through the same path as other, maskable interrupts. Added logic to serialize SGI processing when necessary. 2016-11-27 13:18:34 -06:00
Gregory Nutt
21e42d18c1 ARMv7-A/i.MX6 SMP: Move SMP coherernt cache setup to earlier in initialization of CPUn, n>0 2016-11-27 11:28:24 -06:00
Gregory Nutt
cd54c71dc1 ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however. 2016-11-27 10:21:46 -06:00
Gregory Nutt
278d8330d6 arm_scu.c edited online with Bitbucket. Fux some typos. 2016-11-27 02:59:42 +00:00
Gregory Nutt
3f6eadc238 ARMv7-A: Fix some SCU SMP logic 2016-11-26 18:41:48 -06:00
Gregory Nutt
546e352830 i.MX6: Add some controls to enable SMP cache coherency in SMP mode 2016-11-26 17:46:20 -06:00
Gregory Nutt
3353d9280f i.MX6: Disable non-cached region support. Add SCU register definitions. 2016-11-26 17:03:57 -06:00
Gregory Nutt
8dc79bb7ef Update comments and README file 2016-11-26 16:02:37 -06:00
Gregory Nutt
b2ba12e02a SMP: Basic function 2016-11-26 14:23:23 -06:00
Gregory Nutt
785ed5faf2 SMP: A few more compile/link issues. Still problems. 2016-11-26 13:20:11 -06:00
Gregory Nutt
6ff6da083f Fix a few compile related issues from the last commit 2016-11-26 12:23:09 -06:00
Gregory Nutt
aae306e942 i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region. 2016-11-26 12:04:02 -06:00
Gregory Nutt
dda0ac8b21 Update comments 2016-11-26 11:06:24 -06:00
Gregory Nutt
9376296e99 Merge remote-tracking branch 'origin/master' into imx6-smp 2016-11-26 11:02:55 -06:00
Gregory Nutt
8bacb1e426 Update comments 2016-11-26 11:02:21 -06:00
Gregory Nutt
bdf570ea08 Fix typos in comments 2016-11-26 10:42:25 -06:00
Gregory Nutt
2fba04f752 i.MX6 SMP: Beginning of non-cacheable region (incomplete) 2016-11-26 10:37:06 -06:00
Gregory Nutt
61b45a8544 i.MX6: Add some comments 2016-11-26 09:27:29 -06:00
Gregory Nutt
e3fe320e08 SMP: Add support for linking spinlocks into a special, non-cached memory region. 2016-11-26 08:47:03 -06:00
Maciej Wójcik
0d0b1b64e2 Fix for F1 RTC Clock, tested on F103 2016-11-25 06:17:18 +01:00
Gregory Nutt
b08fb33c28 SMP: Fix typos in some conditional compilation 2016-11-24 17:59:45 -06:00
Gregory Nutt
7f636f2280 SMP: Add spin_trylock(). Use this in conditions where other CPUs need to stopped but we cannot call enter_critical_section. 2016-11-24 13:33:43 -06:00
Ramtin Amin
7568aaf213 Misoc LM32: Add signal handling logic 2016-11-24 12:58:23 -06:00
Gregory Nutt
f77dcdf323 ARMv7-A SMP: Add a little logic to signal handling. 2016-11-24 11:45:05 -06:00
Gregory Nutt
c03d126da6 arm_cpupause.c edited online with Bitbucke. What was I thinking... Back out previous change. 2016-11-24 04:45:07 +00:00
Gregory Nutt
19e7f2210e arm_cpupause.c edited online with Bitbucket. Fix a typo in a comment. 2016-11-24 04:24:40 +00:00
Gregory Nutt
4b0bbf41ca SMP: Fix backward condition in test. 2016-11-23 22:24:14 -06:00
Alan Carvalho de Assis
7dbc25b02b LPC43xx: Add timer driver; configs/bambino-200e: Add support for timer driver 2016-11-23 13:33:51 -06:00
Ramtin Amin
b8754afb14 Misoc LM32: Make system timer configurable via CONFIG_USEC_PER_TICK. 2016-11-23 07:00:57 -06:00
Gregory Nutt
f90525a5d1 SMP: Update some comments; trivial improvement by inlining static function. 2016-11-22 16:48:57 -06:00
Gregory Nutt
d95b8f64f5 sam4s-xplained-pro: Remove obsolete timer initialization logic 2016-11-22 12:25:57 -06:00
Gregory Nutt
12f830ffd5 SAM3/4: Name of method is now setcallback, not sethandler 2016-11-22 12:06:07 -06:00
Gregory Nutt
054072d054 Misoc: Add commits and warnings about missing caculation of the timer reload value 2016-11-22 12:15:34 -06:00
Ramtin Amin
d1e84fb788 Misoc: Add timer driver 2016-11-22 12:10:11 -06:00
Gregory Nutt
bac7153609 SMP: Add logic to avoid a deadlock condition when CPU1 is hung waiting for g_cpu_irqlock and CPU0 is waitin for g_cpu_paused 2016-11-22 11:34:16 -06:00
Sebastien Lorquet
ec586ab350 implementation of dumpgpio for stm32l4, was required for pwm debug. 2016-11-22 07:57:21 -06:00
Gregory Nutt
130bfa3f6b Remove a assertion condition that appears to rarely cause false-alarm assertions. Teported by Petteri Aimonen 2016-11-21 14:43:56 -06:00
Gregory Nutt
f53e48199f Simplify and document some macros 2016-11-21 13:12:43 -06:00
Gregory Nutt
558784d06f Spinlocks: Added capability to provide architecture-specific memory barriers. This was for i.MX6 but does not help with the SMP problems. It is still a good feature. 2016-11-21 11:55:59 -06:00
Gregory Nutt
0804286ad3 arch/: Add option to use low-priority work queue to all Ethernet drivers in arch that support CONFIG_NET_NOINTS. 2016-11-19 09:20:01 -06:00
Gregory Nutt
0db99b8c89 Trivial fix from review of last PR 2016-11-19 06:52:51 -06:00
Gregory Nutt
8705ce816a Merged in gnagflow/nuttx (pull request #173) 
Master
 2016-11-19 12:49:56 +00:00
Wolfgang Reißnegger
b23c1f8817 Typo fix in sam_udp.c 2016-11-18 17:23:22 -08:00
Wolfgang Reißnegger
d135246a7d SAM3/4: Remove 'stalled' flag in UDP driver. 
The flag is not necessary. The state of the endpoint can be determined
using 'epstate' instead.
 2016-11-18 17:23:21 -08:00
Wolfgang Reißnegger
9e349f4335 SAM3/4: Remove unused 'halted' flag in UDP driver. 2016-11-18 17:23:21 -08:00
Wolfgang Reißnegger
c7ef82c546 SAM3/4: Add delay between setting and clearing the endpoint RESET bit in sam_ep_resume(). 
We need to add a delay between setting and clearing the endpoint reset
bit in SAM_UDP_RSTEP. Without the delay the USB controller will (may?)
not reset the endpoint.

If the endpoint is not being reset, the Data Toggle (DTGLE) bit will
not to be cleared which will cause the next transaction to fail if
DTGLE is 1. If that happens the host will time-out and reset the bus.

Adding this delay may also fix the USBMSC_STALL_RACEWAR in
usbmsc_scsi.c, however this has not been verified yet.
 2016-11-18 17:23:21 -08:00
Paul A. Patience
8d9804d57b STM32: STM32F303xB and STM32F303xC chips have 4 ADCs 2016-11-18 19:28:09 -05:00
Gregory Nutt
f92afbfbf3 apps/examples/timer: Restore the timer example, but adapt the interface to use the new signal logic from Sebastien, Lorquet. Totally untested and probably does not work! 2016-11-17 15:19:17 -06:00
Gregory Nutt
19c1c9d78b All timer lower half drivers. Port Sebastien's changes to all all other implementations of the timer lower half. Very many just and untested. Expect some problems. 2016-11-17 15:03:31 -06:00
Sebastien Lorquet
197cec58d2 timer driver: Use signal to notify of timer expiration. Add generic argument so that there can be additional usage. 2016-11-17 14:38:21 -06:00
Gregory Nutt
18ad40b98c ARMv7-M: Fix double allocation of MPU region in mmu.h 2016-11-17 13:37:24 -06:00
Gregory Nutt
bb19f1b499 spinlocks should be volatile. 2016-11-17 10:04:22 -06:00
Gregory Nutt
6a875bcb61 Xtensa: Add EXPERIMENTAL hooks to support lazy co-processor state restore in the future. 2016-11-16 06:48:13 -06:00
Gregory Nutt
c84db68103 Xtensa ESP32: Fix some compilation errors that snuck with some of the last changes 2016-11-14 13:29:08 -06:00
Kolb, Stefan
bf096873a1 SAMV7 USBDEVHS: A problem occurred if the USB cable is unplugged while a large amount of data is send over an IN endpoint using DMA. If the USB cable is plugged in again after a few seconds it is not possible to send data over this IN endpoint again, all other endpoints work as expected. 
The problem occurs because if the USB cable is unplugged while an DMA transfer is in flight the transfer is canceled but the register SAM_USBHS_DEVDMACTRL is left in an undefined state.  The problem was fixed the problem by resetting the register SAM_USBHS_DEVDMACTRL to a known state. Additionally all pending interrupts are cleared.
 2016-11-14 10:32:49 -06:00
Ramtin Amin
31d9565f0f Misoc LM32: Corrects a bug that never occured in qemu on simulation or real fpga. The error was that the r1 register was being modified out of context switching and not restoring it. 2016-11-14 07:18:33 -06:00
Sebastien Lorquet
98088a7456 typos 2016-11-09 19:52:29 +01:00
Sebastien Lorquet
a9c66683f2 Change the way to configure quadrature encoder prescalers. 2016-11-09 19:16:44 +01:00
Gregory Nutt
ac1bb127b6 Correct some C++ style comments. 2016-11-08 08:51:03 -06:00
Gregory Nutt
b6d6b774e9 Xtensa: In this model, co-processor state restore must enable co-processors in CPENABLE. 2016-11-08 08:23:52 -06:00
Ramtin Amin
693f8d743d LM32: Move interrupt definitions from common irq.h to lm32/irq.h. Remove unused misoc_uart.c and .h 2016-11-07 10:13:53 -06:00
Gregory Nutt
3cb1e0e67f STM32F7: Fix Make.defs. Would not work if only SDMMC2 were enabled. 2016-11-07 09:37:22 -06:00
Marc Rechté
eb9a8ed790 STM37xx PWM: Add PWM driver support for STMF37xx. The changes have been tested successfuly for TIM4 and TIM17 (different IPs). 2016-11-07 09:35:48 -06:00
Gregory Nutt
1344d8b466 STM32F746-WS: A few repairs to the nsh/defconfig for USB support. 2016-11-07 09:20:47 -06:00
Gregory Nutt
dd04d73afe STM32F7 SD/MMC driver depends on CONFIG_SDIO_DMA which is only defined in stm32/Kconfig. Changed to CONFIG_STM32F7_SDMMC_DMA and defined in stm32f7/Kconfig. 2016-11-07 09:16:34 -06:00
Gregory Nutt
ac6581acec Changes from review of last PR 2016-11-07 08:28:39 -06:00
Gregory Nutt
261aef1e0d Merged in petekol/nuttxnsm (pull request #168) 
stm32f7 important usb fixes
 2016-11-07 14:08:00 +00:00
Gregory Nutt
424ffc76dc LM32: Add missing _exit() logic (untested) 2016-11-07 07:31:15 -06:00
Gregory Nutt
86ef659ee5 LM32: Fix a typo in my many patching; eliminate some warnings 2016-11-07 07:16:53 -06:00
Ramtin Amin
fe2b755791 LM32: Correct some assembly language interrupt handling issues. Now the basic port seems functional. 2016-11-07 06:54:57 -06:00
Lok Tep
d6315a3084 del stm32f74xx75xx_sdmmc.h 2016-11-07 13:12:52 +01:00
Gregory Nutt
89c3c20052 Merge remote-tracking branch 'origin/master' into misoc 2016-11-06 11:09:05 -06:00
Gregory Nutt
5ac9136b21 LM32: Implement some commented out logic in lm32_dumpstate 2016-11-06 10:46:11 -06:00
Gregory Nutt
c1a687a4e5 Trivial changes from review of last PR 2016-11-06 08:11:01 -06:00
Heesub Shin
bda7d9ee4d ARMv7-R: fix to restore the Thumb flag in CPSR 
Thumb flag in CPSR is not restored back when the context switch occurs
while executing thumb instruction.

Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Byoungtae Cho <bt.cho@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 21:48:02 +09:00
Heesub Shin
343243c7c0 ARMv7-R: fix CPSR corruption after exception handling 
A sporadic hang with consequent crash is observed when booting:

    arm_prefetchabort: Prefetch abort. PC: 04d34a00 IFAR: 04d34a00 IFSR: 00000008
    up_assert: Assertion failed at file:armv7-r/arm_prefetchabort.c line: 87 task: init
    up_dumpstate: Current sp: 004c3df0
    up_dumpstate: Interrupt stack:
    up_dumpstate:   base: 004c05fc
    up_dumpstate:   size: 00000800
    up_dumpstate: User stack:
    up_dumpstate:   base: 004c3f58
    up_dumpstate:   size: 00000fec
    up_dumpstate: User Stack
    up_stackdump: 004c3de0: 004a0d14 004c3df0 004c3f58 004a0d20 00000057 004c2c58 09000000 004a42a4
    up_stackdump: 004c3e00: 00000003 004c3e10 004a0f1c 004bbcef 33c44b00 004a0f28 04d34a00 00000008
    up_stackdump: 004c3e20: 00000008 004a01bc 004bfd38 00000001 00007fff 00000001 34134a00 d83e4c00
    up_stackdump: 004c3e40: 09000000 00000000 33c44b00 d83e4c00 0c3f4c00 00000000 00000000 00000003
    up_stackdump: 004c3e60: 004c3e70 004a1494 04d34a00 200b0253 004c3ed8 004a5298 004c3ed8 6d00006d
    up_stackdump: 004c3e80: 0000006d 004bc3f4 00000009 004a4f64 00000009 b9e0784f 333f3ed0 69d4227d
    up_stackdump: 004c3ea0: d81f09bd 0f867344 5a7e2c12 8acefd34 5d00dc1b 004bc432 004c3f08 004c0e08
    up_stackdump: 004c3ec0: 00000000 00000000 00000000 00000000 00000000 004a4210 004a5258 004a5300
    up_stackdump: 004c3ee0: 00000000 00000001 ffffffff 004c3f80 000002b0 004a4234 00000007 004c3f08
    up_stackdump: 004c3f00: 004a58b4 004bc432 004bc3f4 004c3f80 000002b0 0000029c 00000000 0000029c
    up_stackdump: 004c3f20: 00000000 004a5900 0000ff01 00000000 00000000 004a61f4 00000000 004a5fa4
    up_stackdump: 004c3f40: 00000000 004a5f6c 00000000 004a2668 00000000 00000000 b7509f04 004c3f64
    up_registerdump: R0: 00000001 00007fff 00000001 34134a00 d83e4c00 09000000 00000000 33c44b00
    up_registerdump: R8: d83e4c00 0c3f4c00 00000000 00000000 00000003 004c3e70 004a1494 04d34a00
    up_registerdump: CPSR: 200b0253

It seems to be caused by the corrupted or wrong CPSR restored on return
from exception. NuttX restores the context using code like this:

    msr spsr, r1

GCC translates this to:

    msr spsr_fc, r1

As a result, not all SPSR fields are updated on exception return. This
should be:

    msr spsr_fsxc, r1

On some evaluation boards, spsr_svc may have totally invalid value at
power-on-reset. As it is not initialized at boot, the code above may
result in the corruption of cpsr and thus unexpected behavior.

Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 20:48:09 +09:00
Heesub Shin
6bfc6b4d23 ARMv7-R: fix typo in mpu support 
s/ARMV7M/ARMV7R/g

Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 20:48:09 +09:00
Heesub Shin
003511d198 ARMv7-R: add cache handling functions 
This commit adds functions for enabling and disabling d/i-caches which
were missing for ARMv7-R.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 20:48:01 +09:00
Heesub Shin
6a1a846011 ARMv7-R: add new Kconfig entries for d/i-cache 
Unlike in ARMv7-A/M, Kconfig entries for data and instruction caches
are currently missing in ARMv7-R. This commit adds those missing Kconfig
entries. Actual implmenetation for those functions will be added in the
subsequent patches.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:46 +09:00
Heesub Shin
2b922fcdbd ARMv7-R: remove the redundant update on SCTLR 
mpu_control() is invoking cp15_wrsctlr() around SCTLR update
redundantly.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:45 +09:00
Heesub Shin
05d477661b ARMv7-R: fix invalid drbar handling 
In ARMv7-R, [31:5] bits of DRBAR is physical base address and other bits
are reserved and SBZ. Thus, there is no point in passing other than the
base address.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:41 +09:00
Heesub Shin
af6e4f59c6 ARMv7-R: fix compilation error 
This commit fixes compilation errors on MPU support for ARMv7-R.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:38 +09:00
Heesub Shin
96a200a71c ARMv7-R: fix typo 
fix trivial typo: s/ARMv7-A/ARMv7-R/

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:36 +09:00
Gregory Nutt
45f549d2b8 LM32: Back out part of last change 2016-11-05 17:39:06 -06:00
Gregory Nutt
796969f6b6 Update TODO. Provide do-nothing stubs for mutex attribute interfaces if features not enabled. pthread_cond includes a signaling semaphore and should call sem_setprotocol. 2016-11-05 11:06:52 -06:00
Gregory Nutt
b0dffdc2ca Fix a number of header files with mismatched 'extern C {' and '}' 2016-11-05 07:25:05 -06:00
Gregory Nutt
3f150daf96 LM32: Oops, missed one line of code in the manual application of a patch 2016-11-04 19:41:43 -06:00
Gregory Nutt
1c05eb651c LM32: lm32_vectors.S needs to call lm32_doirq(), passing two parameters 2016-11-04 19:29:54 -06:00
Gregory Nutt
0b83e8afaa LM32: Remove some extra spacing 2016-11-04 17:48:24 -06:00
Gregory Nutt
6cc73f0405 LM32: Fix a copy/paste error in lm32_vectors.S that I introduced. 2016-11-04 17:42:10 -06:00
Gregory Nutt
911e5abb2c LM32: Fix various compilation errors that I introduced. 2016-11-04 17:37:10 -06:00
Gregory Nutt
5a9d3b20fa LM32: Add README. Update hello defconfig and setenv.sh 2016-11-04 17:19:42 -06:00
Lok Tep
b1b2008037 bad offset 2016-11-04 22:02:15 +01:00
Lok Tep
82f8802275 typo, missing ( 2016-11-04 21:58:31 +01:00
Gregory Nutt
af0d7a96fe LM32: More standard, common helper functions 2016-11-04 14:42:17 -06:00
Ramtin Amin
45caca804a LM32: Progress on interrupt and serial driver. 2016-11-04 14:04:43 -06:00
Gregory Nutt
8fe916e133 Attach the software interrupt handler when interrupts are intialized. 2016-11-04 11:23:33 -06:00
Gregory Nutt
50efe4a906 LM32: Add a fake IRQ number for a software interrupt. 2016-11-04 11:17:12 -06:00
Ramtin Amin
b2126738cd LM32: Fix implementation of up_irq_save() and up_irq_restore() 2016-11-04 10:54:10 -06:00
Gregory Nutt
ddd8716189 LM32: Ooops.. last version still in editor 2016-11-04 10:42:05 -06:00
Gregory Nutt
145ee2e6f1 LM32: Add prototype for lm32_decodeirq(). 2016-11-04 10:39:57 -06:00
Gregory Nutt
8f3c59b0d6 LM32: Rename up_doirq() to lm32_doirq() 2016-11-04 10:21:55 -06:00
Gregory Nutt
905f6f2956 Merge remote-tracking branch 'origin/master' into misoc 2016-11-04 09:58:57 -06:00
Gregory Nutt
e6435c28d0 Fix some name errors in port: RISC-V -> LM32 2016-11-04 09:58:27 -06:00
Gregory Nutt
8bd8ab1a45 configs/nucleo_f303re: Various fixes to get the adc configuration building again after PR. Refresh all configurations. 2016-11-04 06:59:28 -06:00
Gregory Nutt
1d0d2fb8e1 Fix typo introduced with big set of sem_setprotocol() changes. 2016-11-03 21:08:17 -06:00
Gregory Nutt
65b1ced5f2 Merge remote-tracking branch 'origin/master' into misoc 2016-11-03 18:12:02 -06:00
Gregory Nutt
5cfb83ec81 ESP32: File repeated in Make.defs 2016-11-03 17:47:09 -06:00
Gregory Nutt
0a5b4f684a arch: Disable priority inheritance on all semaphores used for signaling in the rest of the MCU drivers 2016-11-03 17:38:26 -06:00
Gregory Nutt
d8fecba333 arch: Disable priority inheritance on all semaphores used for signaling in all RNG drivers 2016-11-03 17:19:51 -06:00
Gregory Nutt
d28181da10 arch: Disable priority inheritance on all semaphores used for signaling in all USB host drivers 2016-11-03 17:05:53 -06:00
Gregory Nutt
bb6bfa633e arch: Disable priority inheritance on all semaphores used for signaling in all SD card drivers 2016-11-03 15:13:27 -06:00
Gregory Nutt
8b07aa6f7c arch: Disable priority inheritance on all semaphores used for signaling in all SPI drivers 2016-11-03 14:51:44 -06:00
Gregory Nutt
e1cd9febbf arch: Disable priority inheritance on all semaphores used for signaling in all I2C/TWI drivers 2016-11-03 14:23:42 -06:00
Spahlinger, Michael
77caf4180f SAMV7: Fix to SPI-Master driver. Without this the chip select decoding feature will not work properly 2016-11-03 09:22:33 -06:00
Gregory Nutt
8190e08948 Back out part of previous commit 2016-11-03 08:57:55 -06:00
Alan Carvalho de Assis
1e754402b8 Add C++ support linking with GNU toolchain newlib/stdlibc++ 2016-11-03 08:50:58 -06:00
Gregory Nutt
569283fa65 Merge remote-tracking branch 'origin/master' into misoc 2016-11-03 08:33:47 -06:00
Gregory Nutt
cb96e632fa LM32: Add toolchain configuration; Add Toolchain.defs. 2016-11-03 07:21:25 -06:00
Gregory Nutt
54d7656f18 Update some comments 2016-11-03 07:04:03 -06:00
Gregory Nutt
a8ef1e55e9 Merge remote-tracking branch 'origin/master' into misoc 2016-11-02 14:06:14 -06:00
Ramtin Amin
b5a94e255a Misoc/LM32: Changes to get a clean compilation after initial review and commit 2016-11-02 12:07:52 -06:00
Paul A. Patience
93e9387689 STM32 ADC: Fix compilation error when DMA isn't enabled 2016-11-02 12:52:19 -04:00
David Sidrane
d870f4ab29 I think, that Size is (highest address+1 - Base address) 
Base address has been removed and if address+count >= size we are outside of the Flash
 2016-11-01 22:27:35 +00:00
Aleksandr Vyhovanec
2bb15fe789 Minor changes 2016-11-01 23:48:44 +03:00
Aleksandr Vyhovanec
20a1642552 To write the last page 2016-11-01 23:34:30 +03:00
Gregory Nutt
1787a8143e Misoc: Logic on common directory should not include ANY lm32 specific header file. The generic header file chip.h can be exported by all architectures and that is what should be included instead of lm32.h which is an inappropriate dependency. 2016-11-01 14:18:21 -06:00
Ramtin Amin
0088f24603 MISOC LM32: Add arch/src/common directory 2016-11-01 12:47:35 -06:00
Ramtin Amin
000e10470c MISOC LM32: Add arch/src/lm32 directory 2016-11-01 11:35:27 -06:00
Ramtin Amin
62b394d06f LM32: First of many LM32 source files 2016-11-01 08:10:14 -06:00
Ramtin Amin
6a78c0f113 LM32: Add Kconfig files 2016-11-01 07:20:44 -06:00
Gregory Nutt
6662c75679 LM32: Add arch/misoc/Kconfig file 2016-10-31 19:29:30 -06:00
Ramtin Amin
6ff1c96017 LM32: First commit adds only reviewed architecture header files 2016-10-31 18:41:36 -06:00
Gregory Nutt
cfcc7edded Xtensa/ESP32: Add window spill logic; Add C++ support to linker script 2016-10-31 17:51:48 -06:00
Gregory Nutt
4d0b0e44f1 Xtensa/ESP32: Add up_cpu_idlestack() and fix some compile issues. 2016-10-31 14:56:48 -06:00
Gregory Nutt
28d1478480 Xtensa/ESP32: Add CPU1 startup logic 2016-10-31 13:15:15 -06:00
Gregory Nutt
a8e3f79494 Xtensa/ESP32: Add User Exception handler 2016-10-31 12:04:52 -06:00
Gregory Nutt
a787a99071 ESP32: Add inter-cpu interrupts 2016-10-31 08:29:28 -06:00
Gregory Nutt
63d5ab5b67 Add logic to attach inter-CPU interrupts. Fix some compilation errors. 2016-10-30 16:15:04 -06:00
Gregory Nutt
6ff833e56e Forgot to add a file in the last commit 2016-10-30 15:40:42 -06:00
Gregory Nutt
85ed3dae9a Update some compilation issues 2016-10-30 15:38:51 -06:00
Gregory Nutt
a4c3fef0b7 Xtensa: Add more exception vectors. All just cause a PANIC now. 2016-10-30 12:20:11 -06:00
Gregory Nutt
fdede8099b Xtensa/ESP32: Add Level1 handler, panic handler, remove EXECHOOKS. 2016-10-30 10:57:57 -06:00
Gregory Nutt
eaa5968a22 Xtensa: Convert some CALL0 C calls to be compatible with Window ABI 2016-10-30 08:46:35 -06:00
Gregory Nutt
261e0edc61 Xtensa: Adapt co-processor state save/restore functions so that they are call-able from C with Windows ABI. 2016-10-30 08:35:09 -06:00
Gregory Nutt
c0da94fc3e Xtensa: Remove xtensa_macros.h; duplicates xtensa_abi.h 2016-10-30 07:45:28 -06:00
Gregory Nutt
8c96221093 Xtensa: Replace CONFIG_XTENSA_CALL0_ABI with compiler defined __XTENSA_CALL0_ABI__ 2016-10-30 07:37:51 -06:00
Gregory Nutt
dc82fa81b8 Xtensa: Remove XTENSA_EXTRA_SA_SIZE. It is not used. 2016-10-30 07:09:24 -06:00
Gregory Nutt
4997ec7a1e ESP32 Core V2: Add an SMP configuration to support development (not yet usable). 2016-10-29 14:56:07 -06:00
Gregory Nutt
c993a0267c Xtensa: Add Window vector 2016-10-29 12:30:24 -06:00
Gregory Nutt
804f9c5de7 Xtensa: Rename some files. 2016-10-29 11:24:02 -06:00
Gregory Nutt
d346f25aae Xtensa/ESP32: Fix some compile issues related to new co-processor logic 2016-10-29 10:27:46 -06:00
Gregory Nutt
365e753774 Merge branch 'master' of bitbucket.org:nuttx/nuttx 2016-10-29 09:52:43 -06:00
Gregory Nutt
4943b09ffa Xtensa: Remove co-processor ownership array. I think that this is not needed (but I might be wrong). 2016-10-29 09:50:51 -06:00
Gregory Nutt
ccf5b4e357 Xtensa: Cleanup of co-processor logic; remove some unnecessary things. 2016-10-29 09:36:33 -06:00
David Sidrane
b344936c7b STM32F7:otgdev fixed typo 2016-10-28 23:20:53 +00:00
Gregory Nutt
2fa8b9ba34 Xtensa ESP32: Co-processor state is code complete but uncompiled and untested. 2016-10-28 13:03:25 -06:00
Gregory Nutt
9345c6f4db Xtensa: More co-processor save logic. Still not complete. 2016-10-28 11:56:35 -06:00
Gregory Nutt
a90d0bbf2e ESP32: A little more co-processor logic. Still not complete. 2016-10-28 11:19:23 -06:00
Gregory Nutt
b4b26285f1 ESP32: Add tie-asm.h 2016-10-28 10:53:14 -06:00
Gregory Nutt
be2a801e30 Xtensa: Add xtensa_coproc.h 2016-10-28 10:33:20 -06:00
Vytautas Lukenskas
5b1a3e6fe0 Restore RS485 mode on serial port open (if RS485 is enabled via menuconfig). 2016-10-28 09:10:11 -06:00
Gregory Nutt
e93bcda8ae ESP32: Partial co-processor state save logic. Incomplete and will probably be redesigned. 2016-10-28 09:05:39 -06:00
Gregory Nutt
3bacda1565 STM32 Serial: Trivial removal of an extra space in a comment 2016-10-28 07:16:52 -06:00
Gregory Nutt
1e7f78e5c0 ESP32: Add implementation of up_putc 2016-10-27 18:27:19 -06:00
Gregory Nutt
4b16a64212 sched/Kconfig: Add ranges to START_YEAR, MONTH, and DATE 2016-10-27 18:13:31 -06:00
Gregory Nutt
e6377641a8 sched/Kconfig: Add ranges to START_YEAR, MONTH, and DAY 2016-10-27 18:04:14 -06:00
Gregory Nutt
afcda29646 ESP32: Fix some warnings 2016-10-27 16:46:34 -06:00
Gregory Nutt
6ed5d4b20c ESP32: Fix some compilation errors 2016-10-27 16:36:22 -06:00
Gregory Nutt
c52ee46f5f ESP32: More logic added to serial driver. 2016-10-27 16:02:04 -06:00
Paul A. Patience
544f9ccf8a ez80: Add *PTR definitions to inttypes.h 2016-10-27 16:16:13 -04:00
Paul A. Patience
912fe06a86 Add architecture-specific inttypes.h 2016-10-27 16:01:38 -04:00
Gregory Nutt
6f7c03bd71 ESP32: Add initial serial driver. Taken from SAMV7; not fully converted. Does not yet compile. 2016-10-27 13:55:58 -06:00
Gregory Nutt
bc51fdb96c ESP32: Add GPIO signal mapping file 2016-10-27 11:04:24 -06:00
Gregory Nutt
cf73c9e1d1 EPS32: Add GPIO ROM interface definitions 2016-10-27 10:43:58 -06:00
Gregory Nutt
0967864c92 Correct clock initialization. The correct range for the month is 0-11 but is entered as 1-12 in the .config file 2016-10-27 08:32:23 -06:00
Vytautas Lukenskas
d9c2789253 LPC32xx serial: Fix a typo in ioctl TIOCSRS485 ioctl. 2016-10-27 07:00:32 -06:00
Gregory Nutt
76788040d5 ESP32: Add esp32_config.h 2016-10-26 15:45:03 -06:00
David Sidrane
314dd62dd5 stm32f76xx77xx_pinmap.h Missed one 2016-10-26 21:10:59 +00:00
David Sidrane
0bab23fb1b stm32_i2c.c Dejavu 2016-10-26 21:00:50 +00:00
Gregory Nutt
ca7ca0eb57 ESP32: More compilation issues 2016-10-26 12:59:31 -06:00
Gregory Nutt
0a96f3a8c8 ESP32: Fix some compilation issues 2016-10-26 12:50:10 -06:00
Gregory Nutt
650757bbf0 ESP32: Add GPIO support 2016-10-26 12:11:24 -06:00
Gregory Nutt
946045075e ESP32: Remove some long lines in header file 2016-10-26 08:23:09 -06:00
Gregory Nutt
6acc831e77 Remove duplicate select from Kconfig 2016-10-26 07:00:24 -06:00
Gregory Nutt
2c09279343 ESP32: Add beginning of GPIO register definition file 2016-10-26 06:27:02 -06:00
Sebastien Lorquet
f24701f5c7 Merge branch 'master' into stm32l4_pinouts 2016-10-26 13:31:54 +02:00
Sebastien Lorquet
68dae715b0 CHxN channels are always outputs 2016-10-26 13:21:57 +02:00
Gregory Nutt
b8462d3e04 ESP32: Need to take priority into account when allocating CPU interrupts 2016-10-25 16:27:58 -06:00
Gregory Nutt
fef7b414c5 Add logic to attach peripheral interrupt sources to CPU interrupts 2016-10-25 15:19:29 -06:00
Marc Rechte
483f012600 Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress. 2016-10-25 14:14:10 -06:00
Gregory Nutt
6756b44dc3 ESP32: Add framework to assign a a peripheral to a CPU interrupt 2016-10-25 13:16:05 -06:00
Gregory Nutt
d5fceadacd Xtensa: Fix some compilation issues 2016-10-25 12:34:23 -06:00
Gregory Nutt
2a59205ffa ESP32: Add CPU interrupt managmement logic; improve level interrupt decoding. 2016-10-25 12:02:53 -06:00
Gregory Nutt
c457e26f2a ESP32: Add UART register definition file 2016-10-25 08:35:07 -06:00
Gregory Nutt
04c6319e32 Merged in slorquet/nuttx/stm32l4_uarts (pull request #155) 
Enable and renames for 32l4 UARTs 4 and 5
 2016-10-25 13:09:17 +00:00
Sebastien Lorquet
27920eeae9 Enable and renames for 32l4 UARTs 4 and 5 2016-10-25 10:55:25 +02:00
Sebastien Lorquet
9be23d0c76 Fix i2c devices rcc registers 2016-10-25 10:53:24 +02:00
Max Kriegleder
1d50259358 STM32 F4 I2c: A new implementation of the STM32 F4 I2C bottom half. The commin I2C as this did not handled correctly in the current implementation (see also https://github.com/PX4/NuttX/issues/54). The changes almost exclusively affect the ISR. 2016-10-24 16:32:10 -06:00
Gregory Nutt
1dabbd8489 Costmetic changes 2016-10-24 16:18:30 -06:00
Gregory Nutt
3d4ce55ebd Oops.. a couple of hunks failed in the last patch. Hope I got them fixed correctly. 2016-10-24 15:25:40 -06:00
Gregory Nutt
7b7e352d6e ESP32: Add some peripheral configuration 2016-10-24 14:09:47 -06:00
Gregory Nutt
818b0171d7 ESP32: Clock configuration is not yet implemented. ESP32 will be running a XTAL frequency. 2016-10-24 07:30:11 -06:00
Gregory Nutt
4cf60022ca Xtensa: Correct some compile issues 2016-10-23 16:25:55 -06:00
Gregory Nutt
2514ddec8b Xtensa: Add NMI handler 2016-10-23 16:24:09 -06:00
Gregory Nutt
261eec110b Xtensa: Mismatched #endif 2016-10-23 14:19:08 -06:00
Gregory Nutt
9a9488ae92 ESP32: Fix heap initialization 2016-10-23 14:20:03 -06:00