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479 Commits

Author SHA1 Message Date
Abdelatif Guettouche
f7c5b467e1 arch/xtensa/src/esp32: Remove the EXPERIMENTAL config from the Wireless. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-10 12:31:17 -06:00
Abdelatif Guettouche
56713e0304 arch/xtensa/src/esp32/Make.defs: Don't condition including the low level 
WDT driver with the upper layer driver.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-10 12:31:17 -06:00
Abdelatif Guettouche
3ba5018b37 boards/xtensa/esp32: A bit of re-organisation in the ESP32 boards. 
Move the common files into the common directory.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-10 12:31:17 -06:00
Masayuki Ishikawa
409c65ce0b arch, sched: Fix global IRQ control logics for SMP 
Summary:
- This commit fixes global IRQ control logic
- In previous implementation, g_cpu_irqset for a remote CPU was
  set in sched_add_readytorun(), sched_remove_readytorun() and
  up_schedule_sigaction()
- In this implementation, they are removed.
- Instead, in the pause handler, call enter_critical_setion()
  which will call up_cpu_paused() then acquire g_cpu_irqlock
- So if a new task with irqcount > 1 restarts on the remote CPU,
  the CPU will only hold a critical section. Thus, the issue such as
  'POSSIBLE FOR TWO CPUs TO HOLD A CRITICAL SECTION' could be resolved.
- Fix nxsched_resume_scheduler() so that it does not call spin_clrbit()
  if a CPU does not hold a g_cpu_irqset
- Fix nxtask_exit() so that it acquires g_cpu_irqlock
- Update TODO

Impact:
- All SMP implementations

Testing:
- Tested with smp, ostest with the following configurations
- Tested with spresense:wifi_smp (NCPUS=2,4)
- Tested with sabre-6quad:smp (QEMU, dev board)
- Tested with maix-bit:smp (QEMU)
- Tested with esp32-core:smp (QEMU)
- Tested with lc823450-xgevk:rndis

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-12-10 08:33:42 +01:00
Abdelatif Guettouche
5d7428a385 arch/xtensa: Fix alignement when coloring and checking the stacks. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
7075c98978 arch/xtensa: Add a pseudo save area to be able to backtrace from 
interrupts

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
1f96f42f1e arch/xtensa/include/irq.h: Reserve some space for interptee's BSA. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
368d21a0b9 arch/xtensa/src/common/xtensa_context.S: Name A3 register the usual way. 
i.e. a3 instead of r3.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
5f9d9ba44c arch/xtensa/src/common/xtensa_context.S: Don't save CALL0 ABI 
callee-saved registers.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
716a29ebeb arch/xtensa/src/common/xtensa_backtrace.S: Update the comments to show 
the functions in play during the backtrace.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-12-09 09:44:04 -03:00
YAMAMOTO Takashi
58fdaa5c2d arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
Dong Heng
3bb9a42c6b xtensa/esp32: Refactor ESP32 Wi-Fi driver 2020-12-04 09:39:11 -03:00
Alan C. Assis
3865960b89 esp32/esp32-core: Fix #ifdef warning and update MM_SECTIONS 2020-12-01 21:36:07 +01:00
Abdelatif Guettouche
298e1ddebf arch/xtensa/src/common: Don't include ESP32 files directly, include them 
from the chip simlink.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-28 10:24:12 -03:00
Abdelatif Guettouche
967fbebcb9 arch/xtensa: Fix stack's alignment 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-28 10:24:12 -03:00
chao.an
32ba194372 style/code: remove unnecessary trailing whitespace 
N/A

Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-11-28 12:20:30 +01:00
chao.an
049c991d28 style/Kconfig: remove unnecessary trailing whitespace 
N/A

Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-11-28 12:20:30 +01:00
chao.an
c56785bd0d style/Makefile: remove unnecessary trailing whitespace 
N/A

Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-11-28 12:20:30 +01:00
chenwen
cb8d267230 xtensa/esp32: Announce the power management state change to feed watchdog 2020-11-25 10:53:05 -03:00
chenwen
2991418b2e xtensa/esp32: keep cpu clock while configured cpu clock is consistent with the default 2020-11-25 10:53:05 -03:00
chenwen
39322e1158 xtensa/esp32: Get CPU frequency from the rtc register 2020-11-25 10:53:05 -03:00
chenwen
1847a67e05 xtensa/esp32: Add sleep reject reasons 2020-11-25 10:53:05 -03:00
chenwen
5c5e0494f3 xtensa/esp32: Keep VDDSDIO power on if PSRAM is enabled 2020-11-25 10:53:05 -03:00
Masayuki Ishikawa
b237748f50 Revert "arch: xtensa: Fix the pause handler for SMP" 
This reverts commit 1914aac05f.
 2020-11-25 00:02:37 +01:00
YAMAMOTO Takashi
a24f66f31f arch/xtensa/src/esp32/esp32_spi.c: Fix a syslog format 2020-11-22 19:01:05 -08:00
YAMAMOTO Takashi
2aced358a8 arch/xtensa/src/esp32/esp32_wtd_lowerhalf.c: Fix a syslog format 2020-11-22 19:01:05 -08:00
Alan C. Assis
31c14726d5 Replace all assert() with DEBUGASSERT() 2020-11-22 07:43:04 -08:00
Alan C. Assis
3352d3863c esp32_himem: Fix issue that was preventing to map all free memory 2020-11-22 07:43:04 -08:00
Matias N
d5b6ec450f Parallelize depend file generation 2020-11-22 09:02:59 -03:00
Abdelatif Guettouche
fc5874ad75 arch/xtensa/src/common/xtensa_createstack.c: Fix stack alignement. 
The required stack alignement is 16 bytes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
56198992e5 arch/xtensa/src/common/xtensa_windowspill.S: Remove the #if 0 to include 
the spill function.  It's now needed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
f80ed10f97 arch/xtensa/src/esp32/chip_memory.h: Chip implementation of memory test 
functions needed by the arch.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
9d28687b6f arch/xtensa: Print backtrace on assertions. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-21 11:31:46 -03:00
Masayuki Ishikawa
1914aac05f arch: xtensa: Fix the pause handler for SMP 
Summary:
- Apply the same logic added to cxd56_cpupause.c

Impact:
- SMP only

Testing:
- Tested with esp32-core:smp (QEMU)
- Run smp and ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-11-20 00:49:25 -08:00
Abdelatif Guettouche
79b07e6c94 arch/xtensa/src/esp32/esp32_gpio.c: Fix GPIO IRQ assert condition. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-19 07:38:59 -08:00
YAMAMOTO Takashi
b8e559bb2e xtensa: Add _intmax_t and _uintmax_t 2020-11-19 00:49:56 -08:00
YAMAMOTO Takashi
c18f074830 xtensa: Change _int32_t from long to int to match the compiler 
PRIx32 etc is already "x" etc.
 2020-11-19 00:49:56 -08:00
Alan C. Assis
50e1a49c6e Fix the SPIRAM_BANKSWITCH that was defined incorrectly 2020-11-18 22:21:53 +01:00
Alan C. Assis
f09d103528 xtensa/esp32: Add high memory support to work with PSRAM 2020-11-18 22:21:53 +01:00
Abdelatif Guettouche
2d7e063eb0 arch/xtensa/src/esp32/esp32_tim.c: Fix build when debug is enabled. 
A non-existent variable was used.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-17 18:46:06 -08:00
YAMAMOTO Takashi
95a3db7629 arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a type mismatch 2020-11-16 08:29:00 -08:00
YAMAMOTO Takashi
dbb81dfd5d arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a printf format 2020-11-16 08:29:00 -08:00
Sara Souza
e6b6f06d22 xtensa/esp32: added support to automonitor by capture 2020-11-13 13:01:40 -03:00
Dong Heng
bfb5214ef8 xtensa/esp32: Add SPI Flash hardware encryption I/O support 2020-11-13 08:37:59 +01:00
Sara Souza
b9d44017cf xtensa/esp32: Watchdog support (MWDTs) 2020-11-08 13:05:24 -03:00
Abdelatif Guettouche
2ac2ce55d2 arch/xtensa/src/esp32/esp32_allocateheap.c: Fix the memory regions with 
regards to the data used by the ROM.
Static alloaction sections should end at the begining of the ROM data.
The rest of memory (End of ROM data --> End of DRAM) is added to the
heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-11-06 18:36:41 -03:00
Alan C. Assis
2f612a2077 xtensa/esp32: Move #if defined(SPIRAM) to inside function 2020-11-06 16:19:48 +01:00
Alan C. Assis
d11f02d772 xtensa/esp32: Fix remaining SEPARATE typo 2020-11-06 16:19:48 +01:00
Alan C. Assis
6c37d9ff80 xtensa/esp32: Avoid init PSRAM when SPIRAM is not enabled 2020-11-06 16:19:48 +01:00
YAMAMOTO Takashi
6bc93b87b0 xtensa inttypes.h: Remove PRI/SCN macros for fast and least types 2020-11-05 18:49:22 -08:00