Commit Graph

22120 Commits

Author SHA1 Message Date
Eren Terzioglu
c9f5ae5fa4 esp32[s3]: Add nuttx toolchain support on mcuboot 2024-07-16 10:30:56 +08:00
Eren Terzioglu
024e95875a esp32: Add nuttx toolchain support on mcuboot 2024-07-16 10:30:56 +08:00
Eren Terzioglu
553b1f5f5e esp32[c3|c6|h2]: Add nuttx toolchain support on mcuboot 2024-07-16 10:30:56 +08:00
adriendesp
baf52268cc arch/xmc4: Added pwm driver 2024-07-15 16:14:55 -03:00
Peter van der Perk
622b6d234a s32k1xx: FlexIO I2C master driver 2024-07-15 10:06:55 -03:00
Raman Gopalan
ef271b8fe2 at32uc3a0: Initial work for SimpleMachines' Mizar32-A 2024-07-15 20:46:41 +08:00
Yanfeng Liu
8bdc975abb riscv/cmake: fix Toolchain.cmake issue
This fixes the following issue when configuring canmv230:master
with Ubuntu stock toolchain and cmake 3.22:

```
CMake Error at .../arch/risc-v/src/cmake/Toolchain.cmake:218 (if):
  if given arguments:
    "STREQUAL" "GNU_RVG"
  Unknown arguments specified
```

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-07-15 19:41:03 +08:00
hujun5
a4fece3450 spin_lock: inline spin_lock
test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
2024-07-15 02:29:30 +08:00
zouboan
ae8ce535f3 arm64/arm64_boot.c: Fix exception caused by accesses to ICC_SRE_EL3 when GICv3 was not implemented 2024-07-15 02:26:40 +08:00
Huang Qi
e047ab9c70 riscv: Initial support for debug trigger module
Implement up_debugpoint_add/up_debugpoint_remove for riscv.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-07-14 20:32:19 +08:00
Eren Terzioglu
c15c0d1a78 esp32[h2]: Add MCUBoot support 2024-07-14 11:38:29 +08:00
Eren Terzioglu
0f0c258fa2 esp32[c6]: Add MCUBoot support 2024-07-14 11:38:29 +08:00
zouboan
ea532cb11a arch/arm64: add initial support for ZYNQ MPSOC
arch/arm64: add initial support for ZYNQ MPSOC

arch/arm64: add initial support for ZYNQ MPSOC
2024-07-13 20:51:39 -03:00
Yanfeng Liu
211e2cd8b9 riscv/k230: revise canmv230:pnsh
This revises canm230:pnsh in a few ways:

- adjusting linker scripts structure,
- asserting PMP setting results,
- adjusting configs for both k230d and k230 devices.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-07-13 07:21:22 -03:00
Michal Lenc
5c48944e0b samv7: fix compile warning in PWM and UART drivers
The following warnings is fixed:

chip/sam_pwm.c:961:12: warning: unused variable 'regval' [-Wunused-variable]
  961 |   uint32_t regval;

chip/sam_serial.c: In function 'sam_dma_txavailable':
chip/sam_serial.c:2264:7: warning: unused variable 'rv' [-Wunused-variable]
 2264 |   int rv;

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-07-13 11:37:06 +02:00
simbit18
f12c4e05cc Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
Replace help => ---help---
Remove extra TABs
2024-07-12 06:37:59 +08:00
chao an
d4024c8388 arch/armv8-r: update g_running_tasks before context switch
fix invalid running_task() in assertion logic

Signed-off-by: chao an <anchao@lixiang.com>
2024-07-12 00:39:37 +08:00
simbit18
2f8560e838 tools/ci: enable avr32dev1 build
removed in the tools/ci/testlist/other.dat file the entries
 -avr32dev1:nsh
 -avr32dev1:ostest

avr32_bringup.c
Fix  Error: ./avr32_bringup.c:54:4: error: #warning "Not Implemented"

comment out directive '#warning'
/* #warning "Not Implemented" */

avr_doirq.c

fix avr32/avr_doirq.c:117: error: assignment discards qualifiers from pointer target type
  regs = g_current_regs; -> regs = (uint32_t *)g_current_regs;
2024-07-12 00:39:21 +08:00
chao an
95a9facf3a arch/armv8-r: new config to set SPIs Configuration to edge-triggered
Configure all SPIs(Shared Peripheral Interrupts) as edge-triggered by default

Signed-off-by: chao an <anchao@lixiang.com>
2024-07-11 15:35:41 +08:00
Henry Rovner
091372069c risc-v/bl808: Add SPI driver
This commit implements a driver for SPI0 and SPI1 on the BL808 and introduces an accompanying example configuration.
2024-07-11 11:32:24 +08:00
chao an
b191153cdc arch/armv8-r: fix typos in config
replace ARMV7R to ARMV8R

Signed-off-by: chao an <anchao@lixiang.com>
2024-07-10 18:41:13 -03:00
Michal Lenc
a91d40e0e8 samv7: fix CAN FD configuration
Larger RX/TX buffers might be required for both FD and FD_BSW modes.
Default bit timing values are also changed since the original ones
did not provide correct results for default SAMv7 board clock selection
(150 MHz clock frequency). The current values provide correct bit timing
with sample point as close to 87.5 %.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-07-10 11:33:03 -03:00
Michal Lenc
e16ee4dba3 can: enhance bit timing ioctl to set both nominal and data bit timing
This adds field type to canioc_bittiming_s structure that allows
to set/obtain bit timing for both CAN CC and CAN FD.
CANIOC_GET_BITTIMING is now bidirectional: user specifies type field
and gets other fields from the controller.

The commit also updates current CAN FD capable controllers using the
ioctl. The type is not checked for classical CAN only controllers
and nominal bit timing is returned regardless of type value.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-07-10 11:33:03 -03:00
Eero Nurkkala
48cf91a7be arm64/imx9: ccm: add default clk init
This adds enablers for setting various clocks to some default
values. Also, this provides helpers to grant nonsecure access
to a number of clocks. Bootloader may utilize these to make
the system boot in a deterministic manner.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-07-09 21:14:11 -03:00
xuxingliang
848eca04ca arch/arm64: allow to use custom idle
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-07-09 19:36:48 +08:00
xuxingliang
94387630c9 arch/arm64: remove not used idle trace
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-07-09 19:36:48 +08:00
Lwazi Dube
b881868f19 arch/arm/sama5: Fix typos in ohci driver comments. 2024-07-09 09:20:13 +08:00
Huang Qi
d0210c1174 riscv_tcbinfo: Fix register ordering for PC
X0 is always 0 but still should be transfered to the client, but it don't existed in thread context, use any other register for it, and its value will be omitted by gdb client.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-07-08 21:13:25 +08:00
chao an
cef9addbbb sim/cmake: enable garbage collection of unused input sections
enable --gc-sections for linker
enable -ffunction-sections -fdata-sections for compiler

Signed-off-by: chao an <anchao@lixiang.com>
2024-07-06 11:31:40 +08:00
chao an
9915b80e30 arch/sim: add custom data section support
The link script of NuttX Simulator is generated through compilation
options. This PR will support configure special data sections in
kconfig to meet the support of 3rd party applications.

we need to follow the syntax of linker script. In 3rd-party applications, some data will be labeled as section:

| a.c:
| struct task_s a __attribute__((section(".data.custom.taska")));
| b.c:
| struct task_s b __attribute__((section(".data.custom.taskb")));

Data of the same type struct can be placed in a fixed location to reduce the overhead caused by searching:

|   .data           :
|   {
|     _custom_data_table_start = .;
|     KEEP(*(.data.custom.*))
|     _custom_data_table_end = .;
|   }

Such section declare can be configured via Kconfig in the PR:

| CONFIG_SIM_CUSTOM_DATA_SECTION=" .data : { _custom_data_table_start = .; KEEP(*(.data.custom.*)) _custom_data_table_end = .; } "

Signed-off-by: chao an <anchao@lixiang.com>
2024-07-05 16:45:36 -03:00
Jukka Laitinen
b008653ac0 arch/arm64/src/imx9/imx9_lowputc.c: Fix an arithmetic sign error in divisor calculation
In the algorithm there is a subtraction (int - unsigned), which results (potentially overflowed)
unsigned.

Passing this to macro ABS and the assigning to int doesn't work ( unsigned is always >= 0 ).

Fix this by replacing (dangerous) ABS macro with stdlib's standard "int abs(int)"
and change the substraction to (int - int).

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-07-05 21:47:07 +08:00
Jukka Laitinen
31644ec0f5 arch/arm64/src/imx9: Add an mtd driver for NOR flash on FlexSPI interface
This is an initial FlexSPI SPI NOR MTD driver for IMX9

This supprts M25P SPI NOR on FlexSPI for now, and can later be extended to other
SPINOR devices if needed. The following configurations are needed to use this driver:
  CONFIG_IMX9_FLEXSPI_NOR=y
  CONFIG_MTD_M25P=y

In addition, board initialization logic needs to call the imx9_flexspi_nor_initialize
to receive a pointer to the mtd device.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Co-authored-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-07-05 21:46:47 +08:00
Jouni Ukkonen
31a6a4f5d0 imx9: Add flexspi support, ported from imxrt
Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
2024-07-05 21:46:47 +08:00
Henry Rovner
a83e7ced77 ox64: Add adc example config 2024-07-05 13:17:02 +08:00
Henry Rovner
8493273c2c risc-v/bl808: Add GPADC character driver
This commit implements a character driver for the general purpose ADC of the BL808, based on the hardware scanning functionality. The driver supports setting different conversion resolutions and the order of channels to be scanned via menuconfig.
2024-07-05 13:17:02 +08:00
Filipe Cavalcanti
0c63840b18 arch/risc-v: add support for capture driver on ESP32C6 and ESP32H2. 2024-07-04 18:24:50 -03:00
Daniel P. Carvalho
3e4a16d851 arch/arm/stm32: Fix EXTI lines definitions for STM32G47XX. 2024-07-04 18:23:51 -03:00
Michal Lenc
f1ef5daa92 samv7/sam_mcan.c: fix TSEG1, TSEG2 and SJW compile warnings for MCAN1
Following warnings were caused by incorrect naming of few defines.

chip/sam_mcan.c:415:7: warning: "MCAN1_NTSEG1" is not defined, evaluates to 0 [-Wundef]
  415 | #  if MCAN1_NTSEG1 > 63
      |       ^~~~~~~~~~~~
chip/sam_mcan.c:418:7: warning: "MCAN1_NTSEG2" is not defined, evaluates to 0 [-Wundef]
  418 | #  if MCAN1_NTSEG2 > 15
      |       ^~~~~~~~~~~~
chip/sam_mcan.c:421:7: warning: "MCAN1_NSJW" is not defined, evaluates to 0 [-Wundef]
  421 | #  if MCAN1_NSJW > 15

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-07-04 18:23:13 -03:00
Almir Okato
652f4f1fe1 esp32[s2|s3]: add volatile bitfields compilation flag
This compilation flag was added in the same way as done for esp32
in order to avoid unexpected behaviors when accessing registers
using struct bitfields.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-07-04 18:22:24 -03:00
Almir Okato
593dc946d1 esp32: add simple boot support
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.

This commit also removes deprecated code and makes this bootloader
configuration as default for esp32 targets and removes the need
for running 'make bootloader' command for it.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-07-04 18:22:24 -03:00
Almir Okato
6ec690cbfc esp32[s2|s3]: move rom segments mapping to espressif common folder
Move and unify map_rom_segments function called when starting
Simple Boot and MCUboot compatible images.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-07-04 18:22:24 -03:00
Peter van der Perk
6b79aea0cf imxrt: Correctly update PLL, bit has to toggled instead of being set 2024-07-04 13:00:19 -03:00
buxiasen
c641148bc4 sim: make possible keep ubsan and bypass feature
sometimes ubsan work with asan trigger a mistake report, make it
possible to export library with ubsan, and bypass runtime feature.

Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-07-04 21:36:02 +08:00
nuttxs
8cd207e1b1 ESP32: emac initialization adding cpu id 2024-07-03 22:54:28 +08:00
Marco Casaroli
b8c1ce45e6 refactor(esp32-qemu-openeth): use lower half driver interface
This current driver does not handle well netpkts used in the
write buffers.

I learned about this document:

https://github.com/apache/nuttx/blob/master/Documentation/components/net/netdriver.rst

After I ported and contributed the original driver.

However from the document, I understand these types of drivers are
simpler to implement and I could simplify the driver and handle
correctly the TCP write buffers.
2024-07-03 08:52:14 -03:00
p-szafonimateusz
8682321d0c arch/x86_64: addrenv support
Add addrenv support for x86_64.
For now we support mapping on PT level, so PD, PDT and PML4 are static

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
0200a48f72 arch/intel64/intel64_map_region.c: use MMU api to implement up_map_region
use new MMU api to implement up_map_region().

The new implementation support maping over 0xffffffff but requires CONFIG_MM_PGALLOC=y

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
b1f3435d22 arch/intel64: add support for MM_PGALLOC
add support for MM_PGALLOC for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
e0183927b4 arch/x86_64: add MMU interface
add MMU api for x86_64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00
p-szafonimateusz
53d112fa95 x86_64: add ELF support
add arch_elf64.c for x86_64, ported from sim/x86

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-07-03 17:40:53 +08:00