Dave Marples
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d0cda60442
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In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts.
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2018-12-03 17:41:59 -06:00 |
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Gregory Nutt
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cb374e6e62
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arch/: Clean up some naming and spacing.
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2018-06-20 15:38:06 -06:00 |
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Juha Niskanen (Haltian)
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c04c49dac0
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Add support for the STM32F09X family.
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2017-04-21 08:23:25 -06:00 |
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Gregory Nutt
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d0ec395c42
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Correct some spacing and some unused definition in some irq.h header files.
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2017-04-20 12:39:21 -06:00 |
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Gregory Nutt
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27e212a291
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Nucleo-F072RB: Various fixes to get the first clean build.
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2017-04-18 10:37:05 -06:00 |
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Gregory Nutt
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8b157b034d
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STM32F0: Fixes to get STM32F0-Discovery build again after changes to support the STM32F07x
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2017-04-17 17:13:32 -06:00 |
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Gregory Nutt
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2c01aaad59
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STM32F0: Add basic support for STM32F07x family
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2017-04-17 16:54:07 -06:00 |
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Gregory Nutt
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c910334ced
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Make sure that Alan is listed as author in new files.
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2017-04-14 08:34:37 -06:00 |
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Alan Carvalho de Assis
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c3e0ec369f
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Add basic support for STM32F0
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2017-04-14 08:34:36 -06:00 |
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