External JLink is required to program the board, so the console via RTT
is available anyway. It is much more convenient to use than soldering the
P4 connector and working with an external UART converter.
* build-globals.sh
- Only look in the nuttx for external symbols used when loading
dynamic shared objects
* include/elf64.h
- Correct the type of fields in the Elf64_Phdr structure
* libs/libc/dlfcn/lib_dlclose.c
- Distinguish between ET_DYN and other objects as the former
has both text and data in a single allocation to reserve
GOT offsets
* libs/libc/dlfcn/lib_dlopen.c
- Code formatting
* libs/libc/modlib/modlib_bind.c
- Distinguish between relocation entry sizes by section type
- Handle RELA style relocations
* libs/libc/modlib/modlib_globals.S
- Formatting fixes
- Symbols should not be weak - they exist or they don't
* include/nuttx/lib/modlib.h
- Add an inidcator to module_s to distinguish between ET_DYN and other
* libs/libc/modlib/modlib_load.c
- ET_DYN objects need to keep the relative displacement between the text
and data sections due to GOT references from the former to the latter.
This also implies that linking may require modification from the default
for the shared objects being produced. For example, default alignment may
mean nearly 64K of wasted space.
* libs/libc/modlib/modlib_unload.c
sched/module/mod_rmmod.c
- Distingusih between freeing of ET_DYN storage and other as the former
is a single allocation.
* libs/libc/modlib/mod_insmod.c
- Cater for ET_DYN objects having init and preinit sections
Fix:
```
riscv-none-elf-ld: sotest.o: ABI is incompatible with that of the selected emulation:
target emulation `elf64-littleriscv' does not match `elf32-littleriscv'
riscv-none-elf-ld: failed to merge target specific data of file sotest.o
```
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
'rcS' will case files that has duplicate name been replaced.
so on the Mac platform we use 'q' instead of 'r' to achieve an
effect similar to '-P'
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
The board-level GPIO support is different from the already existing
button and LEDC support because it enable us to register the GPIO
pins as devices in `/dev/gpioX`. Some applications are able to use
this interface to read and write the GPIO pins.
Documentation was added regarding its usage. Please check
`Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst`
to fix the following linker error:
/usr/bin/ld: nuttx.rel: in function `aes_encrypt_xform':
/github/workspace/sources/nuttx/crypto/xform.c:509: undefined reference to `aes_encrypt'
/usr/bin/ld: nuttx.rel: in function `aes_decrypt_xform':
/github/workspace/sources/nuttx/crypto/xform.c:514: undefined reference to `aes_decrypt'
/usr/bin/ld: nuttx.rel: in function `aes_setkey_xform':
/github/workspace/sources/nuttx/crypto/xform.c:519: undefined reference to `aes_setkey'
/usr/bin/ld: nuttx.rel: in function `aes_ctr_crypt':
/github/workspace/sources/nuttx/crypto/xform.c:566: undefined reference to `aes_encrypt'
/usr/bin/ld: nuttx.rel: in function `aes_ctr_setkey':
/github/workspace/sources/nuttx/crypto/xform.c:585: undefined reference to `aes_setkey'
/usr/bin/ld: nuttx.rel: in function `aes_ofb_encrypt':
/github/workspace/sources/nuttx/crypto/xform.c:694: undefined reference to `aes_encrypt'
/usr/bin/ld: nuttx.rel: in function `aes_ofb_setkey':
/github/workspace/sources/nuttx/crypto/xform.c:706: undefined reference to `aes_setkey'
/usr/bin/ld: nuttx.rel: in function `aes_cfb8_encrypt':
/github/workspace/sources/nuttx/crypto/xform.c:733: undefined reference to `aes_encrypt'
/usr/bin/ld: nuttx.rel: in function `aes_cfb8_decrypt':
/github/workspace/sources/nuttx/crypto/xform.c:751: undefined reference to `aes_encrypt'
/usr/bin/ld: nuttx.rel: in function `aes_cfb128_encrypt':
/github/workspace/sources/nuttx/crypto/xform.c:765: undefined reference to `aes_encrypt'
/usr/bin/ld: nuttx.rel: in function `aes_cfb128_decrypt':
/github/workspace/sources/nuttx/crypto/xform.c:781: undefined reference to `aes_encrypt'
/usr/bin/ld: nuttx.rel: in function `aes_gmac_setkey':
/github/workspace/sources/nuttx/crypto/gmac.c:135: undefined reference to `aes_setkey'
/usr/bin/ld: /github/workspace/sources/nuttx/crypto/gmac.c:143: undefined reference to `aes_encrypt'
/usr/bin/ld: nuttx.rel: in function `aes_gmac_final':
/github/workspace/sources/nuttx/crypto/gmac.c:195: undefined reference to `aes_encrypt'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
1. the defconfig is based on nuttx/boards/sim/sim/configs/nsh/defconfig
2. make the option enabled by default that needed by open posix
testsuite, such as PTHREAD_SPINLOCK, FS_AIO, TESTING_LTP etc.
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
Some SD card connectors do not have separate card detection pin. In that
case card detection has to be done on CD/DAT3 data line. This means
software (i.e. architecture level driver) has to take care of pin
configuration switching (pin has to be set as data pin in case of
transfer and as interrupt card detection pin when there is no action
on data line).
This commit adds CD/DAT3 line card detection support for SAMv7 MCU.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
The class device only handles descriptor information specific to the class,
and shared descriptor information is passed through parameters and
handled by the composite driver.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Provide initial support for audio through the I2S peripheral to the
CS4344 audio codec on ESP32-S3-DevKitC-1 board.
Please check documentation for usage examples.
A usbdev has only one serial string, so use a unique macro to control it.
For boards that enable board serial string using COMPOSITE_BOARD_SERIALSTR,
PL2303_BOARD_SERIALSTR, CDCACM_BOARD_SERIALSTR, USBADB_BOARD_SERIALSTR,
USBMSC_BOARD_SERIALSTR, and RNDIS_BOARD_SERIALSTR, they need to be replaced
with BOARD_USBDEV_SERIALSTR.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
SiFive document: "ECC Error Handling Guide" states:
"Any SRAM block or cache memory containing ECC functionality needs to be
initialized prior to use. ECC will correct defective bits based on memory
contents, so if memory is not first initialized to a known state, then ECC
will not operate as expected. It is recommended to use a DMA, if available,
to write the entire SRAM or cache to zeros prior to enabling ECC reporting.
If no DMA is present, use store instructions issued from the processor."
Clean the cache at this early stage so no ECC errors will be flooding later.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
When I try to set priorities in certain programs, such as init_priority(HIGH_PRIORITY), I've noticed that during linking, there's no guarantee that the programs will be compiled in the sequence I've specified based on priority. This has led to some runtime errors in my program.
I realized that in the ld file, when initializing dynamic arrays, there's no assurance of initializing init_array.* before init_array. This has resulted in runtime errors in the program. Consequently, I've rearranged the init_array.* in the ld file of NuttX to be placed before init_array and added a SORT operation to init_array.* to ensure accurate initialization based on priorities during linking.
update LIBFDT to LIBC_FDT
update CONFIG_LIBFDT_DTC_VERSION to CONFIG_LIBC_FDT_DTC_VERSION
move dtc source code to fdt/dtc
move version_gen.h from apps/system/fdt to current dir
Signed-off-by: liaoao <liaoao@xiaomi.com>
This patch starts to implement the ability to build Meadow.OS for the Meadow F7 board with the NuttX mainline. It will be followed by more patches, progressively enabling full Meadow.OS functionality. This configuration is a work in progress.
The Meadow.OS source code is needed to build this configuration. Meadow.OS is being open-sourced under the Apache 2.0 license. A prototype of the source code release and integration with NuttX is at https://github.com/WildernessLabs/Meadow.OS/tree/prototype
This is the second revision of this patch, as the first one (https://github.com/apache/nuttx/pull/9997) was causing build issues on NuttX CI and was reverted.
This should only impact the Meadow F7 board configurations.
No testing to be done, as the configuration is under development.
Move SCU-specific ak09912 sensor into spresense board layer.
Rename a function name to register SCU sensor driver
from ak09912_register to ak09912_scu_register.
Pinephone Pro port just nsh
Status:
booting till GICD / IRQ issue
style cleanups
start to fix style checks
revert offset
whitespaces
revert a64 bringup file
prob last cleanup
more cleanups
remove dts
move changes from a64 hardware specific folders to rk3399
undo common changes (except head.s)
revert gitignore
missing irq.h and rk3399_serial.c need to finish cleaning them up
WIP
add source for load address
make debug print hex again add board include
Pinephone Pro port just nsh
Status:
booting till GICD / IRQ issue
style cleanups
start to fix style checks
revert offset
whitespaces
revert a64 bringup file
prob last cleanup
more cleanups
remove dts
move changes from a64 hardware specific folders to rk3399
undo common changes (except head.s)
revert gitignore
missing irq.h and rk3399_serial.c need to finish cleaning them up
WIP
add source for load address
remove ccache, add board memory map
remove board reset
Summary:
- I noticed that device discovery for virtio-mmio devices does not
work without bus=virtio-mmio-bus.x option. Without this option,
qemu assigns the virtio device into the virtio-mmio space
in reverse order automatically.
- To fix this issue, we must specify the correct numbers for the
target machines. (i.e. arm32/64->32, rv32/64->8)
Impact:
- None
Testing:
- Tested with qemu-7.2.4
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Decreasing the value may increase DQ/DQS window size. Keep the default value
(1) for the existing board configurations.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Adds a platform specific implementation for tickless schedular operation. This includes:
- Tickless operation for vexriscv cores.
- Tickless operation for vexriscv-smp cores.
- Ticked operation for vexriscv-smp cores.
Ticked operation for vexriscv core has been refactored.
Additional default configuration added to demonstrate operation.
Both tickless and ticked options use Litex timer0 for scheduling intervals. This is significantly faster than interfaceing with the risc-v mtimer through opensbi.
ESP32-S3 has only one 2.4 GHz ISM band RF module, which is shared
by Bluetooth and Wi-Fi, so Bluetooth can’t receive or transmit data
while Wi-Fi is receiving or transmitting data and vice versa.
Under such circumstances, ESP32-S3 uses the time-division
multiplexing method to receive and transmit packets.
Supported external SDRAM (MT48LC4M32B2B5-6AIT:L) on STM32H745I-DISCO dev board.
Though MT48LC4M32B2B5-6AIT:L SDRAM itself provides 32-bit data bus, STM32H745I-DISCO board
routes only DQ[15:0] bits. Thus only half of the memory can be accessed: the accessible memory
configuration is only 1 Meg x 16 x 4 banks instead of 1 Meg x 32 x 4 banks.
Thus the accessible memory size is 8 MBytes.
Testing:
nsh> ramtest -a 0xD0000000 -s 8388608
RAMTest: Marching ones: d0000000 8388608
RAMTest: Marching zeroes: d0000000 8388608
RAMTest: Pattern test: d0000000 8388608 55555555 aaaaaaaa
RAMTest: Pattern test: d0000000 8388608 66666666 99999999
RAMTest: Pattern test: d0000000 8388608 33333333 cccccccc
RAMTest: Address-in-address test: d0000000 8388608
nsh>
Adding the CONFIG_ARCH_PERF_EVENTS configuration to enable
hardware performance counting，solve the problem that some platform
hardware counting support is not perfect, you can choose to use
software interface.
This is configured using CONFIG_ARCH_PERF_EVENTS, so weak_functions
are removed to prevent confusion
To use hardware performance counting, must:
1. Configure CONFIG_ARCH_PERF_EVENTS, default selection
2. Call up_perf_init for initialization
Signed-off-by: wangming9 <wangming9@xiaomi.com>
The default mode for Rpmsgdev is to read/write data as long as possible for
caller, this mode does not apply to tun devices, tun devices can read and
write only one complete ip packet at a time.
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
Summary
Qemu virt board can choice CPU core with boot parameter
and we need to add Konfig option for choice
the change do this
Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
Sumary
add hostfs support for arm64, it's a copy
from arm32.
Note:
it's not support for opendir and readdir, command
like ls will not work.
Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
1. virtio devics/drivers match and probe/remote mechanism;
2. virtio mmio transport layer based on OpenAmp (Compatible with both
virtio mmio version 1 and 2);
3. virtio-serial driver based on new virtio framework;
4. virtio-rng driver based on new virtio framework;
5. virtio-net driver based on new virtio framework
(IOB Offload implementation);
6. virtio-blk driver based on new virtio framework;
7. Remove the old virtio mmio framework, the old framework only
support mmio transport layer, and the new framwork support
more transport layer and this commit has implemented all the
old virtio drivers;
8. Refresh the the qemu-arm64 and qemu-riscv virtio related
configs, and update its README.txt;
New virtio-net driver has better performance
Compared with previous virtio-mmio-net:
| | master/-c | master/-s | this/-c | this/-s |
| :--------------------: | :-------: | :-------: | :-----: | :-----: |
| qemu-armv8a:netnsh | 539Mbps | 524Mbps | 906Mbps | 715Mbps |
| qemu-armv8a:netnsh_smp | 401Mbps | 437Mbps | 583Mbps | 505Mbps |
| rv-virt:netnsh | 487Mbps | 512Mbps | 760Mbps | 634Mbps |
| rv-virt:netnsh_smp | 387Mbps | 455Mbps | 447Mbps | 502Mbps |
| rv-virt:netnsh64 | 602Mbps | 595Mbps | 881Mbps | 769Mbps |
| rv-virt:netnsh64_smp | 414Mbps | 515Mbps | 491Mbps | 525Mbps |
| rv-virt:knetnsh64 | 515Mbps | 457Mbps | 606Mbps | 540Mbps |
| rv-virt:knetnsh64_smp | 308Mbps | 389Mbps | 415Mbps | 474Mbps |
Note: Both CONFIG_IOB_NBUFFERS=64, using iperf command, all in Mbits/sec
Tested in QEMU 7.2.2
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
NETUTILS_IPERF and CONFIG_DEFAULT_SMALL conflict
Loaded configuration '.config'
Configuration saved to '.config'
warning: LIBC_FLOATINGPOINT (defined at libs/libc/stdio/Kconfig:55) has direct dependencies !LIBM_NONE with value n, but is currently being y-selected by the following symbols:
- NETUTILS_IPERF (defined at /home/baerg/code/NXOS/apps/netutils/iperf/Kconfig:6), with value y, direct dependencies NET (value: y), and select condition NET (value: y)
make: *** [tools/Unix.mk:680: olddefconfig] Error 1
ERROR: failed to refresh
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
This PR adds support for PINE64 Star64 64-bit RISC-V SBC, based on StarFive JH7110 SoC. Most of the code is derived from NuttX for QEMU RISC-V (Kernel Mode). [The source files are explained in the articles here](https://github.com/lupyuen/nuttx-star64)
Modified Files:
boards/Kconfig: Added Star64 board
New Files in boards/risc-v/jh7110/star64:
src/jh7110_appinit.c: Startup Code
include/board.h: Star64 Definitions
include/board_memorymap.h: Memory Map
src/etc/init.d/rc.sysinit, rcS: Startup Script
src/.gitignore: Ignore the tmp filesystem
scripts/ld.script: Linker Script
scripts/Make.defs: Star64 Makefile
src/Makefile: Star64 Makefile
Kconfig: Star64 Config
configs/nsh/defconfig: NSH Build Config
Updated Documentation:
introduction/detailed_support.rst: Added StarFive JH7110 SoC and Star64 SBC
platforms/risc-v/jh7110/index.rst: New page for StarFive JH7110 SoC
platforms/risc-v/jh7110/boards/star64/index.rst: Building and booting NuttX for Star64
VELAPLATFO-12536
This provides the initial hooks for Flattened Device Tree support
with QEMU RV. It also provides a new procfs file that exposes the
fdt to userspace much like the /sys/firmware/fdt endpoint in Linux.
See https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-firmware-ofw
Nodes in the fdt are not yet usable by the OS.
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
Signed-off-by: liaoao <liaoao@xiaomi.com>
We can use the driver in nuttx to download
files with debugger
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: chao an <anchao@xiaomi.com>
replace *(.init_array .init_array.*) with KEEP(*(.init_array .init_array.*)).
The KEEP statement within a linker script will instruct the linker to keep the specified section, even if no symbols inside it are referenced. This statement is used within the SECTIONS section of the linker script. This becomes relevant when garbage collection is performed at link time, enabled by passing the --gc-sections switch to the linker. The KEEP statement instructs the linker to use the specified section as a root node when creating a dependency graph, looking for unused sections. Essentially forcing the section to be marked as used.
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
- Added Wi-Fi related symbols to the kernel-space linker;
- Allocate more RAM to the kernel (to be useb by the Wi-Fi driver).
- Create a specific defconfig.
Instead of setting kernel/user space instruction and data ROM as
hard-coded values on linker, set them according to the max size
of the kernel image set by CONFIG_ESP32S3_KERNEL_IMAGE_SIZE. This
is done by making KIROM, UIROM, KDROM and UDROM dependent on the
kernel size value. Also, override CONFIG_NUTTX_USERSPACE config
according to CONFIG_ESP32S3_KERNEL_IMAGE_SIZE by using a custom
PREBUILD definition.
boards/arm/cxd56xx/drivers/sensors/bmi160_scu.c: fix incorrect comments to the Right of Statements.
drivers/sensors/ak09912.c: fix incorrect function description ak09912_putreg8 and ak09912_getreg8
Fix an issue that GPO pins is not iniitalized by watchdog reboot.
If the watchdog expires during LTE is in use, it causes the LTE
to remain powered on and fails to launch after reboot.
drivers/sensors/bme680.c: The bme680 driver
sensor.h: Added new type of sensor (Gas) to be used for retrieving the bme680 data
esp32/common/src/esp32_bme680.c: bme680 support on esp32
esp32/esp32-sparrow_kit/esp32_bringup.c: added support for the bme680
esp32/esp32-sparrow-kit/configs/nsh/defconfig: fixed defconfig ci problem
Signed-off-by: simonatoaca <simona.alexandra2000@gmail.com>
esp32-sparrow-kit: Fixed defconfig
Signed-off-by: simonatoaca <simona.alexandra2000@gmail.com>
Code is now C89 compatible
Signed-off-by: simonatoaca <simona.alexandra2000@gmail.com>
Reused already defined sensor data structs by registering every sub-sensor separately
Signed-off-by: simonatoaca <simona.alexandra2000@gmail.com>
Implemented suggestions
Signed-off-by: simonatoaca <simona.alexandra2000@gmail.com>
Basically, it reserves an area of the RTC memory to preserve the
RTC timer.
Please refer to:
fa76c82a5b
This commit also removes the rtc.dummy section because C3, C6 and
H2 don't need to skip it once the region is accessed by the same
address space using the instruction and data bus.
