Commit Graph

19728 Commits

Author SHA1 Message Date
Lucas Saavedra Vaz
cc04e2137a esp32/i2s: Reduce MCLK multiple to support existing boards 2022-10-20 00:40:24 +08:00
raiden00pl
a3db5fe24b stm32f7: add SocketCAN support 2022-10-20 00:08:36 +08:00
SPRESENSE
c48feac0e9 arch: cxd56xx: gnss: Fix compile error
Fix a compile error caused by
d1d4633 Replace nxsem API when used as a lock with nxmutex API
2022-10-19 14:10:51 +02:00
Fotis Panagiotopoulos
f9fd53cda1 gmtimer: Fixed range of tm_yday. 2022-10-19 12:39:04 +08:00
Xiang Xiao
774648de0f risc0v/bl602: Call kthread_create instead of nxtask_create in bl_os_task_create
since the kernel component should use the kernel thread instead the normal task

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-19 08:22:56 +09:00
raiden00pl
27db9558de stm32/socketcan: fixes for arm_netinitialize 2022-10-18 15:35:21 -03:00
Xiang Xiao
d200cacc49 arch/armv7-r: Fix typo error in commit 4fab2b9501
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-18 10:31:07 -03:00
Xiang Xiao
6b31918b42 Remove the unnecessary cast for main_t, NULL and argv
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-18 08:51:45 +02:00
Zhe Weng
d8f35cf1b6 arch/sim: calling txdone callback after devif_loopback in netdriver
When devif_loopback handles a packet (like a ping targeting at this dev), it does not call the txdone callback, breaking the tx pipeline and may left some packets unhandled, delayed until next transmit on the network interface.

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2022-10-18 11:16:33 +08:00
Zhe Weng
cb25a9dee3 arch/sim: change g_avail_work and g_recv_work to array in netdriver
Share one worker between multiple simulated network devices may work most of the time, but sometimes breaks the tx pipeline when sending packets on more than one interface at the same time, and leaves some packets unprocessed in network stack, delayed until next transmit on the network interface. The rx process is likely delayed in packet processing under similar situation, so keep g_avail_work and g_recv_work the same number as interfaces.

dev0 tx1 avail              tx1 done
        v                      v
work dev0 tx1 -> dev0 tx1 -> empty -> dev1 tx2 -> dev1 tx3 -> empty
                    ^                    ^           ^          ^
dev1     tx2 avail (failed to queue)  tx3 avail   tx2 done   tx3 done

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2022-10-18 11:16:33 +08:00
Xiang Xiao
4fab2b9501 arch/armv7-[a|r]: Don't define fiq stack if CONFIG_ARMV7A_DECODEFIQ=n
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-18 08:01:52 +09:00
Alan Carvalho de Assis
0e091b2486 esp32_qencoder: Fix small issues and typos reported by Tiago Medicci 2022-10-18 03:03:28 +08:00
zouboan
ba2b37e23f Update arch/sparc/include/spinlock.h
Co-authored-by: Alan Carvalho de Assis <alan.carvalho@espressif.com>
2022-10-18 00:55:30 +08:00
zouboan
d51d109d0a arch/sparc build CMN_SRC in common dir to keep up with other arch 2022-10-18 00:55:30 +08:00
zouboan
9b55b0af63 arch/sparc add support of spinlock for LEON3 and LEON4 2022-10-18 00:55:30 +08:00
anjiahao
dee38ce3e8 arch: Replace critical section with nxmutex in i2c/spi/1wire initialization
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
anjiahao
d1d46335df Replace nxsem API when used as a lock with nxmutex API
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
Alan Carvalho de Assis
655faa33d4 ESP32: Add support to Quadrature Encoder
Reviewed-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-10-17 00:30:53 +02:00
Bernd Walter
947e771c41 fix typo big letter 'o' in hex value for zero. 2022-10-17 02:55:21 +08:00
Hidenori Matsubayashi
ffe8dd39c6 arch/arm64: update for coding style
Replace "unsigned char" with "bool".

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-16 17:20:14 +08:00
Bernd Walter
432c438c76 Use the correct marcro name for RP2040_UART0_BASE 2022-10-16 11:26:27 +08:00
chao an
4e3aa83706 arm/backtrace_fp: fix build warning
common/arm_backtrace_fp.c: In function 'up_backtrace':
common/arm_backtrace_fp.c:126:23: warning: assignment to 'void *' from 'uintptr_t' {aka 'unsigned int'} makes pointer from integer without a cast [-Wint-conversion]
  126 |           istacklimit = arm_intstack_top();
      |                       ^

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-15 03:09:55 +08:00
Hidenori Matsubayashi
28180b49d1 arm64: add Cortex-A57 and Cortex-A72 configurations
This change adds the following:
- Rename the board configuration name from qemu-a53 to qemu-v8a.
- Add the configurations for Cortex-A57 and Cortex-A72.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-14 09:27:35 +08:00
Hidenori Matsubayashi
06cf41901f arch/arm64: cleanup defconfigs
Use CONFIG_ARCH_CHIP_QEMU instead of CONFIG_ARCH_CHIP_QEMU_A53. This is because these configurations depend on the hardware configuration of qemu (memory map, irq numbers, etc.).

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-13 19:26:26 +08:00
Alan Carvalho de Assis
c297ecaa5d esp32s2: Add missing ESP32S2 SPIRAM config 2022-10-13 01:41:47 +08:00
zouboan
d3f84ba724 arch/sparc dismiss non-Unicode characters issue 2022-10-12 11:36:14 -03:00
zhangyuan21
7d34ebdd4e armv7-a: add l2 page mapping interface 2022-10-12 22:00:06 +08:00
zhangyuan21
466635a5e0 armv7-a: set normal memory shareable in smp mode 2022-10-12 19:54:09 +08:00
zhangyuan21
750007ded9 sched: use tick count for sched timer expiration 2022-10-12 11:55:46 +08:00
Zhe Weng
7225e44725 arch/sim: support multiple tapdev for sim
Support more than one TAP device for debugging (future) NAT and FORWARD, left WPCAP and VPNKit unchanged (force number to 1).
Although we can support at most 31 interfaces, limit to 8 like CONFIG_TUN_NINTERFACES.

Signed-off-by: wengzhe <wengzhe@xiaomi.com>
2022-10-12 01:57:21 +08:00
chao an
bcdd03cdf3 arm/backtrace: rename arm_backtrace_thumb.c to arm_backtrace_sp.c
1. rename arm_backtrace_thumb.c to arm_backtrace_sp.c
2. use EHABI stack unwinder instead of instruction unwind

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-12 01:55:48 +08:00
Brennan Ashton
4ce8cf7bdc bl602/dma: Fix possible call of null pointer to function 2022-10-11 14:34:52 +08:00
Xiang Xiao
1cd9fa25cd arm/tlsr82xx: Don't select ARCH_HAVE_BACKTRACE
since it's already selected by ARCH_ARM

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-11 00:01:35 +02:00
chao an
24129e4ba7 arm/backtrace: add support for EHABI(Exception Handling ABI) stack unwinder
Reference:
https://github.com/ARM-software/abi-aa/blob/main/ehabi32/ehabi32.rst
https://github.com/ARM-software/abi-aa/releases/download/2022Q1/ehabi32.pdf

Signed-off-by: chao an <anchao@xiaomi.com>
2022-10-11 03:11:37 +08:00
Jukka Laitinen
e793207bb6 arch/risc-v/src/mpfs: Add a config option for enabling L2 cache
Make a separate config flag for enabling L2 cache. This is on by
default when compiling a standalone/bootloader configuration, but
can also be disabled for special cases, such as memory testing

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-10-11 00:59:48 +08:00
liangchaozhong
cc426f8539 usrsock:add done flag in usrsock_iovec_do
set done to true if all data in iovec array is copied

Signed-off-by: liangchaozhong <liangchaozhong@xiaomi.com>
2022-10-11 00:57:49 +08:00
Andrés Sánchez Pascual
c28b05efd3 arch: stm32h7: Add support for dual bank flash
memory

Signed-off-by: Andrés Sánchez Pascual <tito97_sp@hotmail.com>
2022-10-10 01:07:45 +08:00
Brennan Ashton
8b7d2d3da4 bl602: Fix bug in lli functionality for dma. 2022-10-09 12:06:15 +02:00
Hidenori Matsubayashi
b0f9241ec1 arch/arm64: update to follow NuttX C Coding Standard
This change moves the static vars to the appropriate place to follow the coding standard. It also adds comments as sections and `static` where necessary.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-09 17:38:31 +08:00
Hidenori Matsubayashi
0b03a2316f arch/arm64/qemu/qemu_boot: fix wrong memory size
The default size in QEMU system is 128MB, and the size specified in chip.h is also 128MB. However, the region size for MMU was 512MB, so fixed it.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-09 17:18:26 +08:00
Masayuki Ishikawa
cb73e9a67d arch: qemu-rv: Refactor the entry point name for BUILD_KERNEL
Summary:
- This commit refactors the entry point name for BUILD_KERNEL
  to avoid misunderstanding the name

Impact:
- None

Testing:
- Tested with rv-virt:ksmp64

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-09 14:08:47 +08:00
Hidenori Matsubayashi
1297c23e7d arch/arm64/arm64_mmu: add mmu_nxrt_config
This change is a refactoring to match the userspace mmu_regions implementation.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-09 12:52:40 +09:00
Masayuki Ishikawa
4b6c9915fe arch: qemu-rv: Fix timer and IPI handling for BUILD_KERNEL+SMP
Summary:
- I noticed that the OS timer sometimes proceeds fast when
  a task is scheduled to run on CPUO via IPI.
- Actually, qemu-rv implementation shares supervisor software
  interrupt for both timer and IPI on CPU0.
- This commit fixes this issue.

Impact:
- qemu-rv only

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-08 17:19:51 +08:00
Masayuki Ishikawa
4e095d2e90 arch: risc-v: Add SMP support for BUILD_KERNEL
Summary:
- This commit adds SMP support for BUILD_KERNEL

Impact:
- RISC-V: BUILD_KERNEL + SMP only

Testing:
- Tested with rv-virt:ksmp64 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-08 09:25:41 +08:00
Ville Juven
0d52b5be56 mpfs_mm_init: Mark the L2 kernel page table as a global mapping
Kernel mappings are global, i.e. they exist in every address environment
2022-10-07 17:26:21 +08:00
Ville Juven
373568f63a mpfs_mm_init.c: Ensure the L3 page table size is large enough
Run-time check for L3 page table size, to ensure it is large enough
to map all of the kernel memory.

NOTE: The check has to be run-time, as KFLASH_SIZE/KSRAM_SIZE are really
linker relocation symbols, and thus cannot be utilized compile-time.
2022-10-07 17:26:21 +08:00
Ville Juven
dbc9a5ffa2 riscv_mmu: Add some basic sanity checks for section boundaries
L3 table maps 2MB of memory, this brings an implicit requirement for
any L3 region to be aligned to 2MB. This commit adds build time sanity
checks to ensure this requirement is met.

For other SvXX architectures the boundary requirement (might be) is
different.
2022-10-07 17:26:21 +08:00
Masayuki Ishikawa
df6bf3e614 arch: risc-v: Introduce RISCV_IPI macro for SMP
Summary:
- This commit introduces RISCV_IPI macro for SMP
- Also, replace RISCV_IRQ_MSOFT with RISCV_IRQ_SOFT
- Remove duplicate irq_attach() from qemu_rv_irq.c

Impact:
- None

Testing:
- Tested with rv-virt:smp64 and maix-bit:smp on QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-07 14:49:29 +08:00
Masayuki Ishikawa
a7bca63b3b arch: qemu-rv: Fix build errors in chip.h for BUILD_KERNEL + SMP
Summary:
- This commit fixes build errors for BUILD_KERNEL + SMP

Impact:
- None

Testing:
- Tested with rv-virt:ksmp64 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-05 17:19:13 +08:00
Masayuki Ishikawa
c4901d6f4b arch: risc-v: Introduce g_percpu_spin in riscv_percpu.c
Summary:
- This commit introduces g_percpu_spin to avoid deadlock
  in riscv_percpu.c instead of using the global spinlock.

Impact:
- None

Testing:
- Tested with rv-virt:knsh64 and rv-virt:ksmp64 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-05 05:15:38 +02:00