Commit Graph

706 Commits

Author SHA1 Message Date
zhuyanlin
cec6aeb059 arch:xtensa:vector: fix typo error in level4_ventor
Change-Id: I66cd3ff30e50e18ed718499aef609dd7aeb82dd3
2021-08-04 20:16:41 -07:00
zhuyanlin
51d13df317 arch: xtensa: save current SP before overwrting in dispatch_c_isr.
In levelx(2,3,4,5)_handler, first need to save sp in a12,
then after dispatch_c_isr we can restore sp from a12.

Change-Id: Idb6b64a782da866670a4db80b33435a9b63f02c3
2021-08-04 20:16:41 -07:00
zhuyanlin
4fc5b62ec3 arch:xtensa: use letter 'i' in inline assemble constraint instead of I
Some toolchain such as xtensa-xcc is unrecognize with constraint letter 'I',
letter 'i' is more common in GNU assembler.

Change-Id: I00f6a33fd7a5f2b95508c683e9954d402b68755f
2021-08-04 18:23:40 +02:00
zhuyanlin
9a34705b80 arch:xtensa_testset: remove include arch/spinlock.h
In config with no "CONFIG_SPINLOCK", include arch/spinlock.h will lead to
build error as multi definition with spinlock_t. Nuttx/spinlock.h will
include arch/spinlock.h when needed.

Change-Id: I33b48503f679ec79af3a0ef1f0fb1536aaf1ce7c
2021-08-04 18:18:11 +02:00
zhuyanlin
355133f218 arch:xtensa: add new GNU toolchain for xtensa.
Add support xcc,xclang GUN toolchin in xtensa,
ESP toolchain is default.

Change-Id: Id00bcf4a16c1e16862a106db32b1da3f3713a14c
2021-08-04 18:16:14 +02:00
Abdelatif Guettouche
238a96e7de arch/esp32_cpuint.c: Simplify up_disable/enable_irq.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Abdelatif Guettouche
4f2f2ef9fb arch/xtensa: Get the cpu member out of the read only structure.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Abdelatif Guettouche
239f0e257b arch/xtensa/esp32: Keep track to which CPU the interrupt was attached.
This is used when dettaching.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Abdelatif Guettouche
0ca5fb4edc arch/xtensa/esp32: When calling up_cpu_index no need to check if in SMP
mode.  up_cpu_index already does that.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Abdelatif Guettouche
3e44c347fd arch/xtensa/esp32_spi&i2c: Get the CPU index when attaching an
interrupt.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-03 19:52:12 -07:00
Xiang Xiao
21b69cfd5d Replace all __attribute__((weak)) with weak_data/weak_function
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Xiang Xiao
007adc7736 Replace all __attribute__((section(x)) with locate_data(x)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Xiang Xiao
b3f9ffbe72 Replace all __attribute__((aligned(x)) with aligned_data(x)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Gustavo Henrique Nihei
a7a922611b xtensa/esp32: Enable the allocation of multiple SPI Flash partitions
Currently the "esp32_spiflash_alloc_mtdpart" allocates a
statically-defined partition from "offset" and "size" set via
Kconfig.
This commit changes the function interface to receive those information
as arguments, enabling the creation of multiple MTD partitions with
different offsets and sizes.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-29 20:17:13 +02:00
Sara Souza
857414e95d xtensa/esp32: expose SPI2 as a char driver 2021-07-27 09:55:49 -07:00
Sara Souza
400d927011 xtensa/esp32s2: Disable wdt and wrap it. 2021-07-26 19:44:30 -07:00
Sara Souza
5baeb7430b xtensa/esp32: Wrap wdt deinitialization in a function 2021-07-26 19:44:30 -07:00
Gustavo Henrique Nihei
2d676f5e46 xtensa/esp32: Enable configuration of GPIO pad's drive strength
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-26 19:37:06 -07:00
jordi
f3af6edf93 Kconfig: add quotes in source to clean warnings from setconfig
To avoid the setconfig warning "style: quotes recommended around xxx in
source xxx"
2021-07-23 02:32:19 -07:00
Abdelatif Guettouche
e85b119363 arch/: Clean what was made during context in distclean.
Cleaning during `clean_context` had the issue of remaking everything
when `menuconfig` was issued.  That's because `menuconfig` has a
`clean_context` on its way.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-07-21 16:52:36 -03:00
Abdelatif Guettouche
315ba8c77f esp32_allocateheap.c: Remove the amount reserved to himem from the heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-07-21 08:58:18 -07:00
Alan C. Assis
011c938116 Remove xtensa_backtrace.S reference from esp32s2 as well 2021-07-20 19:30:09 -07:00
Alan C. Assis
d2eeeee262 Fix xtensa_btdump() to look at the exception frame
Remove xtensa_backtrace_start() since it is not used anymore
2021-07-20 19:30:09 -07:00
Gustavo Henrique Nihei
df2e890cfc xtensa/esp32: Implement MTDIOC_ERASESTATE for SPI Flash driver
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-07-17 09:00:41 -07:00
Xiang Xiao
98b5724b59 arch: Fix rtcb can't found error
use the same condition check in declaration and reference

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I7b05316e914708fceeddac394d784ee3720a3c1b
2021-07-16 12:48:09 -03:00
Sara Souza
c7bf5c7a1d xtensa/esp32: Make UART TX DMA depends on EXPERIMENTAL and adds caveats regarding its use 2021-07-12 21:03:06 -07:00
Sara Souza
2abeba041d xtensa/esp32: Fixes termios issue. 2021-07-12 21:02:26 -07:00
Xiang Xiao
76cdd5c329 mm: Remove mm_heap_impl_s struct
it's more simple to make mm_heap_s opaque outside of mm

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I5c8e435f6baba6d22b10c5f7e8d9191104fb5af2
2021-07-07 04:25:15 -07:00
Sara Souza
a5bf47b93e xtensa/esp32: Fixes issue with UART 2 2021-07-05 23:20:26 -05:00
Sara Souza
d67852da4b xtensa/esp32: Change default pins of UART2 2021-07-05 23:20:26 -05:00
Xiang Xiao
97216c220b mm: Support malloc_size function
and rename malloc_usable_size to malloc_size

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
b1f711f790 mm: Move procfs_register_meminfo into common place
to avoid the code duplication and ensure the consistent behaviour

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-03 09:39:32 -07:00
Sara Souza
b45ccad6a0 xtensa/esp32: Adds support for SERIAL_TXDMA. 2021-07-01 01:50:13 -05:00
Sara Souza
87fabb2bc7 xtensa/esp32: Support to select different clock source for RTC controller and close TODOs. 2021-06-30 21:27:27 -05:00
Abdelatif Guettouche
553f070357 arch/xtensa/esp32: Remove up_textheap_init function since it's not
needed anymore.

Decouple the IRAM heap from the text allocator since that heap can
still be used as a generic pool of memory.

Implement the up_extraheaps_init function to initialize all of the
additional heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Gustavo Henrique Nihei
db18a12844 xtensa/esp32: Move RTC WDT deinit after initial setup
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Gustavo Henrique Nihei
8c70e4f1c1 xtensa/esp32: Fix RTC watchdog timer deinit at startup
Write protection must be disabled before performing changes to the WDT
registers. Furthermore, the routine was resetting the wrong field from
the RTC WDT register.
The RTC_CNTL_WDT_FLASHBOOT_MOD_EN field relates to Flash Boot Protection
and it is enabled by the 1st stage bootloader. The 2nd stage bootloader
takes care of disabling it.
Then the 2nd stage bootloader enables the RTC WDT for checking the
startup sequence of the application image.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Abdelatif Guettouche
55a210d305 arch/xtensa/esp32_textheap.c: When allocating text prioritize alloacting
from the RTC heap.  If that's not available fall back to the IRAM heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1e49f2929f arch/xtensa/src/esp32: Extract the IRAM region as a separate heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1719e9df94 arch/xtensa/esp32: Add the RTC Slow memory as a separate heap.
This memory region can be accessed by both I & D buses, so the heap can
be used for data storage and code execution.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
6582c19904 arch/xtensa/src/esp32/hardware/esp32_soc.h: Add a function to check if a
buffer comes from the RTC Slow memory.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
a4289c4f84 xtensa/esp32_aes.c: Use the same output when testing the AES driver.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-21 06:23:55 -05:00
Masayuki Ishikawa
841fb02ac0 arch: esp32: Replace getcoreid with the latest esp-idf's
Summary:
- I noticed that the getcoreid macro in the latest esp-idf
  is much simpler than the current NuttX's.
- This commit replaces the macro with the latest esp-idf's

Impact:
- SMP only

Testing:
- Tested with esp32-devkitc:wapi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-21 06:21:39 -05:00
chenwen
8648970994 esp32&esp32c3/wifi: Fix the issues of Wi-Fi configuration being overwritten 2021-06-19 08:00:35 -03:00
chenwen
c3792f0aae xtensa/esp32: Support ESP32 RTC driver 2021-06-18 22:01:34 -05:00
Xiang Xiao
ab974edc84 sched: Identify the stack need to free by TCB_FLAG_FREE_STACK
instead calling kmm_heapmember or umm_heapmember because:
1.The stack supplied by caller may allocate from heap too
2.It's hard to implement these two function in ASan case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I196377822b7c4643ab4f29b7c1dc41dcd7c4dab1
2021-06-18 05:44:41 -07:00
Abdelatif Guettouche
af5e0c620f Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 07:14:17 -05:00
Sara Souza
00edeee1ff xtensa/esp32: Adds I2C Bit banging reset 2021-06-18 00:48:27 -05:00
Masayuki Ishikawa
83ac6cd399 arch: xtensa: Remove ISYNC from xtensa_compareset()
Summary:
- According to the Xtensa ISA document, this ISYNC instruction
  between WSR SCOMPARE1 and S32C1I is unnecessary

Impact:
- SMP only

Testing:
- Tested with esp32-devkitc:wapi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-17 09:58:29 -05:00
Masayuki Ishikawa
2d016f8d21 arch: xtensa: Fix the PS register handling
Summary:
- I noticed that DEBUGASSERT sometimes happens in nxsem_wait()
  when testing Wi-Fi with esp32-devkitc:wsifi_smp
- The call stack was not from an interrupt handler and actually
  g_current_regs[] were correct, even though asserted with
  (up_interrupt_handler() == false)
- Finally, I found that we need to call rsync after we set
  a new value to the PS register which is described in the
  Xtensa document.
- This commit fixes this issue

Impact:
- All xtensa architectures

Testing:
- Tested with esp32-devkitc:wifi_smp and esp32-devkitc:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-17 09:58:29 -05:00