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129 Commits

Author SHA1 Message Date
Gregory Nutt
1d290c2b37 setvbuf: Add support for disabling I/O buffering. Initially cut; untested. 2017-02-09 09:24:44 -06:00
Gregory Nutt
0db31d0cd1 SMP: Fix a typo introduced in c5b00ccfc4 2017-01-16 08:48:05 -06:00
Gregory Nutt
a2083fbc92 Update some comments 2017-01-15 12:35:03 -06:00
Gregory Nutt
2837eff0cd SMP: Most cosmetic clean-up from review of previous commit. 2017-01-14 09:22:13 -06:00
Gregory Nutt
c5b00ccfc4 SMP Signals: Fix some SMP signal delivery logic. Was not handling some critical sections correctly and was missing logic to signal tasks running on other CPUs. 2017-01-14 08:28:37 -06:00
Gregory Nutt
3ed091376c In all implementations of _exit(), use enter_critical_section() vs. disabling local interrupts. 2017-01-13 11:08:24 -06:00
Gregory Nutt
b87fc91466 Revert "Xtensa SMP: Avoid a nasty situation in SMP by assuring that up_release_pending() is not re-entered." 
This reverts commit 733a57b4df.
 2016-12-25 07:12:46 -06:00
Gregory Nutt
efb86382c3 SMP: Back out deferred IRQ locking. This was accidentally merged into master and it looks like it is going to be more work than I thought to get it working again. Changes will go to the irqlock branch. 2016-12-24 19:53:37 -06:00
Gregory Nutt
1b790a61cd Xtensa ESP32: Add stack checking logic. 2016-12-23 15:51:33 -06:00
Gregory Nutt
c7f5435637 Implement deferred IRQ locking. The rest of the support for Xtensa. Untested. 2016-12-23 11:56:45 -06:00
Gregory Nutt
cb1cc66d81 Implement deferred IRQ locking. Adds partial support for Xtensa. More is needed. 2016-12-23 11:39:44 -06:00
Gregory Nutt
5f9caad078 Xtensa ESP32: Correct copyright info; update some comments 2016-12-22 12:34:55 -06:00
Gregory Nutt
714e6f80ca Xtensa ESP32: Corrects a problem with dispatching to signal handlers: Cannot vector directly to the signal handling function as in other ABIs under the Xtensa Window ABI. In that case, we need to go through a tiny hook when performs the correct window call (call4) otherwise registers will be scrambled in the signal handler 2016-12-22 11:19:38 -06:00
Gregory Nutt
733a57b4df Xtensa SMP: Avoid a nasty situation in SMP by assuring that up_release_pending() is not re-entered. 2016-12-21 13:34:01 -06:00
Gregory Nutt
e5182acbe3 Xtensa ESP32: Make sure that SMP configuratin still builds without errors. 2016-12-19 14:12:19 -06:00
Gregory Nutt
e61549d8b9 Xtensa ESP32: Clean-up and fixes from last commits 2016-12-19 13:57:37 -06:00
Gregory Nutt
a9a39800a4 Xtensa ESP32: Fixes some double faults and user errors, but I do not fully understand why. 2016-12-19 11:14:08 -06:00
Gregory Nutt
886ce88b4f Xtensa ESP32: Automatically mount /proc at start-up. 2016-12-19 09:43:16 -06:00
Gregory Nutt
4bd530d026 Xtensa ESP32: Last change should be conditioned on the window ABI. 2016-12-18 13:17:31 -06:00
Gregory Nutt
665c1647b5 Xtensa ESP32: Need to spill registers to memory as the last dying action before switching to a new thread. 2016-12-18 12:54:47 -06:00
Gregory Nutt
586f0aab50 Fix context save logic when called in window ABI configuration. Add an IDLE stack. Don't depend on the mystery stack received from the bootloader. 2016-12-18 10:08:08 -06:00
Gregory Nutt
93e6d16f75 Xtensa ESP32: wsr, not rsr. 2016-12-17 11:23:10 -06:00
Gregory Nutt
a88c50d366 Xtensa ESP32: Need to clone some logic for syncrhonous context switch. Window spill logic in the conmon restores logic is inappropriate in this context 2016-12-17 11:00:12 -06:00
Gregory Nutt
6b80e5f15f Xtensa ESP32: Fix clobbered a9 in co-processor context save/restore 2016-12-17 11:00:12 -06:00
Gregory Nutt
8de1127899 Xtensa ESP32: Using wrong register to disable interrupts. 2016-12-17 11:00:12 -06:00
Gregory Nutt
38ebe6c13f Xtensa ESP32: Change that should have been included in a previous commit was not. 2016-12-17 08:11:32 -06:00
Gregory Nutt
05e798488b One register getting clobber on context save 2016-12-17 08:10:10 -06:00
Gregory Nutt
adbacfc42c Xtensa ESP32: Fix a duplicate in Kconfig files. Level 1 should return via RFE. 2016-12-17 07:07:33 -06:00
Gregory Nutt
6599feb310 Xtensa ESP32: Fixes a few issue with restoring registers on interrupt return, but there is still a problem 2016-12-16 17:56:22 -06:00
Gregory Nutt
cdd8dc72a5 Xtensa ESP32: Basically a redesign of the interrupt dispatch logic. 2016-12-16 15:36:52 -06:00
Gregory Nutt
34a994b0f6 Correct a logic problem the prevented dumping the IDLE thread's stack on an assertion 2016-12-16 13:21:01 -06:00
Gregory Nutt
6337fadd8c Missing escape character on CR of CR-LF expansion. 2016-12-16 10:49:42 -06:00
Gregory Nutt
935e49f5bb Update some comments 2016-12-16 09:38:08 -06:00
Gregory Nutt
f1a5b91cd8 Use r6, not r2 when passing paramters with call4 2016-12-16 09:21:44 -06:00
Gregory Nutt
41cf32a20e Fix windowspill register handling + Use r6, not r2 when passing paramters with call4 2016-12-16 09:20:36 -06:00
Gregory Nutt
aa5a8b0ca2 Xtensa: Make sure that all C callable assembly functions includes ENTRY prologue and RET epilogue. 2016-12-15 14:02:19 -06:00
Gregory Nutt
c56268b416 Fix missing CALL0 ABI condition. 2016-12-15 11:06:41 -06:00
Gregory Nutt
ea9e6c48e4 Cosmetic update to comments. 2016-12-15 10:43:34 -06:00
Gregory Nutt
10b9a10d2f Xtensa ESP32: Fix several build-related issues associated with vector section 2016-12-15 10:08:26 -06:00
Gregory Nutt
4052ec2d90 Add missing ENTRY() and RET() macros in C callable assembly language. At one time I though the that the ESP32 support the CALL0 ABI. I was mistaken so there may be a few more like this. 2016-12-14 12:14:51 -06:00
Gregory Nutt
d65be718c2 sched_note: Extend OS instrumentation to include some SMP events. 2016-11-27 17:14:57 -06:00
Gregory Nutt
e3fe320e08 SMP: Add support for linking spinlocks into a special, non-cached memory region. 2016-11-26 08:47:03 -06:00
Gregory Nutt
6a875bcb61 Xtensa: Add EXPERIMENTAL hooks to support lazy co-processor state restore in the future. 2016-11-16 06:48:13 -06:00
Gregory Nutt
c84db68103 Xtensa ESP32: Fix some compilation errors that snuck with some of the last changes 2016-11-14 13:29:08 -06:00
Gregory Nutt
b6d6b774e9 Xtensa: In this model, co-processor state restore must enable co-processors in CPENABLE. 2016-11-08 08:23:52 -06:00
Gregory Nutt
cfcc7edded Xtensa/ESP32: Add window spill logic; Add C++ support to linker script 2016-10-31 17:51:48 -06:00
Gregory Nutt
4d0b0e44f1 Xtensa/ESP32: Add up_cpu_idlestack() and fix some compile issues. 2016-10-31 14:56:48 -06:00
Gregory Nutt
28d1478480 Xtensa/ESP32: Add CPU1 startup logic 2016-10-31 13:15:15 -06:00
Gregory Nutt
a8e3f79494 Xtensa/ESP32: Add User Exception handler 2016-10-31 12:04:52 -06:00
Gregory Nutt
a787a99071 ESP32: Add inter-cpu interrupts 2016-10-31 08:29:28 -06:00