Commit Graph

18678 Commits

Author SHA1 Message Date
Simon Filgis
cf008c94cc arch/arm/samv7: fix peripheral id shift during transmit xdma configuration 2022-02-16 17:16:53 +01:00
Masayuki Ishikawa
b60b6120de arch: armv7-a: Fix arm_syscall for SYS_pthread_start
Summary:
- I noticed that pthread always crashes when started
  if CONFIG_BUILD_KERNEL=y
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-16 13:06:25 +01:00
Petro Karashchenko
41c95da594 register_driver: fix driver modes accross the code
State of problem:
 - Some drivers that do not support write operations (does not
   have write handler or ioctl do not perform any write actions)
   are registered with write permissions
 - Some drivers that do not support read operation (does not
   have read handler or ioctl do not perform any read actions)
   are registered with read permissions
 - Some drivers are registered with execute permissions

Solution:
 - Iterate code where register_driver() is used and change 'mode'
   parameter to reflect the actual read/write operations executed
   by a driver
 - Remove execute permissions from 'mode' parameter

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-16 16:15:29 +08:00
Xiang Xiao
db57e2cd8e Fix the minor style issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 15:26:38 +01:00
Masayuki Ishikawa
34cf6949ac arch: armv7-a: Add debug messages for addrenv
Summary:
- This commit adds debug messages for addrenv

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-15 17:22:52 +08:00
Masayuki Ishikawa
e7cb1b4fb1 arch: rt8920c: Move -fno-common option to ARCHCFLAGS/ARCHCXXFLAGS
Summary:
- Apply the same style as sabre-6quad

Impact:
- None

Testing:
- Build only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-15 16:27:53 +08:00
Xiang Xiao
6b02e32904 arch/sim: Remove 08 from the format string in up_vfork
to make the code more general for both x86 and x64.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 06:44:21 +01:00
Xiang Xiao
e1879e35cd arch/sim: Always typedef xcpt_reg_t to unsigned long
to simplify the code logic

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 06:44:21 +01:00
Huang Qi
5cde8c6934 risc-v: Let g_cpu_basestack determined at compile time
Fix the CPU1 idle tasks stack corruption since the cpux's idle stack
is loaded from g_cpu_basestack (data section) before, but on this time
it maybe not ready since it is initialized by CPU0, and the value
from g_cpu_basestack is random.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-15 11:40:34 +09:00
Huang Qi
0d7f30c86d risc-v/k210: Move wfi to entry of the slave cpu boot routine
Fix another potential bug in non-smp case: load a value from overflowed address of g_cpu_basestack.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-15 11:40:34 +09:00
fenghang
555d25633a add phyplus_rel_1.4
update source for phyplus driver rel_1.4

update source  for phyplus driver rel 1.4

update source for phyplus driver 1.4

update phy6222 config files
2022-02-15 10:21:10 +08:00
Xiang Xiao
4207882cdc arm/armv8-m: Handle the special irq correctly in up_secure_irq
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 09:45:34 +09:00
David Sidrane
1ca952243c stm32h7:flash can not use usleep
commit 328374f4658d11655f268f968f4c6c7a3942f320

   changed the wait to use usleep. This killed the
   write performace from the published values in the
   datasheet of ~100 us to 2 mS per 256 bits. On
   a 1000 per tick config. It can be 10 X worse
   on the default 100 per tick config.

   This changes uses up_udelay.
2022-02-15 02:09:04 +08:00
David Sidrane
8659a31c9d stm32h7:flash Fix lock violations 2022-02-15 02:09:04 +08:00
David Sidrane
8ca4cf49b1 stm32h7:Fix build for all config {R|T}XDMA states 2022-02-14 18:43:30 +01:00
Xiang Xiao
17a7d612df arch: Replace nx_vsyslog with vsyslog
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-14 09:41:45 -03:00
chao.an
4be416a2a8 arm/backtrace: fix the compile warning
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-14 16:29:38 +08:00
Huang Qi
b8477f857b k210: Use common cpu idle stack implementation
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-14 11:32:34 +08:00
Huang Qi
55d88627a0 risc-v: Implement common up_cpu_idlestack
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-14 11:32:34 +08:00
raiden00pl
00917bfe9d stm32/fdcan: add CAN FD frames support 2022-02-14 10:42:01 +08:00
raiden00pl
dd8408a973 stm32/fdcan: use array indexes when accessing RX/TX FIFO 2022-02-14 10:42:01 +08:00
Michael Jung
70dae3bb3b Add arm_tcbinfo.c to stm32u5's common C sources
And re-order the list of common C sources alphabetically.

Signed-off-by: Michael Jung <mijung@gmx.net>
2022-02-13 16:32:35 +08:00
Michael Jung
5c1c939cdc stm32u5: Architecture Support for STM32U5
Architecture support for STMicroelectronics STMU585xx MCUs.  This is
based on corresponding code for STM32L5, but has been considerably
adjusted.  Tested with a B-U585I-IOT02A board and a simple NSH
configuration, but only running NuttX in the non-secure world with
TrustedFirmware-M.

Signed-off-by: Michael Jung <mijung@gmx.net>
2022-02-13 16:32:35 +08:00
Huang Qi
64130b4775 risc-v: Use _ebss instead of _default_stack_limit as idle stack base
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-13 14:37:57 +08:00
Michal Lenc
56b3fc0ef9 arch/arm/src/samv7: added support for PWM driver
This commit adds initial support for PWM driver to SAM MCU series.
Only general PWM on PWMH output is currently supported, complementary
output on PWML is not allowed. The current state of the driver also does
not support external triggering of other perihperals.

Multichannel option is supported. The functionality of the driver was
tested on an example pwm application and with a real time control system.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-02-13 03:20:07 +08:00
Huang Qi
95b0c85f58 arch: Add xxx_tcbinfo.c to SoC level Make.defs
Fix build break with CONFIG_DEBUG_TCBINFO enabled.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-12 21:07:35 +09:00
Peter Kalbus
271518a5ff sim: detect clang native compiler on MacOS. 2022-02-11 21:23:07 +08:00
Huang Qi
3fe9c9523c risc-v: Fix style issue in SoC's Make.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-11 15:20:17 +08:00
Alan C. Assis
d49ad207ef esp32c3: Fix issue #5377 UART1 not working because clock as disabled 2022-02-11 10:01:25 +08:00
zhuyanlin
c833048484 xtensa:kconfig: move ARCH_HAVE_TESTSET config to chip
Some xtensa arch have not implentment testset instructions

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-10 14:22:58 +08:00
Huang Qi
7134220ae2 risc-v: Remove duplicated up_idle logic
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-10 13:09:32 +08:00
Huang Qi
9223547afc risc-v: Support cpu activity led in up_idle
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-10 13:09:32 +08:00
Huang Qi
6f18747dc2 risc-v: Add WFI to up_idle and fix compile issue
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-10 13:09:32 +08:00
zhuyanlin
3ab65f9b08 armv7-a/r: use flush/clean_all if size large than cache size
For cache flush/clean performance

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-09 18:16:31 +01:00
zhuyanlin
4eba2f3527 armv7-a/r:cache: add cp15_cache_size function
Add cp15_cache_size function for armv7-a/r

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-09 18:16:31 +01:00
Huang Qi
9d91d69ee0 arch/risc-v/mpfs: Remove riscv_pthread_exit.c in Make.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-09 21:21:43 +08:00
Huang Qi
c0a0de97ce Revert "libc: Call pthread_exit in user-space by up_pthread_exit"
This reverts commit f4a0b7aedd.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-09 21:21:43 +08:00
Alin Jerpelea
0cfdfde6c7 arch: sim: update licenses for FishSemi
FishSemi is part of Xiaomi and according to xiaoxiang781216
the SGA covers those files

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2022-02-09 19:58:52 +08:00
Alin Jerpelea
7a674b6287 Makefiles: change license to Apache
Make files are recipes based on contributions from from Gregory Nutt

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2022-02-09 19:58:52 +08:00
Alin Jerpelea
e2725d536a arch: sim: update licenses to Apache
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2022-02-09 19:58:52 +08:00
zhuyanlin
cc8ab23550 armv7-r/a: fix a4 register use in xxx_invalidate/flush/clean_all.S
Use sub loop instead of add loop

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-08 19:39:43 +09:00
SPRESENSE
8de07b2ae8 boards: cxd56xx: audio: Support I2S input
Enable the driver setting of I2S input.
2022-02-08 10:47:03 +01:00
Xiang Xiao
963feca4a1 arch/sim: Don't add up_tls_size in up_use_stack before foward to up_create_stack
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-07 08:45:34 +01:00
Xiang Xiao
202b8141a6 arch/sim: Adjust the stack size for up_use_stack too
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-07 13:36:51 +08:00
Xiang Xiao
5749ea6604 arch/sim: Unify the return value of usrsock_xxx_handler
All handler should return the result of usrsock_send_[dack|event]

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-07 13:18:19 +08:00
raiden00pl
bc178344a9 net/can: add an option to control CAN EXTID support 2022-02-06 17:09:11 +08:00
raiden00pl
341bbe38d5 arch/stm32: add FDCAN SocketCAN support 2022-02-06 17:09:11 +08:00
Petro Karashchenko
e545c440f4 arch/arm/samv7/sam_progmem: insert DMB instruction into data write loop
This change fix the regression that was introduced with
https://github.com/apache/incubator-nuttx/pull/4904

In case if D-Cache in configured in Write-Through mode there is
Cortex-M7 erata 1313001 that describes a situation when linefill
buffer or cache contains stale data. Even if progmem write loop
does not fully matches the description there is a possibility
to program stale data if there is no DMB instruction after each
write operation to progmem latch buffer.

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-05 03:14:07 +08:00
Petro Karashchenko
47a09ed255 arch/arm/samv7: add arm_systemreset.c to CMN_CSRCS
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-04 16:40:50 +08:00
Abdelatif Guettouche
f826e053ae arch/xtensa/esp32: Remove the QEMU special case when initializing the
heap.

QEMU had a different ROM image that used the regions of PRO CPU for both
CPUs.  This was causing crashes when running SMP mode as the heap was
being corrupted when the APP CPU starts.

QEMU is now loading the same image as the hardware chip and thus this
special case doesn't exist anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-03 16:18:09 -03:00