Commit Graph

16337 Commits

Author SHA1 Message Date
Abdelatif Guettouche
efb2fd5e4b arch/xtensa/src/esp32/esp32_gpio.c: GPIO20 is not available.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
caa945cb24 arch/xtensa/src/esp32: Add a way to retrieve reset cause.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:51:47 -03:00
Abdelatif Guettouche
c20c8c6dd5 arch/xtensa/esp32: Implement system reset.
Both CPUs are soft-reset with a call to board_reset.  This is actually a
Core Reset, so both cores and all registers are reset.  The only
exception is RTC.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:51:47 -03:00
Nathan Hartman
8eec165aab tiva/lm3s: Fix nxstyle warnings
arch/arm/src/tiva/lm/lm3s_gpio.c:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/lm/lm3s_gpio.h:

    * Fix nxstyle warnings. No functional changes.
2020-10-07 11:50:46 -03:00
Abdelatif Guettouche
2e4ec442ad arch/xtensa/src/esp32/esp32_intdecode.c: Don't clear A2, the mask
argument is passed in that register

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 07:47:06 +09:00
rajeshwaribhat
2f95f3a796 cygwin build - path issue fix 2020-10-06 21:51:36 +08:00
Masayuki Ishikawa
2be53a9335 arch: cxd56xx: Add interrupt stack for SMP
Summary:
- This commit adds interrupt stack for SMP

Impact:
- Affects SMP only

Testing:
- Tested with spresense:wifi_smp with CONFIG_ARCH_INTERRUPTSTACK=2048

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-06 12:42:01 +02:00
Masayuki Ishikawa
4c0602f52c arch: cxd56xx: Introduce cxd56_cpuindex.h
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-06 12:42:01 +02:00
Nathan Hartman
ab4ca67b91 tiva/lm4f: Fix nxstyle warnings
arch/arm/src/tiva/lm/lm4f_gpio.c:

    * Fix nxstyle warnings. No functional changes.
2020-10-06 10:44:21 +08:00
saramonteiro
a562fba971 ESP32: Fixed the type of cpuint variables in esp32_emac.c esp32_i2c.c esp32_spi.c esp32_spi_slave.c 2020-10-02 09:57:56 -07:00
Nathan Hartman
8a1f4db2e1 tiva/cc13xx: Fix nxstyle warnings
arch/arm/src/tiva/cc13xx/cc13xx_start.c:

    * Fix nxstyle warnings. No functional changes.
2020-10-02 13:20:42 -03:00
Abdelatif Guettouche
62732dd6b8 arch/xtensa/src/esp32/esp32_gpio.c: ESP32_NIRQ_GPIO was used instead of
ESP32_NGPIOS

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-02 11:42:49 -03:00
Abdelatif Guettouche
844f39fc67 arch/xtensa/src/esp32/esp32_gpio.c: Change the logic of setting the ENA
bits so that the call to up_cpu_index is only performed when SMP is
enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-02 11:42:49 -03:00
Nathan Hartman
80ce7800a9 Sources and Docs: Fix typos and nxstyle issues
Documentation/contributing/coding_style.rst:

    * Fix repeated words: ("this this").
    * Remove trailing spaces.

boards/z80/z80/z80sim/README.txt:

    * Fix repeated words: ("this this") and rewrap lines.

graphics/Kconfig,
libs/libc/math/Kconfig:

    * Fix repeated words: ("this this").

arch/arm/src/armv7-a/arm_assert.c,
arch/arm/src/armv7-r/arm_assert.c,
arch/arm/src/imxrt/imxrt_enet.c,
arch/arm/src/kinetis/kinetis_enet.c,
arch/arm/src/kinetis/kinetis_flexcan.c,
arch/arm/src/s32k1xx/s32k1xx_enet.c,
arch/arm/src/s32k1xx/s32k1xx_flexcan.c,
arch/arm/src/stm32/stm32_pwm.c,
arch/arm/src/stm32h7/stm32_pwm.c,
arch/arm/src/stm32l4/stm32l4_pwm.c,
arch/renesas/src/rx65n/rx65n_usbdev.c,
binfmt/libnxflat/libnxflat_bind.c,
drivers/pipes/pipe_common.c,
net/igmp/igmp_input.c,
net/tcp/tcp_conn.c,
sched/sched/sched_roundrobin.c:

    * Fix typo in comment ("this this").

arch/arm/src/cxd56xx/cxd56_usbdev.c,
arch/arm/src/lc823450/lc823450_usbdev.c:

    * Fix typo in comment and rewrap lines.

arch/arm/src/imxrt/imxrt_usbdev.c,
arch/arm/src/stm32/stm32_dac.c,
arch/arm/src/stm32f0l0g0/stm32_pwm.c,
arch/arm/src/stm32f7/stm32_pwm.c,
arch/arm/src/tiva/lm/lm4f_gpio.h,
fs/nxffs/nxffs_write.c,
include/nuttx/analog/pga11x.h,
include/nuttx/usb/usbdev.h,
net/mld/mld_join.c:

    * Fix typo in comment ("this this").
    * Fix nxstyle issues.
2020-10-02 04:54:52 +02:00
Masayuki Ishikawa
3f461f59ba arch: cxd56xx: Fix handle_irqreq() in cxd56_cpupause.c
Summary:
- The handle_irqreq() is used for remote IRQ control.
- The logic is called via IPI (Inter-Processor Interrupt)
- And the handler should handle only one request
- However, I noticed that the handler handles up to two requests
- This commit fixes this issue

Impact:
- Affects SMP cases only

Testing:
- Tested with spresense:wifi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-02 04:53:53 +02:00
Matias N
2cda47272a nrf52_ppi: fix group disable and add group clear operation 2020-10-01 21:31:58 -03:00
YAMAMOTO Takashi
83f1f2bc42 sim: Restore some symbols in nuttx-names.in
Used by arch/sim/src/sim/vpnkit/*.c
2020-10-01 15:33:22 +08:00
David Sidrane
f6aa845080 stm32f7:Allow the use of the Network Monitor via polling
Not all boards have an interrupt line from the phy to
   the Soc. This commit allows the phy to be polled for
   link status.

   This may not work on all MAC/PHY combination that
   have mutually exclusive link management and operating
   modes. The STM32F7 and LAN8742AI do not have such a
   limitation.
2020-10-01 15:28:51 +08:00
Nathan Hartman
4ac2c73d82 tiva: Fix nxstyle warnings
arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tm4c/tm4c_gpio.c:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tm4c/tm4c_gpio.h:

    * Fix nxstyle warnings. No functional changes.
2020-10-01 12:14:27 +08:00
Sebastian Ene
d6210fcd84 arch/sim: Make the SIGUSR1 host signal to use the NuttX irq logic
Signed-off-by: Sebastian Ene <sene@apache.org>
2020-10-01 12:11:31 +08:00
Abdelatif Guettouche
769d68a762 arch/xtensa: Fix some typos and correct some comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-30 13:55:28 -03:00
patacongo
9142deeb10 Update arch/arm/src/common/arm_interruptcontext.c
Add a comment discussing the limitation of this solution for the case of the ARMv7-A with the GIC
2020-09-30 08:32:25 -06:00
Masayuki Ishikawa
68f102055a arch: xtensa: Fix up_interrupt_context() for SMP
Summary:
- Apply the same fix for Arm SMP

Impact:
- Affects SMP only

Testing:
- Tested with esp32-core:smp (qemu)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-30 08:32:25 -06:00
Masayuki Ishikawa
e8ec8fb4b4 arch: risc-v: Fix up_interrupt_context() for SMP
Summary:
- Apply the same fix for Arm SMP

Impact:
- Affects SMP only

Testing:
- Tested with maix-bit:smp (qemu)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-30 08:32:25 -06:00
Masayuki Ishikawa
bbc6571b28 arch: arm: Fix up_interrupt_context() for SMP
Summary:
- I found an issue with up_interrupt_context() when testing.
- And finally found that up_interrupt_context() is not atomic.
- This commit fixes the issue

Impact:
- Affects SMP only

Testing:
- Tested with spresense:wifi_smp and sabre-6quad:smp (qemu)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-30 08:32:25 -06:00
ligd
22b837f440 arch/sim/src/nuttx-names.in: fix sim crash in Cygwin platform
Change-Id: I966e626eee03ce0b2c01afa905272194028e64f1
2020-09-30 08:07:17 -06:00
raiden00pl
c18e7bb422 nrf52_lowputc.c: fix compilation error for nrf52832 which has limited baud rate support 2020-09-30 09:09:04 -03:00
raiden00pl
4da122b8d4 nrf52_serial.c: fix unused wariable warning 2020-09-30 09:09:04 -03:00
raiden00pl
35a5036e32 nrf52: add serial termios support 2020-09-30 09:09:04 -03:00
Nathan Hartman
fc404e15da tiva: Fix nxstyle warnings
arch/arm/src/tiva/hardware/tiva_eeprom.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/hardware/tiva_sysctrl.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/hardware/tiva_uart.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/hardware/tiva_wdt.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-29 16:59:17 +01:00
Dong Heng
a266dc9629 arch/xtensa: Fix task signal process preemption A0 modification error 2020-09-29 09:10:53 -03:00
Bhindhiya
9369ce6488 Add RX65N SPI (RSPI) driver support 2020-09-29 09:09:55 -03:00
Abdelatif Guettouche
70c1170c2e Revert "arch/xtensa/src/esp32/esp32_gpio.c: Enable input mode only when"
This reverts commit b5d3ba64e0.
2020-09-29 09:07:41 -03:00
Yoshinori Sugino
3de85be15a arch/risc-v/src: Branch to up_sigdeliver() with interrupts disabled
When executing an MRET instruction, MIE is set to MPIE.
In order to branch to up_sigdeliver() with interrupts disabled,
we need to change MPIE, not MIE.
2020-09-28 22:41:46 -07:00
Yoshinori Sugino
2adec1f366 arch/risc-v/src/fe310: Branch to up_sigdeliver() with interrupts disabled
When executing an MRET instruction, MIE is set to MPIE.
In order to branch to up_sigdeliver() with interrupts disabled,
we need to change MPIE, not MIE.
2020-09-28 22:41:46 -07:00
Brennan Ashton
bbf16b27d9 nRF52: Add basic error handling for i2c in polling mode
There was no error handling before and it would block on common
cases like NACK which meant that you could not use the i2ctool
to perform a scan of the bus.

This does not handle the interrupt flow which also has incomplete
error handling.
2020-09-28 09:34:08 -03:00
Yoshinori Sugino
5bb4eb39f2 Fix nxstyle warnings 2020-09-28 13:54:43 +08:00
Yoshinori Sugino
698008d1e5 Fix typos 2020-09-28 13:54:43 +08:00
Gregory Nutt
fe0a88c838 Correct compilation of arch/sim/src/sim/up_wpcap.c
This commit corrects the following compilation error:

    /usr/include/cygwin/socket.h:27:8: error: redefinition of 'struct sockaddr'
       27 | struct sockaddr {
          |        ^~~~~~~~
    In file included from /usr/include/w32api/winsock2.h:57,
                     from sim/up_wpcap.c:48:
    /usr/include/w32api/psdk_inc/_ip_types.h:70:8: note: originally defined here
       70 | struct sockaddr {
          |        ^~~~~~~~
    In file included from /usr/include/sys/socket.h:13,
                     from /usr/include/cygwin/in.h:21,
                     from /usr/include/netinet/in.h:12,
                     from sim/up_wpcap.c:57:
    /usr/include/cygwin/socket.h:39:8: error: redefinition of 'struct sockaddr_storage'
       39 | struct sockaddr_storage {
          |        ^~~~~~~~~~~~~~~~
    In file included from sim/up_wpcap.c:48:
    /usr/include/w32api/winsock2.h:269:10: note: originally defined here
      269 |   struct sockaddr_storage {
          |          ^~~~~~~~~~~~~

The compilation was broken by a couple of recent blind, unverified changes to up_wpcap.c.  Most were introduced with commit: 8ce0ff5ce4 with this change:

    diff --git a/arch/sim/src/sim/up_wpcap.c b/arch/sim/src/sim/up_wpcap.c
    index ef7b4b3a0c..a15421e80c 100644
    --- a/arch/sim/src/sim/up_wpcap.c
    +++ b/arch/sim/src/sim/up_wpcap.c
    @@ -55,6 +55,8 @@

     #include <netinet/in.h>

    +#include "up_internal.h"
    +
     /****************************************************************************
      * Pre-processor Definitions
      ****************************************************************************/

up_internal.h includes:

     47 #  include <sys/types.h>
     48 #  include <stdbool.h>
     49 #  include <netinet/in.h>

And netinet/in.h includes:

     46 #include <sys/types.h>
     47 #include <sys/socket.h>
     48 #include <stdint.h>

Which is where the collision error is introduced since up_wpcap.c includes winsock2.h already.  There were additional problems introduced to the file by other changes:

- A malformed syslog() call was added
- Some issues with netdriver_setmacaddr()
2020-09-27 18:22:02 -07:00
Nathan Hartman
a4aecb4f42 tiva: tiva_i2c.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_i2c.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-28 00:14:01 +08:00
Bhindhiya
9707f39ff7 RX65N DTC Driver Support Added 2020-09-26 11:45:15 -03:00
David Sidrane
4a6f7cacd5 stm32f7:serial Bug Fix: Ensure next buffer is processed
When the Head to Tail relationship was H < T, then
   only the tail to end of buffer was sent.

   The fix is: In the txdma completion to do a second
   the DMA operation using nbuffer if the nlength is
   non zero.

stm32f7:serial UART5 use actual size

   UART5 was using the CONFIG_UART5_TXBUFSIZE
   not the UART5_TXBUFSIZE_ADJUSTED.
   Since the buffer size was adjusted up, this
   has no dcache implications.
   If the UART5_TXBUFSIZE_ADJUSTED is larger
   then CONFIG_UART5_TXBUFSIZE it will present
   a larger usable buffer to the system's
   serial driver.
2020-09-25 22:09:05 +01:00
Sebastian Ene
c47ad0c909 arch/sim: Add host timer to oneshot timer logic
## Summary of Changes

Add a host timer that generates periodic signals and sends SIGALRM to
the process that runs the NuttX simulation. This logic is integrated as
part of the existing NuttX oneshot timer. The host timer installs an
irq handler which is expected to run every CONFIG_USEC_PER_TICK .

Signed-off-by: Sebastian Ene <nuttx@fitbit.com>
2020-09-25 17:36:16 -03:00
Nathan Hartman
090d822f33 tiva: Fix nxstyle warnings
arch/arm/src/tiva/tiva_gpio.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tiva_mpuinit.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tiva_qencoder.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-25 16:37:45 +01:00
anjana
c6b51771f0 USB Device Mode Driver Support for RX65N 2020-09-25 09:06:59 -03:00
Nathan Hartman
44d7f14121 tiva: tiva_ssi.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_ssi.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-24 16:00:55 -03:00
Matias N
0f9fb67b0c nrf52 spi: build fixes for !SPI_EXCHANGE 2020-09-24 09:51:51 -03:00
Bhindhiya
d0e0af7826 Renesas .gitignore files added 2020-09-24 10:10:40 +01:00
Nathan Hartman
c8bb4474bb tiva: tiva_periphrdy.h, tiva_pwm.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_periphrdy.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tiva_pwm.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-23 22:00:17 +01:00
Thomas Axelsson
f193f0f702 imxrt: Style fixes in mux and ADC hardware headers 2020-09-23 13:16:33 -03:00
Thomas Axelsson
d67bc0c3c8 imxrt: ADC driver
Based on LPC17xx_40xx and STM32 drivers.
2020-09-23 13:16:33 -03:00
Daniel Mesham
c8dc9e39ac arch/arm: stm32l4: Fix typo in TIM15 PWM config
When configuring TIM15_CH2 as output, we mistakenly referred to TIM12 instead.
2020-09-23 14:29:10 +02:00
zhongan
6240977341 rv32im: add missing call of 'up_savefpu'.
Change-Id: Iaf2e212a4fdea2f5f04a178d24755e0e37a30ef6
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-09-23 10:22:45 +01:00
zhongan
07dd053e86 risc-v: add putreg64 for mtimer registers.
Change-Id: I18fe312c95c73966f5c09fd18081b0c72923e2ac
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-09-23 10:22:45 +01:00
Daniel Agar
3df8f79111 stm32f412ce fixes 2020-09-22 22:44:43 -07:00
saramonteiro
7d889bf4c4 nrf52: Fix typo, replace setcc with getcc 2020-09-22 21:07:31 -03:00
Xiang Xiao
031984f76a arch/arm: Select arm family when ARCH_ARM1136J/ARCH_ARM1156T2/ARCH_ARM1176JZ is defined
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-22 23:05:29 +01:00
Xiang Xiao
d078518502 arch/arm: Should include arch/armv8-m/spinlock.h when CONFIG_ARCH_ARMV8M is defined
forget in commit 2376d8a266
Author: qiaowei <qiaowei@xiaomi.com>
Date:   Wed Apr 22 10:09:50 2020 +0800

    Porting arch/armv8-m support

    1. Add dsp extension; float point based on hardware and software.
    2. Delete folder "iar"
    3. Add tool chain for cortex-M23 and cortex-M35p

    Signed-off-by: qiaowei <qiaowei@xiaomi.com>
    Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-22 23:05:29 +01:00
Xiang Xiao
7faf72cabc arch/arm: Add ARCH_ARMV6M Kconfig to prepare the support of CortexM0+
also align with the armv7m implementation

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-22 23:05:29 +01:00
Nathan Hartman
560a052144 tiva: tiva_timer.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_timer.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-22 10:29:28 -07:00
Bhindhiya
c5ef686707 Warnings in NuttX Renesas common files Resolved 2020-09-22 09:49:46 -07:00
Abdelatif Guettouche
a128995eab arch/xtensa: Few typos and style fixes.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-21 19:14:19 -04:00
Nathan Hartman
bc9d3cdd14 tiva: tiva_flash.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_flash.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-21 22:04:45 +01:00
Xiang Xiao
68a2727c12 arch/sim: Extend the heap size to 64MB
to support the more complex application and
remove the special definition for CONFIG_MM_SMALL

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-21 07:40:17 -07:00
zhongan
657d1c9fdc Add and fix CSR macros listed in RISC-V spec V1.10.
Add csr operatiing macros.

Change-Id: Ia5c148d10709c21424c5ecaaca01b7d200fb8e01
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-09-21 07:35:56 -07:00
chenwen
64e2f102ac xtensa/esp32: Add power management of force-sleep 2020-09-20 17:23:07 +01:00
Bhindhiya
7910b58415 RX65N Defconfig Modification 2020-09-18 23:58:37 +01:00
Nathan Hartman
4ceb8ef4e1 tiva: tiva_sysctrl.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_sysctrl.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-18 23:50:59 +01:00
Brennan Ashton
1473c6848f nRF52: Add hooks for missing SPI register callbacks
This implements the missing callback hooks nrf52_spi0/1/2/3register
that are usually used with mmcsd for card detection.

This also stubs out the missing spi trigger function which is not
used on this platform.

The card detect was tested with the nRF52-feather board and a
modified KeyBoard FeatherWing.

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-09-18 04:31:47 -07:00
ligd
a9830254cf SIM in MacOS: make MacOS link process same with Linux
1. There is difference about symbol replace on nuttx-names.in
   between MacOS & Linux
2. For MacOS, if open '-fvisibility=hidden' and adjust nuttx-names.in,
   it will meet symbol link-back-to-nuttx error.
3. Make the MacOS replace behaviour, same with Linux

Note:
MacOS should install objcopy with command:
$ brew install binutils
$ export PATH=$PATH:/usr/local/opt/binutils/bin

already check in to cibuild.sh

Change-Id: If78b784cc0ecb98cdbf7091de38acef00a8a02f3
Signed-off-by: ligd <liguiding1@xiaomi.com>
2020-09-18 18:58:32 +09:00
Fotis Panagiotopoulos
b0b5f87699 Removed broken overdrive function in STM32. 2020-09-18 02:53:40 -07:00
Nathan Hartman
a4d1a20b93 tiva: tiva_lowputc.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_lowputc.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-17 11:07:35 -07:00
Nathan Hartman
e916896aa9 tiva: tiva_eeprom.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_eeprom.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-16 22:15:34 -03:00
Nathan Hartman
de7953c0ee tiva: tiva_userspace.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_userspace.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-16 09:45:17 -07:00
Xiang Xiao
1475309c5b Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-16 06:57:29 -07:00
Xiang Xiao
bf7399a982 arch: Initialize idle thread stack information
and remove the special handling in the stack dump

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia1ef9a427bd4c7f6cee9838d0445f29cfaca3998
2020-09-16 06:57:29 -07:00
Brennan Ashton
8602e46d4a nRF: Add missing Kconfig entry for SPI2_MASTER
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-09-16 07:26:29 +02:00
Matias N
166242c171 use "export" to expose TOPDIR to all child make instead of passing it around every time 2020-09-15 21:11:33 -07:00
Nathan Hartman
0eae2a1f59 tiva: tiva_ssi.c: Fix nxstyle warnings
arch/arm/src/tiva/common/tiva_ssi.c:

    * Fix nxstyle warnings. No functional changes.
2020-09-15 12:48:20 -03:00
Bhindhiya
7c67cffb69 RX65N Pre-check Warnings Resolved 2020-09-15 20:41:02 +08:00
Abdelatif Guettouche
d47131d8ae arch/xtensa/src/esp32/hardware/esp32_spi.h: Remove a leftover license. 2020-09-15 14:40:17 +08:00
Abdelatif Guettouche
55f7473ba0 arch/xtensa/src/esp32/esp32_spiflash.c: #if0-out unused functions.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 14:40:17 +08:00
Abdelatif Guettouche
a97a9aeaf6 arch/xtensa/src/esp32/esp32_spiflash.c: File scope global variables are
prefixed with g_

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 14:40:17 +08:00
Nakamura, Yuuichi
7ce5369873 Fix cxd56 uart deadlock 2020-09-15 15:12:02 +09:00
Bhindhiya
0e22eceef2 RX65N Ethernet pre-check warnings resolved 2020-09-15 09:51:04 +08:00
Matias N
3e48832cf6 z80: missing removal of KDEFINE/EXTRAFLAGS at arch level 2020-09-15 09:49:55 +08:00
Brennan Ashton
c9e618b7b6 nRF: Incorrect base addresses for SPI controllers 1,2,3
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-09-14 19:11:21 -03:00
Nathan Hartman
e681396d35 tiva: tiva_lowputc.c, tiva_qencoder.c: Fix nxstyle warnings
arch/arm/src/tiva/common/tiva_lowputc.c:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/common/tiva_qencoder.c:

    * Fix nxstyle warnings. No functional changes.
2020-09-14 12:16:28 -03:00
dongjiuzhu
3634bb6ba5 sim/uart: support tty operation in arch/sim
Change-Id: I6943c1e928ed821aa913bc619e5b8c581b5610c3
Signed-off-by: dongjiuzhu <dongjiuzhu1@xiaomi.com>
2020-09-14 09:23:46 -03:00
Brennan Ashton
93eeecff6a nrf52: SPI transfer failure and corruption
The current EasyDMA implementation will fail if a transfer of over
255 bytes is requested with no warning.

Also we do not set the RX and TX transfer lengths to 0 if the
buffer is NULL which can cause data to be written to the old
address as well as cause unexpected transaction lenghts.
Example:
  transfer 1:
   rx_len  = 10
   rx_buff != NULL
   tx_len  = 10
   tx_buff != NULL
  transfer 2:
   rx_len = 2
   rx_buff != NULL
   tx_buff == NULL
  Total transaction length for the second would be 10 because it
  would still be using the old rx length of 10 and would
  corrupt data in the old rx buffer.

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-09-14 07:21:24 +02:00
Matias N
3d1159007f Remove extra application of EXTRAFLAGS and KDEFINE and the arch-level
EXTRAFLAGS is already applied to *FLAGS in board's Make.defs (and
it applies to whole build, not just arch-code). EXTRAFLAGS is passed
around each make call to the complete build.

KDEFINE is already added to EXTRAFLAGS in main Makefile so no need
to add it again in arch-level Makefile
2020-09-14 13:59:57 +09:00
Brennan Ashton
5f85024d8c nrf52: SPI cmddata function mapping wrong for SPI(0,2,3)
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-09-13 21:19:17 -03:00
Nathan Hartman
1ab683387d tiva: tiva_eeprom.c: Fix nxstyle warnings
arch/arm/src/tiva/common/tiva_eeprom.c:

    * Fix nxstyle warnings. No functional changes.
2020-09-13 13:11:26 -03:00
raiden00pl
49d0d41234 arch/arm/src/nrf52/nrf52_pwm.c: add missing index for pwm2 and pwm3 2020-09-13 10:57:11 -03:00
raiden00pl
e7f3028aa6 nrf52: add ADC support 2020-09-13 10:57:11 -03:00
raiden00pl
a2b00fd348 nrf52: add PWM support 2020-09-13 10:57:11 -03:00
Abdelatif Guettouche
c27bf32ce9 arch/xtensa/src/esp32/Kconfig: Add the SPI FLASH title to make appear in
menuconfig.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Abdelatif Guettouche
9c0157c882 arch/xtensa/src/esp32/esp32_spiflash.c: Cosmetic changes.
Add missing prototypes.
Fix some alignements.
Add some more comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Abdelatif Guettouche
6b6d983650 arch/xtensa/src/esp32/esp32_spiflash.c: Don't double check for direct
read mode.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Nathan Hartman
70caa27c4c tiva: tiva_dumpgpio.c: Fix nxstyle warnings
arch/arm/src/tiva/common/tiva_dumpgpio.c:

    * Fix nxstyle warnings. No functional changes.
2020-09-12 00:38:37 +08:00
Xiang Xiao
b0797263ca libc/stdio: Allocate file_struct dynamically
1.Reduce the default size of task_group_s(~512B each task)
2.Scale better between simple and complex application

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia872137504fddcf64d89c48d6f0593d76d582710
2020-09-11 17:58:17 +08:00
Masayuki Ishikawa
154d6bc556 arch: cxd56xx: Use spinlock API in cxd56_gpioint.c
Summary:
- This commit improves cxd56_gpioint performance in SMP mode.

Impact:
- This commit affects SMP mode only.

Testing:
- Tested with spresense:wifi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-11 17:27:42 +08:00
ligd
6dc3cbe9cb arch/Kconfig: add ARCH_HAVE_SERIAL_TERMIOS support to ARCH_SIM
Change-Id: I6f3c285aebd7b7989723709d1f956a56104958f4
Signed-off-by: ligd <liguiding1@xiaomi.com>
2020-09-11 10:41:24 +08:00
Nathan Hartman
3316c196d4 tiva: tiva_adclow.c, tiva_allocateheap: Fix nxstyle warnings
arch/arm/src/tiva/common/tiva_adclow.c:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/common/tiva_allocateheap.c

    * Fix nxstyle warnings. No functional changes.
2020-09-10 23:54:17 +08:00
Matias N
459ad29799 nrf52: extend systimer support; support WFI/WFE again
This commit exends systimer options for nRF52 arch. It is possible
to use ARM SysTick either for tickless or non-tickless mode. Also,
it is possible to use the RTC peripheral for tickless mode. This
also re-enables support for WFI/WFE sleep if RTC is used, since
this counter continues to run in this mode (in contrast to SysTick).
2020-09-10 12:10:20 +02:00
Matias N
dcd49c3882 nrf52_rtc: add missing getcounter() 2020-09-10 12:10:20 +02:00
ligd
d785394b0f arch/sim/src/sim/up_tapdev.c: fix compile error
Change-Id: I8d5a176671f78464c057155edace5eabbb382c5c
2020-09-10 15:33:55 +08:00
Masayuki Ishikawa
22651fa22b arch: cxd56xx: Introduce cxd56_testset.c
Summary:
- I noticed that ldrex/strex on cxd56xx have an issue
- The issue is still under investigation
- This commit introduces a custom testset to avoid the issue

Impact:
- Affects cxd56xx in SMP mode if it is enabled

Testing:
- Tested with spresense:wifi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-10 08:52:22 +02:00
Ouss4
06ca12e6b9 arch/: Trivial typos, mostly "their is" to "there is" 2020-09-09 14:09:43 -04:00
Nathan Hartman
8f6b2f6948 tiva: tiva_adclib.c: Fix nxstyle warnings
arch/arm/src/tiva/common/tiva_adclib.c:

    * Fix nxstyle warnings. No functional changes.
2020-09-09 08:35:19 -07:00
barbiani
20c5c57cf6 Update tiva_timerlow32.c
Missing callback argument field.
2020-09-09 08:34:26 -07:00
David Sidrane
9106c4ec2b stm32h7:DMA Do not disqualify DMA capability based on cache alignment 2020-09-09 14:09:52 +02:00
David Sidrane
2d9e0f6a76 stm32f7:DMA Do not disqualify DMA capability based on cache alignment 2020-09-09 14:09:52 +02:00
ligd
2cfb239a87 arch/sim/src/nuttx-names.in: only host code need replace if -fvisibility=hidden
After previous commit, add -fvisibility=hidden, we don't need
worry about depended libxx.so callback to nuttx symbol in SIM.

So most of the symbol in nuttx-names.in can be remove.

But we still need some symbol replacement for host code.
Host code should call host API if access HOST sth, for example:
open, close, accept, printf...

Signed-off-by: ligd <liguiding1@xiaomi.com>
2020-09-09 17:04:39 +08:00
ligd
42a1d45a8a arch/sim: replace printf fprintf to syslog, '\r\n' -> '\n'
should use syslog in kernel

RP check failed because host code call host API has
style AaaBbb, so, ignore the RP check

Change-Id: Iad3468dae2cd07e6dd92874c5e6d38d9018bee6c
Signed-off-by: ligd <liguiding1@xiaomi.com>
2020-09-09 17:04:39 +08:00
Masayuki Ishikawa
ce93fe76e5 arm: cxd56xx: Fix nvic settings for SMP
Summary:
- I noticed that ostest sometimes stops with DEBUGASSERT
- Finally I found a bug that cpu1 can not disable interrupt
- This commit initializes nvic to fix this bug

Impact:
- Only affects cxd56 in SMP mode

Testing:
- spresense:smp and spresense:wifi_smp with DEBUG_ASSERTIONS=y

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-09 08:31:30 +02:00
Nathan Hartman
835d394856 tiva: tiva_timerlow32.c: Fix nxstyle warnings
arch/arm/src/tiva/common/tiva_timerlow32.c:

    * Fix nxstyle warnings. No functional changes.
2020-09-08 23:38:09 +08:00
Bhindhiya
0a2c7f7ac5 RX65N RTC Pre-check Warnings Resolved 2020-09-08 14:54:49 +08:00
Xiang Xiao
f99719e260 Move note driver from drivers/syslog to drivers/note
it's better to put the note transport layer into a common folder

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-07 11:54:10 +08:00
Johannes Schock
515ad1c388 Added KDEFINE (__KERNEL__) to EXTRAFLAGS for libboard, for other architectures. 2020-09-05 21:25:31 +08:00
Johannes Schock
9e69b87aa3 Added KDEFINE (__KERNEL__) to EXTRAFLAGS for libboard. 2020-09-05 21:25:31 +08:00
Sebastian Ene
18b47f9663 arch/sim: Add the pthread_cond_* API to the nuttx-names.in list
## Summary of changes

The pthread_cond_* API is also present as part of libfs.a and we want
to avoid colisions and link with the correct implementation.

Signed-off-by: Sebastian Ene <nuttx@fitbit.com>
2020-09-05 16:41:54 +08:00
Sebastian Ene
5beb32bf0b arch/sim: Use pthread_cond for signalling CPU initialisation done
## Summary of changes

On OSX with CONFIG_SMP=y the semaphore which notifies that the CPU is
initialised, is not created and the up_cpu_start() returns with error
from sem_init(). This patch fixes the problem by using pthread_cond_t
signalling mechanism which is supported on Mac.

Signed-off-by: Sebastian Ene <nuttx@fitbit.com>
2020-09-05 16:41:54 +08:00
David Sidrane
719246eddc stm32h7:i2c driver fixed iterrupt storm
Driver was getting into a state that it would keep
   generating interrups and not service them.
2020-09-05 16:41:01 +08:00
Nathan Hartman
e67f72b02d stm32: lowputc: Ensure USART is disabled before configuring
arch/arm/src/stm32/stm32_lowputc.c:

    * stm32_lowsetup(): Ensure the USART is disabled before attempting
      to configure it because some register bits cannot be modified
      otherwise. This solves an issue that was encountered when a
      serial bootloader did not perform a full teardown/cleanup before
      launching NuttX.
2020-09-04 17:39:19 -07:00
Ouss4
3560e16ac7 arch/xtensa/src/esp32/esp32_spi.c: When the TX buffer is empty send
something to kick off the SPI clock.
2020-09-04 17:43:51 -03:00
Xiang Xiao
5107104bbe arch/sim: Model host signal as NuttX's interrupt
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-03 10:20:50 +08:00
Sebastian Ene
5db11a275e arch/sim: Mask and restore the host signal in irq_save and irq_restore
to avoid the host signal process interrupt the execution of NuttX critical section

Signed-off-by: Sebastian Ene <nuttx@fitbit.com>
2020-09-03 10:20:50 +08:00
Masayuki Ishikawa
08c4376606 arch, include, sched : Refactor ARCH_GLOBAL_IRQDISABLE related code
Summary:
- ARCH_GLOBAL_IRQDISABLE was initially introduced for LC823450 SMP
- At that time, i.MX6 (quad Cortex-A9) did not use this config
- However, this option is now used for all CPUs which support SMP
- So it's good timing for refactoring the code

Impact:
- Should have no impact because the logic is the same for SMP

Testing:
- Tested with board: spresense:smp, spresense:wifi_smp
- Tested with qemu: esp32-core:smp, maix-bit:smp, sabre-6quad:smp
- Build only: lc823450-xgevk:rndis, sam4cmp-db:nsh

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-03 10:20:20 +08:00
Bhindhiya
144044aa0a Resolve build warnings in up_initialize.c 2020-09-03 01:33:38 +08:00
Bhindhiya
7338151136 Resolve build warnings in file up_internal.h 2020-09-03 01:33:38 +08:00
Xiang Xiao
76c2ede936 arch/sim: Fix macOS error: 'sem_init' is deprecated
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-02 12:37:34 +09:00
Xiang Xiao
406c6ae4dd arch/sim: Fix clang error: address argument to atomic operation must be a pointer to _Atomic type
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-02 12:37:34 +09:00
Johannes Schock
a5a3e54be0 Kinetis USBHSHOST: Changed Async Await to linked list, restored two accidently deleted lines. 2020-09-01 20:49:03 +01:00
Johannes Schock
e521c224c1 Kinetis USBHSHOST improvement.
Avoid race conditions during freeing of queue head structures by using Async Advance Doorbell.
2020-09-01 20:49:03 +01:00
Ouss4
b5d3ba64e0 arch/xtensa/src/esp32/esp32_gpio.c: Enable input mode only when
configuring an input.
2020-09-01 15:06:58 -03:00
YAMAMOTO Takashi
c52854f5bb nuttx-names.in: add dlopen and friends
Note: dlsymtab is not in standards. but just in case.

	(gdb) bt
	#0  getpid () at task/task_getpid.c:91
	#1  0x00000000004fbc9d in modlib_registry_lock ()
		at modlib/modlib_registry.c:89
	#2  0x0000000000719ee0 in modsym (handle=0xffffffffffffffff,
		name=0x7fa7ebdde8c7 "mmap") at module/mod_modsym.c:92
	#3  0x000000000071597d in dlsym (handle=0xffffffffffffffff,
		name=0x7fa7ebdde8c7 "mmap") at dlfcn/lib_dlsym.c:164
	#4  0x00007fa7ebdbeb39 in ?? () from /lib/x86_64-linux-gnu/libasan.so.5
	#5  0x00007fa7ebd79b28 in ?? () from /lib/x86_64-linux-gnu/libasan.so.5
	#6  0x00007fa7ebd9d7a7 in ?? () from /lib/x86_64-linux-gnu/libasan.so.5
	#7  0x00007fa7ec6ce03a in ?? () from /lib64/ld-linux-x86-64.so.2
	#8  0x00007fa7ec6ce141 in ?? () from /lib64/ld-linux-x86-64.so.2
	#9  0x00007fa7ec6be13a in ?? () from /lib64/ld-linux-x86-64.so.2
	#10 0x0000000000000001 in ?? ()
	#11 0x00007fff028f686b in ?? ()
	#12 0x0000000000000000 in ?? ()
	(gdb) quit
2020-09-01 23:10:29 +08:00
YAMAMOTO Takashi
b17d9871e5 nuttx-names.in: sort 2020-09-01 23:10:29 +08:00
raiden00pl
a52f6529a0 arch/arm/src/nrf52/nrf52_irq.c: fix compilation warning 2020-09-01 12:02:20 -03:00
raiden00pl
94d81611f4 arch/arm/src/nrf52/nrf52_i2c.c: fix typo 2020-09-01 12:02:20 -03:00
raiden00pl
0438ed22d0 arch/nrf52: add UID support 2020-09-01 12:02:20 -03:00
raiden00pl
2a4d7de278 arch/nrf52: add ARM system reset support 2020-09-01 12:02:20 -03:00
Masayuki Ishikawa
7e94997eeb arch: cxd56xx: Use spinlock API in cxd56_uart.c
Summary:
- This commit improves cxd56_uart performance in SMP mode.

Impact:
- This commit affects SMP mode only.

Testing:
- Tested with spresense:smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-01 11:55:14 +02:00
Gregory Nutt
55a9172bc2 Fix Cygwin build with Windows native toolchain
PR #1450 broke the Cygwin build.  Refer to Issue #1672.

The use of of logic like:

    EXTRA_LIBPATHS += -L "${dir ${shell $(CC) $(ARCHCPUFLAGS) --print-file-name=libgcc.a}}"

fails when the Toolchain $(CC) is a native Windows toolchain.  That is because the returned path is a Windows-style patch which cannot be handled by the make 'dir' command.  Commit 4910d43ab0 reorganized a lot of definitions and replaced the correct code with the use of the limit make 'dir' command.  The original code used the Bash dirname command which does not suffer from this limitation; it can handle both POSIX and Windows paths.

This was verified using the stm32f4discover:nsh toolchain with the Windows native ARM Embedded toolchain.  That toolchain returns:

    arm-none-eabi-gcc --print-file-name=libgcc.a
    c:/program files (x86)/gnu tools arm embedded/9 2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/libgcc.a
2020-09-01 10:20:28 +08:00
Matias N
da88467d6e nrf52_gpiote: add support for TASK mode 2020-08-31 19:39:15 +02:00
raiden00pl
3241ebf811 arch/nrf52: remove redundant chip definitions from Kconfig 2020-08-31 11:49:49 -03:00
raiden00pl
45f3aa4ca9 arch/nrf52: replace all chip-specific conditions with chip-features conditions in all hardware definitions. This gives us a more modular code. 2020-08-31 11:49:49 -03:00
Matias N
3176f2c3f0 nrf52_clockconfig: support HFCLK via XTAL and LFCLK 2020-08-31 08:01:37 +02:00
Brennan Ashton
58e43adf08 nxstyle: Fix existing long line to match code style
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-08-30 19:16:30 -03:00
Brennan Ashton
4cb193d530 Docs: Update links to old website and wiki
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-08-30 19:16:30 -03:00