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13432 Commits

Author SHA1 Message Date
Simon Piriou
53a8cb734b sim arch: poll for TX frames to speed up driver 2017-07-22 09:01:24 -06:00
Simon Piriou
63c9f1a86e sim arch: Add non blocking read to devconsole driver 2017-07-22 09:01:24 -06:00
raiden00pl
f6c1d59531 stm32_hrtim: add slave timers private data, fix some bad definitions, some asserions 2017-07-22 15:14:59 +02:00
Gregory Nutt
c3b552e072 Minor cosmetic updates from review of last PR. 2017-07-20 07:39:57 -06:00
Titus von Boxberg
a20c3b17ce warning message when using DSI (for debugging) 2017-07-19 20:39:27 +02:00
Titus von Boxberg
7b07471ece documentation update to f7 2017-07-19 19:14:50 +02:00
Titus von Boxberg
6d29a04752 naming errors/inconsitencies/typos 2017-07-19 19:14:49 +02:00
Titus von Boxberg
1241960d4a STM32F7: Switch from CCM to DTCM 2017-07-19 19:07:53 +02:00
Titus von Boxberg
071b2dda28 compileable with LTDC_INTERFACE and LTDC_USE_DSI 2017-07-19 19:07:53 +02:00
Titus von Boxberg
e67ba8c88d option for DSI output 2017-07-19 19:07:53 +02:00
Titus von Boxberg
d590ba7ab2 do not enforce CONFIG_STM32_CCMEXCLUDE for CONFIG_ARCH_CHIP_STM32F7, macro rename STM32 -> STM32F7, #include corrections 2017-07-19 19:07:53 +02:00
Titus von Boxberg
1826c1165a macro rename STM32 -> STM32F7, #include corrections 2017-07-19 19:07:53 +02:00
Titus von Boxberg
32e417c3ac renamed STM32_LCDTFT_BASE to STM32_LTDC_BASE for consistency 2017-07-19 19:07:53 +02:00
Titus von Boxberg
58053fef0f macro rename STM32 -> STM32F7 2017-07-19 19:07:53 +02:00
Titus von Boxberg
ec3e4cabab added config and make stuff for stm32f7 ltdc 2017-07-19 19:07:53 +02:00
Titus von Boxberg
ea703b832a copied from stm32 2017-07-19 19:07:53 +02:00
Titus von Boxberg
07531de2e4 Copied files from stm32 2017-07-19 19:07:53 +02:00
Matt Thompson
eff9ba514c SAMD21: Changes needed to get USB working. 2017-07-19 07:22:14 -06:00
Titus von Boxberg
f3267ddb71 I2C4_SDA can also be on GPIO PB7 2017-07-18 11:43:53 +02:00
savinz
1b27dd32af STM32 F7 Ethernet: Fix typo in header; Add memory sync barrier between writing to DMA TX descriptor and restarting DMA TX. Avoid calling work_queue on pollwork if it's already queued, just skip a poll cycle instead. Nucleo-144: Fix RMII TXD1 signal, connected to PB13 not to PG14. 2017-07-14 09:23:43 -06:00
Gregory Nutt
447785b264 SAMD/L21: Need to preserve errno value across syslog() call. 2017-07-12 16:22:23 -06:00
Gregory Nutt
10fbb2b089 SAMD/L21 USB: Remove all commented out logic. 2017-07-12 08:10:21 -06:00
Janne Rosberg
76ea6f09ec SAMD/L21: Add a USB driver. Developed for Filament Inc. by Offcode, LTD. 2017-07-12 07:46:46 -06:00
Matt Thompson
5448c99ff2 I was having issues with the bus freezing up .. slaves holding SDL low.. so I rewrote a good portion of the interrupt logic based on the application notes from Atmel. One major improvement is using the RXNACK flag in the STATUS register, which indicates that no device responded to an address packet. Assuming that the chip will always give an interrupt status, I believe it's possible to eliminate the timer as well. 2017-07-12 06:44:53 -06:00
Matt Thompson
1e0560b22f SAMD21: Fix some SPI-related issues. 2017-07-11 12:48:38 -06:00
Gregory Nutt
839019f305 SAMD/L21 I2C: Another update... needs to use enter/leave_critical_section vs. old irqsave/restore. 2017-07-11 07:01:05 -06:00
Alan Carvalho de Assis
5b9526b4c1 SAML21 I2C driver. Developed for and contributed with permissin from Filament company. 2017-07-11 06:58:58 -06:00
Gregory Nutt
79e5d2b7b6 STM32 TIM3/4 are always 16-bits; never 32-bits. Noted by Eetu Nevalainen. 2017-07-10 13:56:06 -06:00
Gregory Nutt
975473fed8 ICMPv6: Add 6LoWPAN and IP forwarding support. 2017-07-09 11:35:26 -06:00
Gregory Nutt
76587b2c6f STM32 Kconfig: 'unfold' some of the dependencies to provide better long term configuration support. This also effective reverts the recent 15b85738e7 2017-07-06 10:34:54 -06:00
Gregory Nutt
47be509d79 Rename CONFIG_STM32_STM32F40XX to CONFIG_STM32_STM32FXXXX since it is used by F4 parts other than F40x 2017-07-06 10:20:14 -06:00
gwenhael.goavec
15b85738e7 In arch/arm/src/stm32/Kconfig when the CPU is a STM32F4, some STM32_HAVE_xx with xx = {OTGFS, TIM3, TIM4, SPI3, I2S3, I2C3} are selected by default. But for F410 these peripherals are absent. This change add tests to check if the target CPU is an F410 or not and selects according to the situation. This also adds a select for STM32_HAVE_DAC1 present on this STM32 flavor. 2017-07-06 09:52:21 -06:00
Eetu Nevalainen
21dcc8cbc7 stm32f40xxx_rtcc ISR register and write protection fix 2017-07-03 11:06:07 -06:00
Gregory Nutt
68315b7444 Merged clang into master 2017-07-03 07:04:57 -06:00
Gregory Nutt
09ab651e02 samv71-xult: Add support for the MRF24J40 radio and create a mrf24j40-starhub configuration. A few fixes to IPv6 and 6LoWPAN were required to have 6LoWPAN and Ethernet coexisting. Untested and expect some complexity in the bring-up. 2017-07-02 11:04:57 -06:00
Gregory Nutt
cf44fd6ec0 Add CLANG definitions in Kconfig and Toolchain.defs 2017-07-02 06:42:48 -06:00
Gregory Nutt
1c5ec07414 arch/: Remove dangling space at the end of lines. 2017-06-28 13:16:48 -06:00
Gregory Nutt
aa1708e7c0 6LoWPAN: Update README; fix duplicate and bad memcpy in loopback driver. 2017-06-26 10:53:57 -06:00
raiden00pl
715d6fa9ff stm32f33xxx_rcc: cleanup + move hrtim clock source selection 2017-06-26 18:30:10 +02:00
raiden00pl
aead2b2afd stm32f33xxx_rcc.h: fix typo 2017-06-26 18:26:59 +02:00
Juha Niskanen
56eeb40958 STM32L4 serial: Allow configuring Rx DMA buffer size 2017-06-26 09:19:42 -06:00
Juha Niskanen
90ccdf287d STM32 L4 DMA: Correct USART3_RX bad channel definition 2017-06-21 08:40:33 -06:00
David Sidrane
345ea957cf Merged in david_s5/nuttx/upstream_kinetis (pull request #414) 
Kinetis:I2C fixed mis-placed kinetis_i2c_endwait

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-06-20 20:22:17 +00:00
David Sidrane
839a6e09f4 Kinetis:I2C fixed mis-placed kinetis_i2c_endwait 
Fixed accedently replaced post with wait.
 2017-06-20 10:01:35 -10:00
Gregory Nutt
5de74441a6 Costmetic change from review of last PR 2017-06-20 13:33:14 -06:00
David Sidrane
1ee03d7500 Merged in david_s5/nuttx/upstream_kinetis (pull request #413) 
Kinetis:I2C driver added I2C3, reference counting and reset

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-06-20 19:31:38 +00:00
David Sidrane
9e0f583774 Kinetis:I2C driver added I2C3, reference counting and reset 
Refactored the driver to support reference counting and reset
   added I2C3
 2017-06-20 08:34:12 -10:00
Sebastien Lorquet
0bf4893b2c STM32: Allow clock frequencies > 168 Mhz on stm32f427/429. We need to enable the power overdrive for this case. This patch allows the required bits to be set in proper sequence. It also modifies the local register access operations to allow more than 16-bit registers. 2017-06-20 11:56:54 -06:00
Juha Niskanen
326ab01a91 STM32 F7: Set I2C4 SDA and SCL pins to open drain mode 2017-06-20 08:06:30 -06:00
Juha Niskanen
2c548a4e58 STM32 L4: I2C4 was writing to wrong RCC registers 2017-06-20 08:04:09 -06:00
Gregory Nutt
47ad81b3e5 Trivial spelling fix 2017-06-20 08:02:42 -06:00
Pekka Ervasti
2eb782961f STM32 L4: Set I2C SDA and SCL pins to open drain mode. 2017-06-20 07:59:27 -06:00
Jussi Kivilinna
a1ee9547f3 stm32_adc: invalidate dma buffer before use. Missing invalidation caused old samples being fetched from cache. 2017-06-19 07:52:19 -06:00
raiden00pl
c29c4e2ec2 stm32_hrtim: remove unneeded definitions 2017-06-18 18:08:25 +02:00
raiden00pl
4e0f45f252 stm32_hrtim: fix initialization bug, minor changes 2017-06-18 18:06:37 +02:00
raiden00pl
cd30545cd9 stm32_hrtim: ADC triggering and DAC synch events 2017-06-18 15:26:39 +02:00
raiden00pl
96e639262a stm32_hrtim: add hrtim ops 2017-06-18 11:01:36 +02:00
raiden00pl
797e286cb0 stm32_hrtim: timers mode configuration 2017-06-18 09:28:05 +02:00
raiden00pl
dfeffefa69 stm32_hrtim: typo 2017-06-18 08:02:15 +02:00
Gregory Nutt
0024840f7d Trivial, cosmetic changes from review of last PR 2017-06-17 14:44:11 -06:00
raiden00pl
b48a86ee33 Merge remote-tracking branch 'upstream/master' 2017-06-17 22:18:03 +02:00
raiden00pl
4d9d3c4a9c stm32_hrtim: cosmetics 2017-06-17 22:12:56 +02:00
raiden00pl
5e3360b8b9 stm32_hrtim: faults and events configuration 2017-06-17 21:56:11 +02:00
David Sidrane
c79d4d1988 stm32:flash add CONFIG_STM32_STM32F469 to list defining OPTCR1 2017-06-16 14:16:32 -10:00
Gregory Nutt
5245cbc6f5 STM32 SPI/I2S: Back out a bad pin mapping change from 4ab2a3661e. Try to staighten out some I2C3 and SPI3 pin configuration stuff. 2017-06-16 09:34:22 -06:00
Sebastien Lorquet
4d9be9bc20 STM32 F4 FLASH: Enable/disable the flash write protection on any sector. I have verified it to work on the stm32f427. 2017-06-16 08:46:57 -06:00
raiden00pl
bd7bee5db0 stm32_hrtim: structures for deadtime and chopper, cosmetics 2017-06-16 11:36:23 +02:00
David Sidrane
64e3dc5e8b Merged in david_s5/nuttx/upstream_samv7_twi (pull request #399) 
samv7:twihs driver add reference counting

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-06-15 21:45:07 +00:00
David Sidrane
d9d32ac808 samv7:twihs driver add reference counting 2017-06-15 11:16:28 -10:00
raiden00pl
268c6d0b7d stm32_hrtim: outputs enable, period and compare functions, cosmetics 2017-06-15 16:45:21 +02:00
Gregory Nutt
d958cec7a4 Cosmetic changes from review of last PR 2017-06-15 06:58:55 -06:00
Hidetaka
0f1d388248 Merged in TJ-Hidetaka-Takano/nuttx-pr/feature/fix-kconfig (pull request #394) 
Fixed typo "CORTEXR5F" in arch/arm/Kconfig

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-06-15 12:12:31 +00:00
Hidetaka
9dfa8f7df9 Merged in TJ-Hidetaka-Takano/nuttx-pr/feature/fix-armv7m-toolchain-def (pull request #395) 
Fixed ARMv7-M Toolchain definition for Cortex-M4.

Approved-by: Gregory Nutt <gnutt@nuttx.org>
 2017-06-15 12:12:01 +00:00
Hidetaka Takano
5591fc6b16 Fixed ARMv7-M Toolchain setting. 
- Cortex-M4 only have Single Precision FPU.
 2017-06-15 20:52:37 +09:00
Hidetaka Takano
d665392873 Fixed typo "CORTEXR5F" in arch/arm/Kconfig 2017-06-15 20:44:06 +09:00
raiden00pl
96d40dec40 stm32_hrtim: cosmetic 2017-06-15 11:20:40 +02:00
Leif Jakob
4a79547fb8 multiple fixes for stm32f1xx RTC clock 
- compile issues because of missing RTC_MAGIC #defines
- missing functionality based on RTC_MAGIC in RTC based on stm32_rtcounter.c
- IRQ setup from up_rtc_initialize was later reset in up_irqinitialize
- write access to backup registers without enabling access to backup domain
- possible races in set/cancel alarm
tested with STM32F103C8 only
device now wakes up from forced STANDBY mode by alarm
 2017-06-14 22:36:40 +02:00
David Sidrane
b2d929e40a Kinetis:SPI driver 2017-06-13 17:46:57 -10:00
David Sidrane
de3695d32b kinetis:lpserial fixed header inclusion 2017-06-13 17:46:56 -10:00
Gregory Nutt
e379491d13 STM32/STM32L4: Review of last commit -- Eliminate possible underflow 2017-06-13 07:05:46 -06:00
JM
7903a8a46c stm32/stm32l4 PWM: While attempting to output a 70 MHz square wave from the timer output of a STM32 clocked at 140 MHz (which works fine in baremetal C), I stumbled on what I believe to be an error in arch/arm/src/stm32/stm32_pwm.c. Line 1304 we are told that 
reload = timclk / info->frequency;

which I belive to be incorrect, it should be

reload = timclk / info->frequency - 1;

since starting to count from 0, if I want to output half of the TIM clock, I must count to 1 and not to 2.

Surely enough, the original code did output 140/3=47 MHz, while this correction does allow the output up to 70 MHz.

I am not sure this affects most users generating slow PWM (e.g. PX4) but for frequencies
close to the PCLK, indeed the difference becomes significant.
 2017-06-13 06:01:13 -06:00
raiden00pl
f6ba4642a3 stm32_hrtim: GPIOs configuration + EEV and FAULT strucutres 2017-06-12 18:45:58 +02:00
Gregory Nutt
f5f1c73b54 Based on the last PR, review all serial driver vector attachment. Found one additional error and updated all relevant drivers to current interrupt parameter passing. 2017-06-12 06:22:35 -06:00
Masayuki Ishikawa
93a2d52b56 i.MX6: Fix a wrong parameter passed when calling irq_attach() in imx_serial.c 2017-06-12 13:34:53 +09:00
raiden00pl
de8cd6c870 stm32_hrtim: add character driver 2017-06-11 20:51:23 +02:00
Gregory Nutt
fe813545e8 STM32F33: Forgot to add new files that were a part of the last patch before committing. 2017-06-11 11:00:29 -06:00
Mateusz Szafoni
437ad3ccb2 STM32F33: Fix hrtim definitions, Add beginning of HRTIM driver 2017-06-11 10:49:20 -06:00
Gregory Nutt
1e5125c5d5 STM32L4: Remove some C++ style comments. 2017-06-08 13:43:47 -06:00
Gregory Nutt
8b907c4c1f STM32L4: Fix a typo 2017-06-08 11:07:20 -06:00
Gregory Nutt
d99ceec58c STM32L4: Add STM32L475 pinmap. Initial cut is just the the L476 pinmap with unsupported devices removed. 2017-06-08 10:55:27 -06:00
Gregory Nutt
596fe68854 STM32L4: Add STM32L475 OTGFS header file. Not fully reviewed. 2017-06-08 10:34:26 -06:00
Gregory Nutt
95fcdff1fd STM32L4: Add STM32L475 RCC definitions/logic. 2017-06-08 10:04:28 -06:00
Gregory Nutt
1a405d2881 STM32L4: Add L475 syscfg register definitions. 2017-06-08 09:07:04 -06:00
Gregory Nutt
66e2247f30 STM32L4: Ad support for the STM32L475 family. Incomplete -- still needs pinmap, rcc, otgfs, syscfg 2017-06-08 08:52:09 -06:00
David Sidrane
4854eb1fd7 Kinetis:Fixed waning for kinetis_mpudisable 
Missing header file added
 2017-06-06 15:18:01 -10:00
David Sidrane
36da2b91c5 Kinetis:USB-FS driver 
Removed the notion of attached. The khci_usbattach is call early in
   the init either in board_initalize or in board_app_initalize. In
   either case it is always done prior to the the class register.
   Therefore the khci_usbattach call only set a flag, and that
   flag is only tested in the class register. The class register will
   enable the soft connect pull up.
 2017-06-06 14:39:00 -10:00
David Sidrane
cb62675b5e Kinetis:sim ensure isolation of clock dividers for 0 value case 
This fixes a bug were a SoC does not have a clockdivN register
   and passes a 0 for the init value. This prevents overflow of
   the 0 decremented to -1 (0xffffffff) spilling over to other
   clockdivN feilds.
 2017-06-06 14:38:59 -10:00
David Sidrane
60c552ae0f Kinetis:usbdev clean up ensuring proper use of HW. 
Remove magic numbers from code, documented the use of
  undocumented bits.

  Remove comments and code that were not appropriate for this
  hardware.

  Removed ifdef that's that were always compiled and removed code
  blocks that were never compiled.

  Ensure proper access order to hardware.
  Per the reference manual: disable endpoints prior to configuring buffer
  descriptor, then enable endpoints
  Reorganize interrupt processing order to offload data after processing
  errors.

  Reorganize initialization so that there is a clear initialization phase,
  reset phase for both the hardware and software structures.

  By breaking the initialization into smaller pieces, the reset interrupt
  only resets the resources within the controller that should be reset.

  Rework suspend and resume logic so they perform properly

  Made attach and detach functions optional. As they do not make sense for
  a bus powered device.

  Ensured the calls to up_usbinitalize up_usbuninitalize do not violate the
  USB spec.
 2017-06-06 14:38:59 -10:00
David Sidrane
c1a3208f83 Kinetis:Disable MPU when not in protected mode. 
The hardware reset state of the the MPU precludes any bus
   masters other then DMA access to memory. Unfortunately
   USB and SDHC have there own DMA and will not have access to
   memory in the default reset state.

   This change disabled the MPU if present on system startup.
 2017-06-06 14:38:58 -10:00
Gregory Nutt
4d46979a6f Tiva SSI: Resolves issue 52 'Copy-Paste error in tiva_ssibus_initialize()' submitted by Aleksandr Kazantsev. 2017-06-01 06:38:47 -06:00