CortexR52 can have a optional FPU.
- VFPv3 with FP16
- Option 1: 16 x double-prevision registers - -mfpu=vfpv3-d16-fp16
- Option 1: 32 x double-prevision registers - -mfpu=vfpv3-fp16
This commit aims to provide a way to get the current applied defconfig on runtime by providing CONFIG_BASE_DEFCONFIG that is updated when the configure and build scripts are run.
Summary:
- I noticed that ./tools/configure.sh fvp-armv8r:nsh_smp shows
warning: (ARCH_CHIP_FVP_R52 && ARCH_CHIP_FVP_R82) selects ARMV8R_HAVE_GICv3 which has unmet direct dependencies (ARCH_ARM && ARCH_ARMV8R)
- I think ARMV8R_HAVE_GICv3 is only used for aarch32.
- This commit fixes this issue.
Impact:
- None
Testing:
- Tested with nsh_smp on FVP
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
This adds functionality to map pages dynamically into kernel virtual
memory. This allows implementing I/O remap for example, which is a useful
(future) feature.
Now, the first target is to support mapping user pages for the kernel.
Why? There are some userspace structures that might be needed when the
userspace process is not running. Semaphores are one such example. Signals
and the WDT timeout both need access to the user semaphore to work
properly. Even though for this only obtaining the kernel addressable
page pool virtual address is needed, for completeness a procedure is
provided to map several pages.
During initialization it isn't possible to use up_puts once it's
protected against concurrent access through a mutex lock. Instead,
using up_putc makes it similar to ESP32S2 and ESP32S3 and perfectly
fits for showprogress usage.
This commit reverts 19f269e54b and
substitutes the semaphore to a mutex, used as a locking mechanism
to avoid syslog messages being messed.
Considering SMP, threads running on different CPUs could call
syslog_default_write simultaneously. It then calls `up_nputs` that,
in most of the implementations, calls `up_putc` multiple times to
write to the serial. So, calling it at the same would cause syslog
messages to interfere with each other.
`up_nputs` and `up_putc` are low-level functions that could be used
during initialization and by the interrupt handler. Hence, it isn't
advisable to implement any locking mechanism on them. On the other
hand, syslog can also be used from the interrupt: if the interrupt
buffer is selected (`CONFIG_SYSLOG_INTBUFFER=y`), the syslog
messages will be flushed when we aren't serving an interrupt.
On the contrary, if it isn't set, it would call the registered
`sc_force` callback, which calls `syslog_default_putc` instead of
the lock-protected `syslog_default_write`.
in the initial impl, the regex is depends on ALLOW_MIT_COMPONENTS, and
if other modules want to use regex, also needs to depends on
ALLOW_MIT_COMPONENTS, which is ambiguity, so we provide a seperate
kconfig option for regex: LIBC_REGEX, which is depends on
ALLOW_MIT_COMPONENTS, but is enabled by default. Thus if
ALLOW_MIT_COMPONENTS is enabled, then the LIBC_REGEX is also enabled
either automatically, and this is more clear than controlled by
ALLOW_MIT_COMPONENTS option only.
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
Basic work required for uniprocessor CortexR52 (ARMv8R AARCH32) using
GICv3 and CP15 mapped arch timer.
Tested on ARM FVP 11.20.
Port is based on ARMv8R AARCH64 and ARMv7R code. Excuse possible copy-paste leftovers.
When a task needs to send data, a callback is allocated and the
transmission is happening in a worker task through devif_send.
Synchronization between the two tasks (sender & worker) is
achieved by a semaphore.
If devif_send fails, this semaphore was never posted, leaving
the sending task blocked indefinitely. This commit fixes this
by checking the return code of netif_send, and posting this
semaphore in case of failure.
Polling then stops, and execution is resumed on the sending
task.
Summary:
- I noticed that the driver sends incorrect packets sometimes.
- This commit fixes this issue.
Impact:
- None
Testing:
- Tested with qemu-7.1
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Remove unnecessary reading of the status register when loading / unloading
the FIFOs. Reading from the IP block is slow due to BUS synchronization and
this basically makes the SPI busy loop for no reason at all, destroying the
CPU usage.
The overall benefit of these changes is approx. 25%-points, which is a
MASSIVE improvement.
