serial single-wire: add possibility to specify pull-up instead of open drain
Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Master
* Revert "Merged in yanqil-br/feature-multi_chan_pwm (pull request #973)"
This reverts commit aef0e0b538.
* arch/arm/src/{stm32/stm32f7/stm32h7/stm32l4}/stm32_pwm.c: configure multi-channel duty only if channel specified. This allows you to update duty cycle for a single channel
* nucleo-f303re/configs: add basic NSH configuration
* nucleo-f303re/configs/pwm: enable console on UART2 and set entry point to nsh_main
Approved-by: Gregory Nutt <gnutt@nuttx.org>
stm32f7: USART1_RXDMA is dependent on STM32F7_DMA2 not STM32F7_DMA1
Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Alan Carvalho de Assis <acassis@gmail.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/tiva/Kconfig:
Remove EXPERIMENTAL dependency on TIVA_TIMER16_PWM.
arch/arm/src/tiva/common/tiva_timerlib.c:
Fix wrong 32/16-bit ifdef checks.
Add tiva_pwm16_sel_event() to choose GPTMCTL.TnEVENT value.
Implement tiva_pwm_mode16().
tiva_timer16_setinterval(): Fix wrong check for TIMER16_MODE_ONESHOT
and TIMER16_MODE_PERIODIC. Was comparing to config->cmn.mode
which can never have those values. This prevented interrupts being
enabled. Compare to timer->mode instead.
Add tiva_timer16pwm_setperiodduty() to set initial period, duty cycle,
and enable interrupts if requested in GPTM peripheral. Interrupts
are not enabled in NVIC until tiva_timer16_start() is called.
Add tiva_timer16pwm_setduty() to update duty cycle at any time.
arch/arm/src/tiva/hardware/lm/lm3s_timer.h,
arch/arm/src/tiva/hardware/lm/lm4f_timer.h,
arch/arm/src/tiva/hardware/tm4c/tm4c123_timer.h,
arch/arm/src/tiva/hardware/tm4c/tm4c129_timer.h:
Add missing defines; make surrounding defines consistent.
arch/arm/src/tiva/tiva_timer.h:
Add new TIMER_FLAG_* configuration flags to enable configuring the
16-bit PWM feature. Extend type of "flags" in tiva_timer32config_s
and tiva_timer16config_s from 8- to 32-bits to allow more flags.
If we are using the BASEPRI register to disable interrupts, then the answer is that we must disable ONLY the "normal interrupts". That is because we cannot disable SVCALL interrupts and we cannot permit SVCAll interrupts running at a higher priority than the high priority interrupts (otherwise, they will introduce jitter in the high priority interrupt response time.)
Hence, if you need to disable the high priority interrupt, you will have to disable the interrupt either at the peripheral that generates the interrupt or at the NVIC. Disabling global interrupts via the BASEPRI register cannot effect high priority interrupts.
arch/arm/src/tiva/common/tiva_timerlib.c:
* tiva_gptm_configure() and tiva_gptm_release(): Fix error: Was calling
tiva_emac_periphrdy() instead of tiva_gptm_periphrdy().
arch/arm/src/tiva/tiva_timer.h:
* Fix error in "abcde" description of bit flag defines.
kinetis:i2c transfer ensure correct result returned
kinetis_i2c_transfer released the mutex then fetched
the state, this resulted in returning the correct
results.
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Move boards to boards folder
* boards: rename configs folder to boards
This is the proposed layout after the change:
boards: - folder containing board folders
<board>: - name of each board
drivers: - extra drivers specific for platform
include: - header files for the boars
scripts: - extra scripts specific for platform
src: - board specific code
tools: - extra tools specific for platform
<config>: - board specific configuration(s)
Note:
<xxx> names are dependent on platform
This is a logical change to aim to the arch layout but this is a
huge change it should be done in several steps to lower the risk.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Kconfig: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Makefile: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Makefile.*: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Make.defs: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .sh: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .mk: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .c & .h: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .bat: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Rationale: TM4C1294NC is ambiguous:
TM4C1294NCPDT is a 128-TQFP
TM4C1294NCZAD is a 212-NFBGA
The TM4C1294NC part currently supported by NuttX is the TM4C1294NCPDT used on the TI EK-TM4C1294XL "Connected LaunchPad" (see configs/tm4c1294-launchpad). To ensure the correct part is fully specified, this commit updates all TM4C1294NC identifiers to TM4C1294NCPDT.
Rename:
CONFIG_ARCH_CHIP_TM4C1294NC to CONFIG_ARCH_CHIP_TM4C1294NCPDT
ARCH_CHIP_TM4C1294NC to ARCH_CHIP_TM4C1294NCPDT
TM4C1294NC to TM4C1294NCPDT
Rationale: In terms of firmware programming, there is no functional difference between these parts:
TM4C123GH6PMI7
TM4C123GH6PMI7R
TM4C123GH6PMT7
TM4C123GH6PMT7R
From a programming standpoint, all of the above parts are TM4C123GH6PM, which means it doesn't make sense to differentiate between PM and PMI. (The PM means 64-LQFP. The I means temperature range -40C to +85C. It could be T meaning -40C to +105C. The R means it ships in Tape and Reel packaging as opposed to Tray.)
arch/arm/include/tiva/chip.h:
arch/arm/include/tiva/tm4c_irq.h:
arch/arm/src/tiva/hardware/lm/lm3s_flash.h:
arch/arm/src/tiva/hardware/tm4c/tm4c_pinmap.h:
configs/tm4c123g-launchpad/README.txt:
configs/tm4c123g-launchpad/nsh/defconfig:
Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM
arch/arm/src/tiva/Kconfig:
configs/Kconfig:
Rename: ARCH_CHIP_TM4C123GH6PMI to ARCH_CHIP_TM4C123GH6PM
arch/arm/src/tiva/hardware/tm4c/tm4c_memorymap.h:
Rename: CONFIG_ARCH_CHIP_TM4C123GH6PMI to CONFIG_ARCH_CHIP_TM4C123GH6PM
Remove redundant Peripheral Base Addresses section. There were two identical copies, one for CONFIG_ARCH_CHIP_TM4C123GH6PMI and another for CONFIG_ARCH_CHIP_TM4C123GH6PM.
Testing of the WiFi is minimal so far but functionality is proven. I'm specifically not happy that the driver doesn't recover elegantly from a DMA data checksum failure, but that is an issue that can be dealt with in due course ... I'm trying to get the rest of the interfaces fleshed out and the hardware proven so it can go for pre-production build. I _think_ there's only Bluetooth and USB-device left to implement now.
- Fix for mx25rxx driver as it does not work properly
- Add mx25rxx memory chip & smartfs support in b-l475e-iot01a/nsh config
- Update smartfs smart_scan() function
stm32f7: Fixes bad preprocessor logic preventing USB OTG HS to work when used without external ULPI.
Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Add support for LPC40xx family chips
* Corrected a few peripheral definitions and pin functions for the LPC17xx family.
Added configuration options, chip definitions, and additional pin functions for the LPC40xx family.
Added board configurations for Embedded Artists LPC4088 Quickstart board and LPC4088 Developer's kit. These configurations are still something of a work in progress. In particular, the LCD functionality is untested.
* First pass rename in *.c and *.h files.
* Renamed LPC17XX to LPC17XX_40XX in config files
* Rplaced LPC17xx with LPC17xx/LPC40xx in .c files
* Replaced LPC17xx with LPC17xx/LPC40xx in .h files
* Updated some documentation
* Working on moving directories
* moved arch/arm/src/lpc17xx and arch/arm/include/lpc17xx to lpc17xx_40xx
* Renamed LPC17_* constants / configuration options to LPC17_40_*
* Updated chip family name defines
* Renamed some chip-specific files
* Updated references to renamed files
* Updated references to lpc17_ to lpc17_40_
* Renamed source files from lpc17_* to lpc17_40_*
* Clean up white space
Approved-by: Gregory Nutt <gnutt@nuttx.org>
drivers/lcd/tda19988.c: Now uses the new common videomode structure of include/nuttx/video/videomode.h as do other video components.
video/, include/nuttx/video/videomode.h: Separate EDID and from videomode managment. They really are separate things.
back at physical address 0x2007C000 and 0x20080000 (i.e. right below and right
above a 512 KiB boundary). Memory from those two blocks is considered
continuous when assigned to a heap.
In the protected build mode, when the memory protection unit is used, though,
it must be split into two MPU regions. This is because MPU regions must be
naturally aligned, and the 32KiB continuous address space of the two 16KiB AHB
SRAM blocks does not start at an address divisible by 32KiB.
The only other configurations that use protected build mode on lpc17xx are
currently open1788/knsh and open1788/knxterm. The LPC1788 has the AHB SRAM
blocks mapped more sanely (from an MPU region point of view), which is
probably why no problems emerged here. Both still compile with my change and
other than wasting an MPU region (which would otherwise remain unused) should
work fine. That said, I have no hardware to confirm.
