boards: arm: cxd56xx: audio: add power_control and audio_tone_generator
* boards: arm: cxd56xx: audio: add power_control
Add a simeple way to control the audio power for userspace apps
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: arm: cxd56xx: audio: add audio_tone_generator
Add a simple way to control the audio buzzer with defined frequency
for userspace apps
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
1. Serial (UART) driver (13 ports)
2. Ethernet driver
This port is provided on two boards
1. RSK RX65N-2MB
2. GR-Rose
The port is built on Cygwin environment.
As part of this port, we have created two documents
1. Readme.txt for each board
2. User manual to provide information about development environment setup
Both these documents are placed under
1. /boards/renesas/rx65n/rx65n-grrose
2. /boards/renesas/rx65n/rx65n-rsk2mb
We have run 'nxstyle' for coding guidelines and 'ostest' for testing NuttX features on test platform.
We have shared the log with no errors as confirmation of valid port.
arch/arm/src/stm32f0l0g0: Pinmap TIM1 GPIOs available for STM32G0
arch/arm/src/stm32f0l0g0: Add TIM driver lowerhalf
arch/arm/src/stm32f0l0g0/stm32_tim_lowerhalf.c: Handle 32-bit overflow on some calculations.
arch: armv7-m: Fix a deadlock in up_sigdeliver() in SMP mode.
In previous implementation, up_disable_irq() was called before
recovering local context. However, I noticed a deadlock happens
in the following situation. For example, if up_sigdevliver() is
in progress on CPU0 and CPU1 has called up_cpu_paused to CPU0,
hence g_cpu_irqlock has been locked by CPU1, in this case,
we would see a deadlock in later call of enter_critical_section()
to restore irqcount.
To avoid this situation, we need to call enter_critical_section()
to break the deadlock.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Spresense smp
* arch: arm: Add ARCH_GLOBAL_IRQDISABLE to ARCH_CHIP_CXD56XX in Kconfig
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch: arm: cxd56xx: Make fpuconfg() public in cxd56_start.c
NOTE: fpuconfig() is called in both cxd56_start.c and cxd56_cpustart.c
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch: arm: cxd56xx: Add support for SMP
NOTE: To run cxd56xx in SMP mode, new boot loader which will be
released later must be used.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch: arm: cxd56xx: Add irq routing for SMP in cxd56_irq.c
NOTE: In cxd56xx, each external interrupt controller can be
accessed from a local APP_DSP (Cortex-M4F) only. This commit
supports IRQ routing for SMP by calling up_send_irqreq() in
both up_enable_irq() and up_disable_irq().
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* boards: spresense: Add smp configuration
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
cxd56xx: various fixes
* arch: arm: cxd56xx: Support to set any i2c frequency
This commit supports to be able to set the i2c frequency other than just
100 or 400 Hz.
* arch: arm: cxd56xx: Enable SD clock during access to SD card
- Improve GNSS low sensitivity with SD card inserted
- Reduce power consumption by stopping SD clock
* arch: arm: cxd56xx: Do PANIC() when cpu rx fifo is overflow
If CPU Rx FIFO is overflow, it's fatal error for system. In such a case,
this commit changes to allow the user to notice by calling PANIC() for
debuggability enhancement.
* arch: arm: cxd56xx: Fix compile error in sdhci debug code
* arch: arm: cxd56xx: Remove assertion in cpu tx queue
When CPU Tx queue is overflow, it returns -EAGAIN instead of assertion
to be able to retry.
* arch: arm: cxd56xx: Add configurations for cpu fifo elements
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: Fix LPADC configuration
LPADC options defined in the same symbol name, so kconfig tool
couldn't process them correctly.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: Update loader and gnssfw ver.17660
* arch: arm: cxd56xx: Fix hang-up when error interrupt occurs
Fix a problem that error interrupts are not cleared.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arch: arm: cxd56xx: Fix sdhci semaphore
Fix inital value of semaphore in sdhci drive.r
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* boards: cxd56xx: Treat the initial value of LNA power as off
LNA is always turned power on when GNSS is started. So it is desirable
that the initial value of the LNA power is off by default.
* boards: cxd56xx: Remove initial setting of PIN_AP_CLK
PIN_AP_CLK is used as a port selector of SDIO expander on the extension
board, and is set output low in initalizing. Therefore, this pin cannot
be used for other board. To avoid this restriction, remove this initial
operation because this pin is pulled down by default on the extension
board.
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Most of the bluetooth and wifi chips appear to need external firmware, and the 43438 is no exception. Fortunately, since Cypress got involved, these are much more straightforward to obtain and are shipped as part of their SDK, which is downloadable from their website. Those firmwares are already provided as C arrays, so their names just need updating to;
const unsigned char bt_firmware_hcd -> The bt firmware array.
const int bt_firmware_len = sizeof(bt_firmware_hcd);
arch/arm/src/stm32f0l0g0/stm32g0_rcc.c: Set VOS and flash wait states properly
arch/arm/src/stm32f0l0g0/stm32f0l0_pwr.c: Renamed from arch/arm/src/stm32f0l0g0/stm32_pwr.c
arch/arm/src/stm32f0l0g0/stm32g0_pwr.c: Preliminary implementation of PWR module for STM32G0 (stm32_pwr_setvos() only)
arch/arm/include/stm32f0l0g0: add support for STM32G070CB, STM32G070KB, STM32G070RB
arch/arm/src/stm32f0l0g0: add support for STM32G070CB, STM32G070KB, STM32G070RB
