Commit Graph

52883 Commits

Author SHA1 Message Date
vela-mib
9a4afbcb62 add drivertest test cases on sim for CI
Signed-off-by: vela-mib <vela-mib@xiaomi.com>
2024-04-11 10:33:15 -03:00
Yanfeng Liu
24df2cc177 mm/map: minor reformating
This is for easier grep searching.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-04-11 14:15:57 +08:00
hujun5
638716504d fdcheck: update fdcheck impl
1 store fd in the high position
2 removing the pid information , as the tag information is sufficient.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-04-11 10:45:44 +08:00
hujun5
6c24ff95d4 timer: use spin_lock_irqsave protect g_alloctimers
all other g_alloctimers being protect by spin_lock_irqsave

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-04-11 10:45:34 +08:00
Inochi Amaoto
bae686e127 arch/riscv: force using encoding macro for CSR access
Using CSR name depends on compiler support heavily, but CSR
encoding does not have this problem. It also make it easy to
add new CSR support even if the compiler does not support.

Unify CSR access by using the CSR encoding macro.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-11 10:43:48 +08:00
Emmanuel Ferdman
4847587cf2 Documentation: update broken links 2024-04-10 15:17:53 -03:00
wangjianyu3
f0590eeaf0 drivers/power/pm: Fix warning of type cast
Env: sim (Ubuntu 22.04.3 LTS (x86_64 GNU/Linux)), enable PM
```
power/pm/pm_autoupdate.c: In function ‘pm_auto_updatestate’:
power/pm/pm_autoupdate.c:84:46: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   84 |                      pm_auto_updatestate_cb, (FAR void *)domain, 0);
      |                                              ^
power/pm/pm_autoupdate.c:89:34: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   89 |           pm_auto_updatestate_cb((FAR void *)domain);
      |                                  ^
```

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-04-10 22:51:28 +08:00
Huang Qi
9e78b235fe riscv: Add more debug related CSR definitions
This patch adds more debug related CSR definitions
to arch/risc-v/include/csr.h.

These definitions are from the RISC-V Debug Specification
Version 1.0 rc1 (https://github.com/riscv/riscv-debug-spec).

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-04-10 21:10:39 +08:00
Omar
01aeeaeac6 ESP32S3 I2S GPIO selection master/slave hase same range for BCLK,WS pin 2024-04-10 15:00:45 +08:00
Omar
4c744f1c0e ESP32S3 configuring gpio pin 19 or 20 ( USB_D+/- ) for any purposes 2024-04-10 15:00:45 +08:00
Omar
b864522b65 ESP32S3 I2S BCLK, WSPIN, DINPIN, DOUTPIN pin range changed to 0 48 2024-04-10 15:00:45 +08:00
vela-mib
9847c6219d add libuv and cmocka test cases with file system on sim and qemu on CI
Signed-off-by: vela-mib <vela-mib@xiaomi.com>
2024-04-10 14:46:53 +08:00
Jukka Laitinen
729e9fc8e3 arch/arm64/src/Toolchain.defs: Add -mcpu=cortex-a55 if CONFIG_ARCH_CORTEX_A55 is defined
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-09 19:39:33 -03:00
Xiang Xiao
4ea2aeff6b arch: Remove xxx_intstack_top and xxx_intstack_alloc
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-04-09 16:59:00 -03:00
ligd
4e725ecd44 arch: color the intstack for all the CPUs
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
ligd
3844efb5b8 stack: update up_get_intstackbase API to support cpu id
For crash dump all the CPU intstack

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
meijian
93beeeeab0 [tcp/udp] fix port generation not in range
(port % max + min)may overflow uint16

Signed-off-by: meijian <meijian@xiaomi.com>
2024-04-09 23:35:55 +08:00
wangchen
b446a002db net:add customizable default max & min port
add customizable default max & min port

Signed-off-by: wangchen <wangchen41@xiaomi.com>
2024-04-09 23:35:55 +08:00
Zhe Weng
7f1e80f0de net/nat: Slightly optimize the IPv4 NAT
1. Reduce getting `old_ip` in `ipv4_nat_ip_adjust`.
2. Some format change.

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2024-04-09 14:44:26 +08:00
chao an
09e5dca965 sched/pthread: detached thread should destroy the join info
In order to ensure the detached thread obtain the correct return
value from pthread_join()/pthread_cancel(), the detached thread
will create joininfo to save the detached status after thread
destroyed.  If there are too many of detached threads in the
process group, the joininfo will consume too much memory.
This is not friendly to embedded MCU devices.
This commit keep the semantics as #11898 was introduced,
will no longer save joininfo for detached threads to avoid wasting memory.

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-09 13:46:51 +08:00
simbit18
9967989b02 Fix Kconfig style
Remove spaces from Kconfig files
Remove TABs
Add comments
2024-04-09 10:49:23 +08:00
Eren Terzioglu
c0d7419d11 esp32[c3|h2|c6]: Bugfixes for filesystem errors 2024-04-09 10:48:40 +08:00
Alan Carvalho de Assis
67dbdb18e3 stm32f76xx77xx_rcc: Fix PLLI2S factor divisors
Value was set with PLLSAI factor divisors instead of
PLLI2S factor divisors.

Signed-off-by: Alan C Assis <acassis@gmail.com>
2024-04-09 10:45:13 +08:00
zhanghongyu
a9bff735e7 net/can: deliver data into multiple CAN conn bound to same dev
Because CAN is a broadcast protocol, each conn needs to be given independent data to avoid mutual interference.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2024-04-09 00:25:44 +08:00
Alin Jerpelea
589bb56bcb Documentation: add NuttX-12.5.1 release notes
Add release notes for 12.5.1 release

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-04-08 21:40:59 +08:00
chenrun1
48a399479c Fixed CI issues caused by moving OSPERF in https://github.com/apache/nuttx-apps/pull/2346
====================================================================================
Cmake in present: qemu-armv8a/nsh_smp
Configuration/Tool: qemu-armv8a/nsh_smp
------------------------------------------------------------------------------------
  Cleaning...
  Configuring...
  Building NuttX...
On branch master
Your branch is up to date with 'origin/master'.

Changes not staged for commit:
  (use "git add <file>..." to update what will be committed)
  (use "git restore <file>..." to discard changes in working directory)
	modified:   boards/arm64/qemu/qemu-armv8a/configs/nsh_smp/defconfig

no changes added to commit (use "git add" and/or "git commit -a")

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-04-08 14:08:55 +08:00
Jukka Laitinen
5e5640992d arch/arm64/src/imx9/imx9_flexio_pwm.c: Fix wrong input scale and pulse width
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-08 03:02:42 +08:00
W-M-R
bbec17daff sim/kconfig: select ARCH_TOOLCHAIN_GNU
Missing ARCH_TOOLCHAIN_GNU option causes sim's kasan recursion

Signed-off-by: W-M-R <mike_0528@163.com>
2024-04-07 14:57:44 -03:00
Jorge Guzman
f7a98db234 stm32h7/fdcan: fixed kconfig and debug register
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-04-07 14:56:58 -03:00
Igor Mišić
510b6221ca stm32h7/stm32_i2c: fix sending large data over i2c
To trigger TC interrupt NBYTES needs to be set before RELOAD is disabled
2024-04-07 14:54:47 -03:00
Zhe Weng
a1a09f271f net/nat: Support Symmetric NAT
The symmetric NAT limits one external port to be used with only one peer ip:port.

Note:
1. To avoid using too much #ifdef, we're always passing peer_ip and peer_port as arguments, but won't use them under full cone NAT, let the compiler optimize them.
2. We need to find port binding without peer ip:port, so don't add peer ip:port into hash key.
3. Symmetric NAT needs to *select another external port if a port is used by any other NAT entry*, this behavior is exactly same as Full Cone NAT, so we don't need to change anything related to `ipv4_nat_port_inuse`.

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2024-04-07 23:57:55 +08:00
W-M-R
0ede3fc377 kasan: Implementing global variable out of bounds detection
Extracting global variable information using scripts:
kasan_global.py:
1. Extract the global variable information provided by the -- param asan globals=1 option
2. Generate shadow regions for global variable out of bounds detection
Makefile:
1. Implement multiple links, embed the shadow area into the program, and call it by the Kasan module

Signed-off-by: W-M-R <mike_0528@163.com>
2024-04-07 23:31:13 +08:00
Xiang Xiao
2fd73bd82f net: Fix max conn always one less than configured value
return NULL only when the total number is larger than configured value

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-04-07 10:42:56 -03:00
Zhe Weng
9ab0d8cce6 Documentation: Add docs for lower-half of netdriver
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2024-04-07 10:17:13 -03:00
chenrun1
d19486e1f8 driver/filemtd:support isbad & markbad
In this change, we can mount a filesystem on filemtd that works like Yaffs and works on the Nand driver

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-04-07 18:50:00 +08:00
chenrun1
4fc111965d filemtd:fix Fixed the issue of incorrect content returned when using nandflash earse
Nand_erase return result should be the number of blocks that were successfully erased in NuttX

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-04-07 18:50:00 +08:00
chenrun1
52f381fdd4 Adjust the apps/benchmarks directory and add some new Profile tools
Based on the adjustment of https://github.com/apache/nuttx-apps/pull/2346, update the Document

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-04-07 18:49:16 +08:00
Jorge Guzman
de29fe3102 stm32h7/linum-stm32h753bi: add support to zmodem
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-04-07 09:06:04 +08:00
Pressl, Štěpán
bf3a5bb4cb arch/arm/src/samv7/sam_pwm.c: adjust arch driver to DCPOL options
Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
2024-04-06 13:12:08 +08:00
Pressl, Štěpán
21de46a4d1 include/nuttx/timers/pwm.h: add dcpol attribute to pwm_chan_s
This attribute can set the default polarity of a disabled channel.
2024-04-05 17:14:23 -03:00
Michal Lenc
17e1d43f6d ioexpander/icjx: add support for change of input interrupts on NINT
iC-JX expander has NINT (not interrupt) pin that goes to logical zero
if interrupt occurs. This commit adds support for iC-JX options settings
that allows to enable the interrupt for defined input pins.

The interrupt is handled in HP worker thread to avoid waiting for SPI
transfers in interrupt context. Board has to configure interrupt event
for GPIO pin connected to NINT.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-04-05 15:23:10 -03:00
Jukka Laitinen
16b30ea659 boards/arm64/imx9/imx93-evk: Enable PWM from TPM3ch3 on imx93-evk pin GPIO_IO24
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-05 10:13:32 -03:00
Jukka Laitinen
0f596ec496 arch/arm64/src/imx9: Add TPM based PWM driver for IMX9
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-05 10:13:32 -03:00
Tiago Medicci Serrano
65bd548521 esp32[c3|c6|h2]: Fix RTC data placement
RTC data was not being correctly placed on RTC's memory data due to
linker issues. Also, the image's RTC memory segment was not being
properly parsed by the bootloader.
2024-04-05 02:50:19 +08:00
Jukka Laitinen
0040dcf858 boards/arm64/imx9/imx93-evk/configs/nsh/defconfig: Enable USB and CDCACM
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-04 15:47:32 -03:00
Jukka Laitinen
62a64b06bc arch/arm64/src/imx9: Add imx9 usb device driver
This is a modified version from imxrt driver, which has the same controller.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-04 15:47:32 -03:00
Jukka Laitinen
d1d5a4abfe arch/arm64/src/imx9/hardware/imx93/imx93_memorymap.h: Clean up some base address macros
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-04 15:47:32 -03:00
Jukka Laitinen
4d3b753a1a arch/arm64/include/imx9/imx93_irq.h: Define IRQ_USBx interrupt numbers
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-04 15:47:32 -03:00
Jukka Laitinen
193d490f77 boards/arm64/imx9/imx93-evk: Add PWM support utilizing flexio-pwm
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-04 23:17:59 +08:00
Jukka Laitinen
47f37e84ba arch/arm64/src/imx9: Flex-IO based PWM driver for imx9
This is a high resolution PWM driver, utilizing one 16-bit Flex-IO timer for
generating PWM period and the rest of the timers to generate PWM duty cycles.

This means that the period has to be the same for every PWM generated from one
FLEXIO block, but this way we can get 16-bit resolution for the PWM signals.

For a typical IMX9 HW there are 8 timers for each Flex-IO block, which means
that by using this driver one can get 7 PWM outputs from one block.

This driver can be later extended to have configuration options to use all
8 channels per flex-io by either using 8+8 -bit timer (less resolution) or by
using an external trigger from an LPIT.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-04-04 23:17:59 +08:00