Commit Graph

678 Commits

Author SHA1 Message Date
Petro Karashchenko
8d3bf05fd2 include: fix double include pre-processor guards
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-16 11:11:14 -03:00
Zeng Zhaoxiu
fb43fd73ed signal: signal handler may cause task's state error
For example, task is blocked by nxsem_wait(sem1), use nxsem_wait(sem2)
in signal handler, and take sem2 successfully, after exit from signal
handler to task, nxsem_wait(sem1) returns OK, but the correct result
should be -EINTR.

Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng@gmail.com>
2022-01-05 21:36:44 +09:00
chao.an
cf2dfa8985 arch/arm/assert: move the arm_assert to common code
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-28 05:09:30 -06:00
chao.an
579738c8fa arch/arm: move the backtrace implement to common code
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-28 03:02:01 -06:00
chao.an
a42aa8415d compile/flags: add FRAME_POINTER into Toolchain.defs
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-27 22:31:27 -06:00
chao.an
6069433d2d arch/arm/cortex-a/r: dump all registers with alias
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-23 06:54:32 -06:00
chao.an
a0b61bbf6f arm/cortex-a/r: enhance the task dump
add irq stack information
add cpu loading

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-22 11:46:02 -03:00
Petro Karashchenko
3e76c3266e assert: unify stack and register dump across platforms
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-20 00:02:12 -03:00
chao.an
b11833cbba arch/assert: flush the syslog before stack dump
flush the syslog before stack dump to avoid buffer overwrite

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-15 12:00:35 -06:00
chao.an
89e2f00dad arch/assert: fix the stack dump overflow
[ EMERG] kasan_report: kasan detected a read access error, address at 0x3c24fca8, size is 4
[ EMERG] up_assert: Assertion failed at file:kasan/kasan.c line: 104 task: init
[ EMERG] backtrace|10:  0x2c334666 0x2c35f0d6 0x2c359ef6 0x2c35f830 0x2c360ed4 0x2c3615c0 0x2c324e0c 0x2c30a168
[ EMERG] up_registerdump: R0: ffffffff R1: 00000004 R2: ffffffff R3: ffffffff
[ EMERG] up_registerdump: R4: 3c20d4f0 R5: 2c35acd5 R6: 00000000 FP: 3c24fae8
[ EMERG] up_registerdump: R8: 3c20d504 SB: ffffffff SL: 2c413e7c R11: 2c411eb8
[ EMERG] up_registerdump: IP: 00000002 SP: 3c24fae8 LR: 00000003 PC: 2c35f0d6
[ EMERG] up_registerdump: xPSR: 61010000 BASEPRI: 000000e0 CONTROL: 00000004

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-13 01:43:18 -06:00
chao.an
437a30d117 arch/tcbinfo: fix build break if task name disabled
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-06 00:47:58 -06:00
zhuyanlin
012bd1494c arch:debug: add struct for task aware debug.
When enable DEBUG_TCBINFO config, a global struct will
provide, then debuggers can aware nuttx task infomation.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-11-10 14:31:10 -03:00
Abdelatif Guettouche
7549de49b4 arch/*_cpupause:Allow a spin before taking the g_cpu_wait spinlock.
If we repeatedly call up_cpu_pause and up_cpu_resume, there would be
cases where the next call to up_cpu_pause happens while the other CPU is
still responding to the previous resume request. In this case the
DEBUGASSERT will trigger. We should allow the first CPU to wait until the
other CPU has finished responding to the resume request.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-17 21:10:23 +09:00
YAMAMOTO Takashi
58bdcbab9b Revert "Make: use gcc as LD"
This reverts commit 45672c269d.

Because:

* It's very confusing to have cc as LD.
* I don't see what "-nostartfiles -nodefaultlibs" in LDFLAGS are
  supposed to do when we use LD directly. It would be simpler to
  remove them from our LDFLAGS.
2021-09-08 09:40:48 +08:00
YAMAMOTO Takashi
5ad1cba338 Revert "arch: Replace ar and nm with gcc-ar and gcc-nm"
This reverts commit b05737d78f.

Because it broke clang-based builds.
2021-09-07 10:54:15 +08:00
Xiang Xiao
b05737d78f arch: Replace ar and nm with gcc-ar and gcc-nm
to make enable LTO easily

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-02 10:02:14 -03:00
Xiang Xiao
b0c782255c libxx: Change CXX_LIBSUPCXX to LIBSUPCXX
align with other Kconfig(e.g. LIBCXXABI, LIBCXX, UCLIBCXX)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-28 17:14:48 -03:00
chao.an
d5d6297ca1 arch/arm/assert: enhance the assert dump
show the all tasks info including backtrace and registers

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-08-26 13:31:08 +08:00
chao.an
f14bd44001 arch/armv7: add up_backtrace support based on frame pointer
This feature depends on frame pointer, "-fno-omit-frame-pointer" is mandatory

This feature can not be used in THUMB2 mode if you are using GCC toolchain,
More details please refer:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92172

Signed-off-by: chao.an <anchao@xiaomi.com>
2021-08-26 13:30:08 +08:00
Abdelatif Guettouche
5ff703d5d0 arch/*_testset: Fix few typos.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-25 00:20:20 +08:00
Abdelatif Guettouche
5b350f3a0f arch/*_reprioritizertr.c: Fix typos in comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-14 11:19:34 -07:00
Abdelatif Guettouche
054e284785 *_cpustart.c: Fix typos in function description.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-11 11:06:27 +09:00
Nathan Hartman
609ee6b54b Fix typos in comments and identifiers 2021-07-19 22:55:30 -03:00
ligd
aac0db368c ARM: fix CPSR corruption after exception handling
It seems to be caused by the corrupted or wrong CPSR restored on return
from exception. NuttX restores the context using code like this:

    msr spsr, r1

GCC translates this to:

    msr spsr_fc, r1

As a result, not all SPSR fields are updated on exception return. This
should be:

    msr spsr_fsxc, r1

This bug has been fixed by Heesub Shin in:
343243c7c0

Change-Id: Ibc64db7bceecd0fb6ef39284fb5bc467f5603e2e
2021-07-19 08:41:06 -03:00
Xiang Xiao
98b5724b59 arch: Fix rtcb can't found error
use the same condition check in declaration and reference

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I7b05316e914708fceeddac394d784ee3720a3c1b
2021-07-16 12:48:09 -03:00
Xiang Xiao
e97ffb1f79 arch/armv7-a: Remove the special SMP SGI process
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Iaf7fe77a3ab7cbf145d907dafb0b7ca54cc4a012
2021-07-09 07:53:05 +09:00
ligd
50eee2f081 arm: fix enable interrupt too earlier caused system crash
reason:
	msr	cpsr, r2   /* Set the CPSR */

    // interrupt hanppend, context switch

	pop	{r0-r2, pc}

resolve:
    use SPSR instead, and recover with ldmia ^

Change-Id: Id7cee6452997ec19919eeecf6e7616164b3a0ab3
Signed-off-by: ligd <liguiding1@xiaomi.com>
(cherry picked from commit 6fa6c1676932d7babb7ff22ef556a17bb18f1c0d)
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-01 22:20:36 -05:00
Jiuzhu Dong
2fd25d7ea7 arch/armv7-a: Colorize the idle thread stack for other cpu(SMP)
Keep previous modification.

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-06-11 01:26:50 -05:00
Xiang Xiao
c0fdddc5d7 arch: Remove all go_nx_start from chip specifc source
since the idle stack color is done in the common code now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-10 06:50:41 -07:00
Xiang Xiao
fa0d123f87 arch: Colorize the idle thread stack in an unified way
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idae8da53e5a4799a8edc0e882f17fd515b70cb14
2021-06-10 06:50:41 -07:00
Alexander Vasiljev
45672c269d Make: use gcc as LD 2021-06-10 03:43:18 -07:00
Xiang Xiao
6576306bca arch: Rename xxx_getsp to up_getsp
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-09 10:20:02 -07:00
Xiang Xiao
2e54df0f35 Don't include assert.h from public header file
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-03 08:36:03 -07:00
Xiang Xiao
d7f96003cf Don't include debug.h from public header file
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-01 06:42:02 +09:00
Huang Qi
f4a0b7aedd libc: Call pthread_exit in user-space by up_pthread_exit
Drop to user-space in kernel/protected build with up_pthread_exit,
now all pthread_cleanup functions executed in user mode.

* A new syscall SYS_pthread_exit added
* A new tcb flag TCB_FLAG_CANCEL_DOING added
* up_pthread_exit implemented for riscv/arm arch

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-05-21 22:46:52 -06:00
Huang Qi
81a01d089b libc/pthread: Fix comment and document issue
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-05-21 22:46:52 -06:00
Gregory Nutt
bb9b58bdde libc: Move pthread_create to user space
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Change-Id: I5c447d94077debc79158686935f288e4c8e51e01
2021-05-21 22:46:52 -06:00
chao.an
6c40185985 arm/v7-a/fpu: add VFP-v3 D32 support
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-05-21 09:55:00 -03:00
Gustavo Henrique Nihei
f8a36f10c3 arch: Uniformize optimization flag setting across architectures 2021-04-29 19:17:16 -07:00
Masayuki Ishikawa
1b00e5d518 spinlock: Remove SP_SECTION
Summary:
- SP_SECTION was introduced to allocate spinlock in non-cachable
  region mainly for Cortex-A to stabilize the NuttX SMP kernel
- However, all spinlocks are now allocated in cachable area and
  works without any problems
- So SP_SECTION should be removed to simplify the kernel code

Impact:
- None

Testing:
- Build test only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-20 22:41:44 -05:00
Masayuki Ishikawa
1a9e7efde5 smp: Remove CONFIG_SMP_IDLETHREAD_STACKSIZE
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
  the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code

Impact:
- All SMP configurations

Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)

Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
2021-04-19 21:46:39 -05:00
Xiang Xiao
2335b69120 arch: Allocate the space from the beginning in up_stack_frame
arch: Allocate the space from the beginning in up_stack_frame

and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
Xiang Xiao
8640d82ce0 arch: Rename g_intstackbase to g_intstacktop
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
Xiang Xiao
3f67c67aaf arch: Fix the stack boundary calculation and check
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-10 08:39:54 -07:00
Alin Jerpelea
ce08e0ca6c arch: armv7-a: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Xiang Xiao
a7f7796db1 arch/arm: Change all spsr_cxsf to spsr
unify the SPSR register usage

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 06:44:37 +09:00
Xiang Xiao
3c30c8b90b arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp
to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 22:45:51 +09:00
Xiang Xiao
7d3266461b arch/armv7-a: Remove the special process of the nest level
it shouldn't need anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 17:07:46 +09:00
Xiang Xiao
807d4490da arch/arm: Minor style fix
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 13:19:20 -07:00
Xiang Xiao
39fc9325cf arch/arm: Replace "b lr" or "mov pc, lr" with "bx lr"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:50:14 -07:00
Xiang Xiao
e7dffdf06f arch/arm: Replace the hardcode syscall number with macro
and change SYS_context_[save|restore] to SYS_[save|restore]_context

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 16:18:10 -03:00
Xiang Xiao
2268c19171 arch/arm: Fix the style issue in assemble files
remove the unused header file and mimic the difference between sub arch

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 14:39:16 +01:00
Huang Qi
2e2af6e3d7 arch/arm: Use macro defined swi range in dispatch_syscall
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Change-Id: Ia8503a13c5b04fa8cc13cee74b75b19623986c1d
2021-03-26 09:13:59 -07:00
Xiang Xiao
4e66d55a17 arch/arm: Fix the style warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-26 17:01:24 +01:00
Alin Jerpelea
3ea545e7f3 arch: arm: armv7-a: fix nxstyle errors
Fix nxstyle errors to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
1d1da330da arch: arm: armv7-a: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Gustavo Henrique Nihei
330eff36d7 sourcefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
ligd
f9d20ea4d2 sigdeliver: fix system block when kill signal to idle in SMP
Bug description:

CONFIG_SMP=y

Suppose we have 2 cores in SMP, here is the ps return:

PID GROUP CPU PRI POLICY TYPE    NPX STATE     STACK   USED  FILLED COMMAND
  0     0   0   0 FIFO   Kthread N-- Assigned 004076 000748  18.3%  CPU0 IDLE
  1     0   1   0 FIFO   Kthread N-- Running  004096 000540  13.1%  CPU1 IDLE

nsh> kill -4 0
or:
nsh> kill -4 1

system blocked.

Reason:

In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.

Fix:

Add condition to cover saved_irqcount == 0.

Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-03-03 15:03:32 +00:00
Xiang Xiao
94da3e4c3a arch: Remove critical section inside up_schedule_sigaction
since nxsig_tcbdispatch already hold it for us

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2fe6ad840bdca3ec0eaa76a9af3b6929c7d5a721
2021-01-22 08:34:07 +01:00
Xiang Xiao
efee1c6ded arch: Initialize the idle thread stack info directly
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-16 09:54:29 +09:00
Masayuki Ishikawa
b599823f3b arch: armv7-a: Remove unnecessary #ifdef CONFIG_SMP in arm_unblocktask.c
Summary:
- Because this_task() returns the current task of the current CPU

Impact:
- SMP only

Testing:
- Tested with sabre-6quad:smp (QEMU)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-10 20:27:59 -06:00
Masayuki Ishikawa
409c65ce0b arch, sched: Fix global IRQ control logics for SMP
Summary:
- This commit fixes global IRQ control logic
- In previous implementation, g_cpu_irqset for a remote CPU was
  set in sched_add_readytorun(), sched_remove_readytorun() and
  up_schedule_sigaction()
- In this implementation, they are removed.
- Instead, in the pause handler, call enter_critical_setion()
  which will call up_cpu_paused() then acquire g_cpu_irqlock
- So if a new task with irqcount > 1 restarts on the remote CPU,
  the CPU will only hold a critical section. Thus, the issue such as
  'POSSIBLE FOR TWO CPUs TO HOLD A CRITICAL SECTION' could be resolved.
- Fix nxsched_resume_scheduler() so that it does not call spin_clrbit()
  if a CPU does not hold a g_cpu_irqset
- Fix nxtask_exit() so that it acquires g_cpu_irqlock
- Update TODO

Impact:
- All SMP implementations

Testing:
- Tested with smp, ostest with the following configurations
- Tested with spresense:wifi_smp (NCPUS=2,4)
- Tested with sabre-6quad:smp (QEMU, dev board)
- Tested with maix-bit:smp (QEMU)
- Tested with esp32-core:smp (QEMU)
- Tested with lc823450-xgevk:rndis

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-10 08:33:42 +01:00
YAMAMOTO Takashi
83b24f0382 arch/arm/src/armv7-a/arm_syscall.c: Fix syslog formats 2020-12-06 07:41:37 -06:00
Masayuki Ishikawa
16436a7fb6 Revert "arch: armv7-a: Fix the pause handler for SMP"
This reverts commit 1978dcc9a9.
2020-11-25 00:02:37 +01:00
Masayuki Ishikawa
1978dcc9a9 arch: armv7-a: Fix the pause handler for SMP
Summary:
- Apply the same logic added to cxd56_cpupause.c

Impact:
- SMP only

Testing:
- Tested with sabre-6quad:smp (QEMU and dev board)
- Run smp and ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-20 00:49:25 -08:00
Masayuki Ishikawa
13f3f84bae arch: armv7-a: Remove unnecessary d-cache operation in arm_cpustart.c
Summary:
- Remove unnecessary d-cache operation to make boot fast

Impact:
- armv7-a SMP only

Testing:
- Tested with sabre-6quad:smp (QEMU and dev board)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-16 00:53:17 -08:00
Masayuki Ishikawa
ad81db2272 arch: armv7-a: Fix arm_l2cc_pl310.c with DEBUGASSERT()
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-16 00:53:17 -08:00
Masayuki Ishikawa
a813d27f5f arch: armv7-a: Fix comile errors in l2cc_pl310.h
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-16 00:53:17 -08:00
Masayuki Ishikawa
c52d83abc2 arch: armv7-a: Fix compile errors in arm_l2cc_pl310.c
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-16 00:53:17 -08:00
Masayuki Ishikawa
2039e2a565 arch: armv7-a: Fix style warnings in l2cc_pl310.h
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-16 00:53:17 -08:00
Masayuki Ishikawa
94b43b93e5 arch: armv7-a: Fix style warnings in arm_l2cc_pl310.c
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-16 00:53:17 -08:00
Masayuki Ishikawa
a20463642e arch: armv7-a: Fix MMU settings for SDRAM in SMP mode
Summary:
- This commit fixes armv7-a deadlocks with D-cache in SMP mode.
- In SMP mode, MMU for SDRAM area must be set to shareable

Impact:
- SMP only

Testing:
- Tested with sabre-6quad:smp (QEMU and dev board)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-14 16:40:01 -08:00
Masayuki Ishikawa
812257d058 arch: armv7-a: Fix style warnings in mmu.h
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-14 16:40:01 -08:00
Masayuki Ishikawa
904a602c74 arm: armv7-a: Fix kernel stack dump in arm_assert.c
Summary:
- This commit fixes kernel stack dump information

Impact:
- Affects armv7-a with kernel build

Testing:
- Built with sama5d4-ek:knsh
- Not tested

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
6e12f3c782 armv7-a, imx6: Refactor interrupt stack related code
Summary:
- Remove -4/-8 offset coding in imx_irq.c and arm_vectors.S
- Instead, add SP adjustment after calling setirqstack/setfiqstack
- Fix off-by-one irq/fiq stack allocation in 8-byte aligned arch
- Fix comments on the user stack pointer in arm_vectors.S
- Also, fix up_dumpstate() to extract the user stack pointer
- NOTE: stack pointer alignment is 8-byte

Impact:
- Affects armv7-a with interrupt stack enabled

Testing:
- Tested with sabre-6quad:smp with QEMU
- Tested with sabre-6quad:nsh with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
eddf1189be arch: armv7-a: Fix CPUx IDLE stack top for SMP
Summary:
- This commit fixes CPUx IDLE stack top for SMP
- Also removes SMP_STACK_TOP from smp.h

Impact:
- Affects armv7-a SMP only

Testing:
- Tested with sabre-6quad:smp (QEMU)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
9120a3022d arch: armv7-a: Fix style warnings in arm_cpuidlestack.c
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Masayuki Ishikawa
92ebbd7d21 arch: armv7-a: Fix style warnings in smp.h
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Xiang Xiao
eb4121ce38 Change all 'Nuttx' to 'NuttX'
Unify the naming convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-10-20 01:45:06 -07:00
Xiang Xiao
525f6da1c0 arch/armv7-a: Fix the wrong idle stack setup for SMP case
1.Get the stack pointer from sp instead of .Lstkinit's field
2.Make g_idle_topstack point to the end of the idle stack

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-10-19 09:43:58 +09:00
Nathan Hartman
80ce7800a9 Sources and Docs: Fix typos and nxstyle issues
Documentation/contributing/coding_style.rst:

    * Fix repeated words: ("this this").
    * Remove trailing spaces.

boards/z80/z80/z80sim/README.txt:

    * Fix repeated words: ("this this") and rewrap lines.

graphics/Kconfig,
libs/libc/math/Kconfig:

    * Fix repeated words: ("this this").

arch/arm/src/armv7-a/arm_assert.c,
arch/arm/src/armv7-r/arm_assert.c,
arch/arm/src/imxrt/imxrt_enet.c,
arch/arm/src/kinetis/kinetis_enet.c,
arch/arm/src/kinetis/kinetis_flexcan.c,
arch/arm/src/s32k1xx/s32k1xx_enet.c,
arch/arm/src/s32k1xx/s32k1xx_flexcan.c,
arch/arm/src/stm32/stm32_pwm.c,
arch/arm/src/stm32h7/stm32_pwm.c,
arch/arm/src/stm32l4/stm32l4_pwm.c,
arch/renesas/src/rx65n/rx65n_usbdev.c,
binfmt/libnxflat/libnxflat_bind.c,
drivers/pipes/pipe_common.c,
net/igmp/igmp_input.c,
net/tcp/tcp_conn.c,
sched/sched/sched_roundrobin.c:

    * Fix typo in comment ("this this").

arch/arm/src/cxd56xx/cxd56_usbdev.c,
arch/arm/src/lc823450/lc823450_usbdev.c:

    * Fix typo in comment and rewrap lines.

arch/arm/src/imxrt/imxrt_usbdev.c,
arch/arm/src/stm32/stm32_dac.c,
arch/arm/src/stm32f0l0g0/stm32_pwm.c,
arch/arm/src/stm32f7/stm32_pwm.c,
arch/arm/src/tiva/lm/lm4f_gpio.h,
fs/nxffs/nxffs_write.c,
include/nuttx/analog/pga11x.h,
include/nuttx/usb/usbdev.h,
net/mld/mld_join.c:

    * Fix typo in comment ("this this").
    * Fix nxstyle issues.
2020-10-02 04:54:52 +02:00
Xiang Xiao
bf7399a982 arch: Initialize idle thread stack information
and remove the special handling in the stack dump

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia1ef9a427bd4c7f6cee9838d0445f29cfaca3998
2020-09-16 06:57:29 -07:00
Gregory Nutt
55a9172bc2 Fix Cygwin build with Windows native toolchain
PR #1450 broke the Cygwin build.  Refer to Issue #1672.

The use of of logic like:

    EXTRA_LIBPATHS += -L "${dir ${shell $(CC) $(ARCHCPUFLAGS) --print-file-name=libgcc.a}}"

fails when the Toolchain $(CC) is a native Windows toolchain.  That is because the returned path is a Windows-style patch which cannot be handled by the make 'dir' command.  Commit 4910d43ab0 reorganized a lot of definitions and replaced the correct code with the use of the limit make 'dir' command.  The original code used the Bash dirname command which does not suffer from this limitation; it can handle both POSIX and Windows paths.

This was verified using the stm32f4discover:nsh toolchain with the Windows native ARM Embedded toolchain.  That toolchain returns:

    arm-none-eabi-gcc --print-file-name=libgcc.a
    c:/program files (x86)/gnu tools arm embedded/9 2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/libgcc.a
2020-09-01 10:20:28 +08:00
Xiang Xiao
5efa93ec26 arch/Toolchain.defs: Change all ARCROSSDEV to CROSSDEV
ARCROSSDEV always equals to CROSSDEV, so it is no reason to keep ARCROSSDEV.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-20 23:50:59 -07:00
Xiang Xiao
b329e2377d boards: Move toolchain related variables to Toolchain.defs
1.It make sense to let Toolchain.defs give the default value
2.The board can still change if the default isn't suitable
3.Avoid the same definition spread more than 200 Make.defs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic2649f1c7689bcf59c105ca8db61cad45b6e0e64
2020-07-20 17:10:37 +01:00
Xiang Xiao
47f2090410 arch: Change --print-file-name=libgcc.a to --print-libgcc-file-name
Since the new option is more compatible with clang

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-19 18:26:31 -07:00
Xiang Xiao
d6827cab60 arch: up_assert shouldn't call exit directly
since exit will be only callable from userspace and change
the 1st argument from "const uint8_t *" to "const char *"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I86487d57210ab63109148232da71dbc4d60a563b
2020-07-19 01:21:36 +01:00
Xiang Xiao
4910d43ab0 build: Move the toolchain library setting to the common place
so all boards support C++ automatically
2020-07-16 15:38:08 -03:00
Xiang Xiao
924ba84737 arch: call *_getsp in up_assert and board_crashdump
and remove the static up_getsp

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-09 13:51:09 +01:00
Xiang Xiao
bd656888f2 build: Replace WINTOOL with CYGWIN_WINTOOL Kconfig
so the correct value can be determinated by Kconfig system automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-18 15:02:55 -06:00
Gregory Nutt
d823a3ab3e sched/: Make more naming consistent
Rename various functions per the quidelines of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-16 13:39:03 -03:00
Gregory Nutt
801b9d6e5f arch/arm: Remove support for old redundant toolchains.
Remove support for the Codesourcery, Atollic, DevKitArm, Raisonance, and CodeRed toolchains.  Not only are these tools old and no longer used but they are all equivalent to standard ARM EABI toolchains.  Retaining specific support has no effect (they are still supported, but now just as generic EABI toolchains).
2020-05-13 18:41:10 +01:00
Xiang Xiao
9607152e68 arm/gic: Don't pirnt log in arm_decodeirq
it is unsafe place to do this

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I47fdb1a34a7f1d5c5d3c4f3c0030a60bf01c43c2
2020-05-13 06:33:56 -06:00
Gregory Nutt
f92dba212d sched/sched/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 16:58:42 -03:00
Gregory Nutt
4b44b628ea Run nxstyle against all .c and .h files modified by this PR.
All complaints fixed except for those that were not possible to fix:

- Used of Mixed case identifier in ESP32 files.  These are references to Expressif ROM functions which are outside of the scope of NuttX.
2020-05-09 14:19:08 -03:00
Gregory Nutt
a4218e2144 include/nuttx/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 14:19:08 -03:00
Gregory Nutt
3dca5eba15 Completes the Implementation of the TLS-based errno
- Remove per-thread errno from the TCB structure (pterrno)
- Remove get_errno() and set_errno() as functions.  The macros are still available as stubs and will be needed in the future if we need to access the errno from a different address environment (KERNEL mode).
- Add errno value to the tls_info_s structure definitions
- Move sched/errno to libs/libc/errno.  Replace old TCB access to the errno with TLS access to the errno.
2020-05-07 23:11:34 +01:00
Xiang Xiao
94bb2e05bb syslog: Code outside libc shouldn't call nx_vsyslog directly
since nx_vsyslog is the implementation detail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Gregory Nutt
1bab5b6813 arch/arm/: Rename up_intstack_* to arm_intstack_*
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all architecture-private functions begin with the name of the arch, not up_.

This PR addresses only these name changes for the ARM-private functions up_instack_base() and up_instack_top() which should be called arm_instack_base() and arm_instack_top().

There should be no impact of this change (other that one step toward more consistent naming).

Normal PR checks are sufficient
2020-05-03 14:48:40 -03:00
Gregory Nutt
cbc931b590 arch/arm: Rename up_savestate and up_restorestate
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses function-like macro naming that was missing in previous PRs:  up_savestate() and up_restorestate() which must be named arm_savestate() and arm_restorestate().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f103-minimum:nsh
2020-05-02 18:35:30 -03:00
Gregory Nutt
2aa85fd17e arch/arm, board/arm: Rename all up_* functions to arm_*
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h

This change to the files only modifies the name of called functions.  nxstyle fixes were made for all core architecture files.  However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change.  It is not humanly possible to fix all of these.   I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
2020-05-01 18:28:13 +01:00
Xiang Xiao
eca7059785 Refine __KERNEL__ and CONFIG_BUILD_xxx usage in the code base
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 10:43:47 -03:00
Gregory Nutt
037c9ea0a4 arch/arm: Rename all up_*.h files to arm_*.h
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.h files.  There are only three, but almost 1680 files that include them:

    up_arch.h
    up_internal.h
    up_vfork.h

The only change to the files is from including up_arch.h to arm_arch.h (for example).

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 03:43:44 +01:00
Gregory Nutt
c6c712b2fc arch/arm: Rename all up_*.c files to arm_*.c 2020-05-01 02:11:01 +01:00
Gregory Nutt
a86884c615 Run all .c and .h files modifed in this PR through nxstyle. 2020-04-30 22:09:51 +01:00
Gregory Nutt
6398a64e26 Rename up_saveusercontext to arm_saveusercontext 2020-04-30 22:09:51 +01:00
Gregory Nutt
3a82a20c90 Rename up_copyarmstate to arm_copyarmstate 2020-04-30 22:09:51 +01:00
Gregory Nutt
3d2cd1493f Rename up_copyfullstate to arm_copyfullstate 2020-04-30 22:09:51 +01:00
Gregory Nutt
a7558cf9b9 Run all .c and .h modified by the PR through nxstyle. 2020-04-30 18:38:32 +01:00
Gregory Nutt
e2a65ceb5f Rename up_fullcontextrestore to arm_fullcontextrestore 2020-04-30 18:38:32 +01:00
Nathan Hartman
d6f7821b15 Docs and comments: Change OSX -> macOS
Mac OS X was renamed to macOS at some point. Update references to
OSX, OS X, Mac OS X, Mac OSX, and other permutations, to macOS,
in README files and in comments of other files.
2020-04-26 07:48:33 -06:00
YAMAMOTO Takashi
c009927deb Appease nxstyle complaints 2020-04-01 00:03:31 +08:00
YAMAMOTO Takashi
4ddb457c3e Fix a typo in comments 2020-04-01 00:03:31 +08:00
Nathan Hartman
a5e643b0cd Fix typos in comments and documentation. 2020-03-16 20:01:11 -06:00
YAMAMOTO Takashi
d4b0590abb Fix some nxstyle complaints in arm addrenv 2020-03-10 03:55:25 -05:00
Xiang Xiao
cde88cabcc Run codespell -w with the latest dictonary again
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-02-23 22:27:46 +01:00
Xiang Xiao
bd4e8e19d3 Run codespell -w against all files
and fix the wrong correction
2020-02-22 14:45:07 -06:00
YAMAMOTO Takashi
b363bd0841 Update the comments (the location of trampoline code)
Also, fix typos and copy-and-paste errors.
2020-02-20 14:21:16 +08:00
Masayuki Ishikawa
bbefad449c arch: armv7-a: Apply armv7-m SMP related logic to armv7-a
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-02-19 20:04:58 -06:00
Masayuki Ishikawa
b9682171f4 arch: armv7-a: Fix stack pointer alignment at startup
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-02-19 07:25:31 -06:00
Masayuki Ishikawa
e7d44ee16e arch: armv7-a: Fix heap corruption in SMP mode
Currently up_allocate_heap() assumes that g_idle_topstack points
top of the heap memory. However, g_idle_topstack pointed incorrect
address in SMP mode which resulted in heap corruption. This PR
moves g_idle_topstack at the end of .noinit to avoid this issue.

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-02-18 07:06:12 -06:00
Gregory Nutt
cfb7561e77 arch/arm/src/armv7-a/arm_vectors.S: Fix clobbered register in SMP mode. 2020-02-12 16:49:32 +01:00
Xiang Xiao
80277d1630
Refine the preprocessor conditional guard style (#190) 2020-01-31 19:07:39 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189)
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
2020-01-31 09:24:49 -06:00
Xiang Xiao
6a3c2aded6 Fix wait loop and void cast (#24)
* Simplify EINTR/ECANCEL error handling

1. Add semaphore uninterruptible wait function
2 .Replace semaphore wait loop with a single uninterruptible wait
3. Replace all sem_xxx to nxsem_xxx

* Unify the void cast usage

1. Remove void cast for function because many place ignore the returned value witout cast
2. Replace void cast for variable with UNUSED macro
2020-01-02 10:54:43 -06:00
Gregory Nutt
69318b1024 Re-implements reverted commit 344f7bc9f6 in a way that should not have the undesired side-effect. include/nuttx/sched.h: Add a bit to the TCB flags to indicat the thread is a user thread in a syscall. sched/nuttx/nxsig_dispatch.c: Delay dispatching to signal handlers if within a system call. In all syscall implementations: Process delayed signal handling when exiting system call. 2019-11-28 12:47:36 -06:00
Gregory Nutt
cbdd590c82 Revert "include/nuttx/sched.h: Add storage for a previous signal mask. arch/: In all syscall implementations, block all signals before dispatching a system call; resotre signal mask when the system call returns."
Using the sigprocmask() for this purpose has too many side-effects.

This reverts commit 344f7bc9f6.
2019-11-28 11:57:54 -06:00
Gregory Nutt
344f7bc9f6 include/nuttx/sched.h: Add storage for a previous signal mask. arch/: In all syscall implemenations, block all signals before dispatching a system call; resotre signal mask when the system call returnes. 2019-11-28 10:51:29 -06:00
Gregory Nutt
6c2f73774b armv7-a and xtensa: Apply Masayuki Ishakawa's change of cef90a3865 to these these other SMP architectures as well. 2019-10-04 07:17:35 -06:00
Nathan Hartman
46aaec7ba0 Fix minor typos in docs and comments. 2019-09-29 12:52:20 -06:00
Juha Niskanen
c3d24571fb Fix some typos. Mostly inital->initial. 2019-09-27 06:32:32 -06:00
Nathan Hartman
366053e464 Fix typos, 1 in a #define, others in comments. This changes one definition: _MQ_TIMEDRECIEVE is changed to _MQ_TIMEDRECEIVE. It appears this symbol is not used anywhere. 2019-09-11 08:56:56 -06:00
Oki Minabe
f9327b6b06 arch/arm/src/armv7-a/arm_pgalloc.c: Fix L2 page table mask for armv7-a. 2019-09-08 07:06:00 -06:00
Oki Minabe
c570439c07 arch/arm/src/armv7-a/arm_addrenv_utils.c: Fix double increment in armv7-a's arm_addrenv_destroy_region(). 2019-09-08 07:04:37 -06:00
Oki Minabe
3e44e9107c arch/arm/src/armv7-a: Fix typo and missing quotation for armv7-a. 2019-09-08 07:01:57 -06:00
Gregory Nutt
2b25d56bfd arch/arm/src/am335x/hardware/am335x_lcd.h: Fix a few typos. Add things needed by the LCDC driver. 2019-07-08 11:17:03 -06:00
Gregory Nutt
abf6965c24 Squashed commit of the following:
libs/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    syscall/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    wireless/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    Documentation/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    include/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    drivers/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    sched/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    configs:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/xtensa:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/z80:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/x86:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/renesas and arch/risc-v:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/or1k:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/misoc:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/mips:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/avr:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/arm:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
2019-04-29 14:52:05 -06:00
Xiang Xiao
2d3623e2f9 arch/arm/src/armv7-a/Toolchain.defs: Fix 'cc1: warning: switch -mcpu=cortex-a7 conflicts with -march=armv7-a switch' 2019-03-26 21:40:25 -06:00
Gregory Nutt
c34ea0d3bc arch/arm/src/armv7-a/arm_addrenv_utils.c: Fix a new cache interface related warning. 2019-03-20 17:20:56 -06:00
Gregory Nutt
daa6461ce2 arch/ and configs/: Fix more errors related to cache interface changes. 2019-03-20 14:45:44 -06:00
Gregory Nutt
33d711166e arch/arm/src/armv7-a/Toolchain.defs: Correct conditional logic. Was mixing C preprocess and Makefile semantics. 2019-03-20 08:17:38 -06:00
Gregory Nutt
006c48692f arch/arm/src/armv7-a/arm_scu.c: Another place where universal cached control change bork a compile due to missing ARM_DSB() definition. 2019-03-19 16:56:04 -06:00
Gregory Nutt
aed32d35fa Fix typo in last commit found in build testing. 2019-03-19 13:26:46 -06:00
Gregory Nutt
c1beda8a34 ARMv7-A/R: Add barriers.h header file for consistency with ARMv7-M. 2019-03-19 13:20:23 -06:00
zhangyuan7
471a18ee4d arch/arm: Add the initial cortex-a7 archtiecture support 2019-03-19 11:51:29 -06:00
Xiang Xiao
cc1595f232 arm/armv7-a: Add mmu_l1_map_regions() to remove the code duplication. 2019-03-19 11:30:37 -06:00
Xiang Xiao
75a97657be arch/arm/src/armv7-a/sctlr.h: Add SCR bit definitions. 2019-03-19 11:22:44 -06:00
liuzhuang
517f391267 arch/arm/src/armv7-a/arm_gicv2.c: Don't use GIC_ICDDCR_ENABLEGRP1 for NONSECURE since this bit doesn't exist in this mode. 2019-03-19 11:20:45 -06:00
Xiang Xiao
7e9a060202 arch/arm/src/armv7-a: Fix assemble error when including gic.h 2019-03-19 11:19:09 -06:00
zhangyuan7
f36ce38991 arch/arm/src/armv7-a/arm_head.S: add weak attribute to arm_data_initialize so platform could provide the new implemenation as needed. 2019-03-19 11:16:52 -06:00
zhangyuan7
2bc3eddb79 arch/arm/src/armv7-a: Guard some assembly files if configuration not selected. 2019-03-19 11:15:21 -06:00
zhangyuan7
c59dabe41c arch/arm/src/armv7-a: Remove inclusion pg_macros.h for armv7-a since this header file does not exist. 2019-03-19 11:13:27 -06:00
zhangyuan7
3d171340db arch/arm/armv7-a: Support thumb mode and fix interworking issue. 2019-03-19 11:10:41 -06:00
Xiang Xiao
64252a298f arch/: Unify the cache interface for all architectures 2019-03-19 10:37:13 -06:00
Bilal Wasim
1690f2ca8b arch/arm/src/armv7-a/mmu.h: pdating the cp15_wrttb and cp15_wrdacr functions to use inline assembly in the correct way. The incorrect method was generating errors as ARMv7-a expects the MCR/MRC instructions to provide registers as an argument(MRC p15, 0, <Rt>, c2, c0, 0) and the code was providing a constant value(and hence the build error). 2019-03-14 17:14:56 -06:00
Gregory Nutt
a2e62f557d Squashed commit of the following:
sched/init/nx_bringup.c:  Fix a naming collision.
    sched/init:  Rename os_start() to nx_start()
    sched/init:  Rename os_smp* to nx_smp*
    sched/init:  Rename os_bringup to nx_bringup
    sched/init:  rename all internal static functions to begin with nx_ vs os_
2019-02-04 16:20:35 -06:00
Gregory Nutt
bb623d1e04 This commit renames all internal OS functions defined under sched/task so that they begin with the prefix. For example, nxtask_exit() vs. task_exit().
Squashed commit of the following:

    Trivial, cosmetic
    sched/, arch/, and include:  Rename task_vforkstart() as nxtask_vforkstart()
    sched/, arch/, and include:  Rename task_vforkabort() as nxtask_vforkabort()
    sched/, arch/, and include:  Rename task_vforksetup() as nxtask_vfork_setup()
    sched/:  Rename notify_cancellation() as nxnotify_cancellation()
    sched/:  Rename task_recover() to nxtask_recover()
    sched/task, sched/pthread/, Documentation/:  Rename task_argsetup() and task_terminate() to nxtask_argsetup() and nxtask_terminate(), respectively.
    sched/task:  Rename task_schedsetup() to nxtask_schedsetup()
    sched/ (plus some binfmt/, include/, and arch/):  Rename task_start() and task_starthook() to nxtask_start() and nxtask_starthook().
    arch/ and sched/:  Rename task_exit() and task_exithook() to nxtask_exit() and nxtask_exithook(), respectively.
    sched/task:  Rename all internal, static, functions to begin with the nx prefix.
2019-02-04 13:42:51 -06:00
Gregory Nutt
a77c073797 arch/: Fix an interlock that was broken by commit 641a98a434 in all implementations of up_sigdeliver. 2019-02-03 17:14:32 -06:00
Gregory Nutt
641a98a434 arch/: The saved return register state is available on the user stack. Thic commit reorders some logic so that certain, critical registers are preserved in the TCB. This does not make the logic 100% secure, but does prevent some obvious things. sched/signal/sig_delivery: Add a flag to the TCB to indicate that we are in a signal handler. Use this flag to assure that a there a never attempts to nest signal handling operations on a thread. This was guaranteed before but when locking of pre-emption during signal delivering was eliminated in a previous commit, there was a remote possibility of an attempt to do nested signal handling. This flag assures that there is only one signal handled at a time. 2019-02-03 15:29:47 -06:00
Xiang Xiao
763ba51b78 arch/xxx/src/xxx/up_assert.c: Dump CPU0 IDLE stack only when PID equals 0. IDLE threads of other CPUs do not need this special check 2019-01-26 10:59:23 -06:00
Petro Karashchenko
5e48ca91fc arch/arm/src/armv7-a/mmu.h: Fix some typos; Use TLBIMVA vs TLBIMVAAIS to invalidate the Cortex-A8 cache. 2019-01-06 07:49:21 -06:00
Petro Karashchenko
dff605a5b8 arch/arm/src/armv7-a/arm_mmu.c: Fix end address calculation for mmu_invalidate_region() API 2019-01-06 07:38:04 -06:00
Gregory Nutt
db24306435 arch/assertion logic: Fix additional places where the test for an IDLE task is incorrect. It is not invalid in all configurations to check for PID==0. However, the logic fixed in these places lackes sufficient intelligence to find the right stack for the CPU IDLE thread and could still show the wrong stack. 2018-12-18 17:45:46 -06:00
Gregory Nutt
ec9265aa95 arch assertions: Correct duplicated logic from commit dbf01d12b7. Checking for PID == zero is not a valid way to test for the IDLE task in all configurations! This is only true in the single CPU configuration. In multiple CPU configurations, there will be a separate IDLE task for each CPU with a different PID. 2018-12-18 17:35:42 -06:00
Xiang Xiao
dbf01d12b7 Assertions: Identify the running task correctly when dumping task state information. It takes time to switch to the target task after g_readytorun has been modified. If panic/assert happen during this period, the dump will contain the incorrect and confusing information due to the difference between the real running task and the return value of this_task(). This change resolve this problem by adding g_running_task to track the real running task through the context switch. 2018-11-15 07:11:51 -06:00
Xiang Xiao
543f4ed8ec arch/ all assertion functions: up_assert move the register dump to first make the more important info first 2018-11-11 12:53:59 -06:00
Xiang Xiao
dfe788be25 arch/ all assertion functinos: up_stackdump dump the full stack if stack overflow the stack info is very useful to find the backtrace 2018-11-11 12:52:36 -06:00
Xiang Xiao
e4106a3744 arch/ assertions files: up_registerdump capture the general register if not yet saved and up_saveusercontext is implemented, the register dump is very useful to find the cause of failure. 2018-11-11 12:50:50 -06:00
Gregory Nutt
2b3ec4172d arch/: Add 'BOARD_ASSERT_RESET_VALUE' in config/Kconfig and replace reboot status '0' to 'CONFIG_BOARD_ASSERT_RESET_VALUE'. 2018-11-10 14:06:46 -06:00
Gregory Nutt
b823fd83bd arch/arm/src/armv7-a: Replicate the same fix was previously commited for the armv7-r. 2018-09-20 21:40:29 -06:00
Xiang Xiao
7a9309370f arm syscalls: svcall/sycall logic needs to get the ucontext argument from R4 instead of stack since all syscall parameters pass from registers in syscall.h 2018-08-24 07:11:18 -06:00
Xiang Xiao
e1202d2ed3 Replace all ASSERT with DEBUGASSERT to save the code space 2018-08-24 06:58:30 -06:00
Xiang Xiao
467d2a58ea Replace non critical PANIC with DEBUGPANIC to save the code space 2018-08-24 06:21:15 -06:00
Xiang Xiao
a465b6f0d4 configs/: Change CONFIG_BOARD_RESET_ON_CRASH to CONFIG_BOARD_RESET_ON_ASSERT, arch/: Implement call to board_reset() if in all implementations of up_assert() when CONFIG_BOARD_RESET_ON_ASSERT=y. 2018-08-22 17:04:39 -06:00
Gregory Nutt
8c61c2f31b Remove trailing spaces at the end of lines. 2018-08-13 07:39:38 -06:00
Alan Carvalho de Assis
283b73edc5 Fix lots of typos in C comments and Kconfig help text 2018-07-08 18:24:45 -06:00
Gregory Nutt
bb88f8d0bb Squashed commit of the following:
A few bugfixes in initial testing on the i.MX6.  Behavior seems a little more stable, but there are still memory corruption issues.  Also print CPU number on assertion.
    Add a file missed in the last big commit.
    arch/arm/src/armv7a and imx6:  Add support for per-CPU IRQ and FIQ interrupt stacks (bugfix).  Add support so that up_assert will print the correct interrupt stack on an assertion (FIQ stack is still not printed).
    arch/arm/src/lc823450: Combine the content of smp_macros.h into chip.h.  Add support so that up_assert will print the correct interrupt stack on an assertion.
2018-06-21 10:59:58 -06:00
Gregory Nutt
a94e3284b3 syslog: Enable is partial, crippled version of syslog_flush(); arch/: Call syslog_flush() from assertion handling logic. 2018-06-07 16:29:16 -06:00
Gregory Nutt
8aa486515e arch/: Correct critical section logic associated with the recent signal handler changes (yet again). 2018-06-06 17:39:10 -06:00
Gregory Nutt
b5c6d9c849 Update some comments. 2018-06-06 17:20:01 -06:00
Gregory Nutt
a581d7c2e3 arch/: Relasted to last big change to force interrupts to be disabled. In the SMP case, we still must call leave_critical_section() at least once in order to compensate for the fact that the irqcount was incremented in up_schedsigaction(). 2018-06-06 17:04:12 -06:00
Gregory Nutt
977d41d519 Based on a change recommended by Mark Shulte:
Signal handlers maybe run with interrupts enabled or disabled, depending on how the task the received the signal was blocked. (i.e.: If sem_wait() is called, then we disable interrupts, then block the currently running task). This could be dangerous, because user code would be running with interrupts disabled.

This change forces interrupts to be enabled in up_sigdeliver() before executing the signal handler calling up_irq_enable() explicitly.  This is safe because, when we return to normal execution, interrupts will be restored to their previous state when the signal handler returns.
2018-06-06 09:54:30 -06:00
Gregory Nutt
de6b13b3ab Per OpenGroup.org, syslog -- and, hence, nonstandard vsyslog, and debug wrappers -- does not return a value. Rename _vsyslog to nx_vsyslog. Use internal nx_vsyslog in the few cases where a return value is required. 2018-03-04 08:07:07 -06:00
Gregory Nutt
3ddea73dc1 arch/arm/src/armv7-a: Port the SMP change by Masayuki Ishikawa to the ARMv7-A family. 2018-02-14 08:36:34 -06:00
Gregory Nutt
de34b4523f sched/ and arch/arm/src/armv7-a: Replace a few more occurrences of this_task() with current_task(cpu) in an effort to get the i.MX6 working in SMP mode again. It does not yet work, sadly. 2018-02-06 11:17:33 -06:00
Gregory Nutt
8aa1538506 arch/arm/src/armv7-a: Found some additional places were the new this_task() function cannot be called in the i.MX6 SMP configuration. 2018-02-06 10:33:28 -06:00
Gregory Nutt
5c5d19f1c8 Some ommissions from previous commit. 2018-02-04 12:36:51 -06:00
Gregory Nutt
1e59d9dd14 armv7-a, armv7-r, armv7-m: Add atomic read-add-write and read-subtract-write functions. 2018-02-04 12:22:03 -06:00
Gregory Nutt
2683f713ab Make sure that labeling is used consistently in all function headers (part 3). 2018-02-01 12:17:03 -06:00
Gregory Nutt
1567b82429 Make sure that labeling is used consistently in all function headers (part 2). 2018-02-01 12:03:55 -06:00
Gregory Nutt
7cf88d7dbd Make sure that labeling is used consistently in all function headers. 2018-02-01 10:00:02 -06:00
Gregory Nutt
1c5ec07414 arch/: Remove dangling space at the end of lines. 2017-06-28 13:16:48 -06:00
Gregory Nutt
6e4918c557 Remove CONFIG_ARM_TOOLCHAIN_GNU; replace with CONFIG_ARCH_TOOLCHAIN_GNU 2017-05-13 13:28:15 -06:00
Gregory Nutt
0de294a586 Fix lots of occurrences of 'the the', 'the there', 'the these', 'the then', 'the they. 2017-05-11 13:35:56 -06:00
Mark Schulte
b3222bbc8a irq_dispatch: Add argument pointer to irq_dispatch
Provide a user defined callback context for irq's, such that when
registering a callback users can provide a pointer that will get
passed back when the isr is called.
2017-02-27 06:27:56 -06:00
Gregory Nutt
ff61d8f69d Add missing sched_note_*() calls to sam4cm SMP functions. 2017-01-24 14:33:57 -06:00
Gregory Nutt
edd9186540 ELF: Move ARMv7-A and ARMv7-R versions of ELF relocation logic to libc/machine 2017-01-21 14:40:26 -06:00
Gregory Nutt
be5ba90d4f Move optimized ARM memcpy functions from arch/arm/src/ to libc/machine/. This is necessary for the PROTECTED and KERNEL build modes. Otherwise, memcpy() will be built in to kernel space and not accessible to applications. 2017-01-20 10:53:46 -06:00
Gregory Nutt
0db31d0cd1 SMP: Fix a typo introduced in c5b00ccfc4 2017-01-16 08:48:05 -06:00
Gregory Nutt
a2083fbc92 Update some comments 2017-01-15 12:35:03 -06:00