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14729 Commits

Author SHA1 Message Date
Xiang Xiao
4aad964d48 Fix sam4s_nand.c:152:3: error: this 'while' clause does not guard... [-Werror=misleading-indentation] 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-23 22:44:35 +02:00
raiden00pl
f1277a2233 stm32/socketcan: fix the EFF flag for received frames 2022-10-22 17:28:55 +08:00
anjiahao
e1ca516488 use SEM_INITIALIZER inside of NXSEM_INITIALIZER 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-10-22 14:50:48 +08:00
anjiahao
5724c6b2e4 sem:remove sem default protocl 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-10-22 14:50:48 +08:00
Michael Jung
ec3805721c armv8-m: Fix MPU Region Limit Address config 
On armv8-m the MPU region limits are inclusive.  Thus, we must substract
one byte of size from (base + limit).

Signed-off-by: Michael Jung <michael.jung@secore.ly>
 2022-10-21 16:23:49 -03:00
Michael Jung
d4cbb4f5b8 armv8-m: Fix MPU Attribute Indirection reg offsets 
Both MPU_MAIR0 and MPU_MAIR1 were off by 0x10.

Signed-off-by: Michael Jung <michael.jung@secore.ly>
 2022-10-21 16:23:49 -03:00
raiden00pl
36ae5316b7 include/nuttx/can.h: make error definitions compatible with Linux 2022-10-21 18:47:29 +08:00
xiangdong6
924c3d8b5f arch/armv7-r: Fix armclang build warning: L6306W 
When a function is known to preserve eight-byte alignment of the stack, armclang assigns the build
attribute Tag_ABI_align_preserved to that function. However, the armclang integrated assembler does
not automatically assign this attribute to assembly code.

Signed-off-by: xiangdong6 <xiangdong6@xiaomi.com>
 2022-10-21 13:58:23 +08:00
SPRESENSE
0d87694024 arch: cxd56xx: Fix duplicate definitions in battery_ioctl.h 
Fix duplicate definitions of arch/arm/include/cxd56xx/battery_ioctl.h
with include/nuttx/power/battery_ioctl.h.
 2022-10-20 21:49:07 +02:00
SPRESENSE
2060f7be60 arch: cxd56xx: hostif: Remove -Wformat-truncation warnings 
Remove -Wformat-truncation warnings in cxd56_hostif.c.
 2022-10-20 21:49:07 +02:00
SPRESENSE
52cbfcf3bd arch: cxd56xx: Remove -Wmissing-braces warning 
Remove -Wmissing-braces warning in cxd56_cpu1signal.c.
 2022-10-20 21:49:07 +02:00
SPRESENSE
d3ed469f00 arch: cxd56xx: Fix compile warning in cxd56_pwm.c 2022-10-20 21:49:07 +02:00
Javier Casas
663bf4d968 Add support for stm32h7b3xx MCU's flash 2022-10-21 01:37:23 +08:00
raiden00pl
a3db5fe24b stm32f7: add SocketCAN support 2022-10-20 00:08:36 +08:00
SPRESENSE
c48feac0e9 arch: cxd56xx: gnss: Fix compile error 
Fix a compile error caused by
d1d4633 Replace nxsem API when used as a lock with nxmutex API
 2022-10-19 14:10:51 +02:00
Fotis Panagiotopoulos
f9fd53cda1 gmtimer: Fixed range of tm_yday. 2022-10-19 12:39:04 +08:00
raiden00pl
27db9558de stm32/socketcan: fixes for arm_netinitialize 2022-10-18 15:35:21 -03:00
Xiang Xiao
d200cacc49 arch/armv7-r: Fix typo error in commit 4fab2b9501 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-18 10:31:07 -03:00
Xiang Xiao
6b31918b42 Remove the unnecessary cast for main_t, NULL and argv 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-18 08:51:45 +02:00
Xiang Xiao
4fab2b9501 arch/armv7-[a|r]: Don't define fiq stack if CONFIG_ARMV7A_DECODEFIQ=n 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-18 08:01:52 +09:00
anjiahao
dee38ce3e8 arch: Replace critical section with nxmutex in i2c/spi/1wire initialization 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-17 15:59:46 +09:00
anjiahao
d1d46335df Replace nxsem API when used as a lock with nxmutex API 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-17 15:59:46 +09:00
Bernd Walter
947e771c41 fix typo big letter 'o' in hex value for zero. 2022-10-17 02:55:21 +08:00
Bernd Walter
432c438c76 Use the correct marcro name for RP2040_UART0_BASE 2022-10-16 11:26:27 +08:00
chao an
4e3aa83706 arm/backtrace_fp: fix build warning 
common/arm_backtrace_fp.c: In function 'up_backtrace':
common/arm_backtrace_fp.c:126:23: warning: assignment to 'void *' from 'uintptr_t' {aka 'unsigned int'} makes pointer from integer without a cast [-Wint-conversion]
  126 |           istacklimit = arm_intstack_top();
      |                       ^

Signed-off-by: chao an <anchao@xiaomi.com>
 2022-10-15 03:09:55 +08:00
zhangyuan21
7d34ebdd4e armv7-a: add l2 page mapping interface 2022-10-12 22:00:06 +08:00
zhangyuan21
466635a5e0 armv7-a: set normal memory shareable in smp mode 2022-10-12 19:54:09 +08:00
zhangyuan21
750007ded9 sched: use tick count for sched timer expiration 2022-10-12 11:55:46 +08:00
chao an
bcdd03cdf3 arm/backtrace: rename arm_backtrace_thumb.c to arm_backtrace_sp.c 
1. rename arm_backtrace_thumb.c to arm_backtrace_sp.c
2. use EHABI stack unwinder instead of instruction unwind

Signed-off-by: chao an <anchao@xiaomi.com>
 2022-10-12 01:55:48 +08:00
Xiang Xiao
1cd9fa25cd arm/tlsr82xx: Don't select ARCH_HAVE_BACKTRACE 
since it's already selected by ARCH_ARM

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-11 00:01:35 +02:00
chao an
24129e4ba7 arm/backtrace: add support for EHABI(Exception Handling ABI) stack unwinder 
Reference:
https://github.com/ARM-software/abi-aa/blob/main/ehabi32/ehabi32.rst
https://github.com/ARM-software/abi-aa/releases/download/2022Q1/ehabi32.pdf

Signed-off-by: chao an <anchao@xiaomi.com>
 2022-10-11 03:11:37 +08:00
Andrés Sánchez Pascual
c28b05efd3 arch: stm32h7: Add support for dual bank flash 
memory

Signed-off-by: Andrés Sánchez Pascual <tito97_sp@hotmail.com>
 2022-10-10 01:07:45 +08:00
Xiang Xiao
f813fea555 Fix chip/cxd56_gnss.c:2858:7: error: label 'err' used but not defined 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-10-04 20:59:30 +02:00
Xiang Xiao
e38248ee08 Return -EINVAL for the internal API 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-30 17:54:56 +02:00
Xiang Xiao
bdeaea3742 Remove the unnessary empty line after label 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-30 17:54:56 +02:00
Carlos Sanchez
6e490759d6 s32k1xx: Fix FlexIO timer register access macros 2022-09-30 23:38:59 +08:00
Carlos Sanchez
68db81ab4f s32k1xx: Allow building with debug features and no console. 2022-09-30 15:15:55 +02:00
Xiang Xiao
53dcddc9e3 arch/armv[7|8]-m: Implement up_invalidate_icache 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-30 08:07:45 +02:00
chao an
6bc4baa4ca arch/makefile: preprocess link script to make configure more flexibly 
Signed-off-by: chao an <anchao@xiaomi.com>
 2022-09-29 17:06:47 +08:00
yinshengkai
5c9b094d65 tools: Replace mkallsyms.sh with mkallsyms.py 
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
 2022-09-29 08:33:04 +08:00
Fotis Panagiotopoulos
bbf3f2866d Fixed non-UTF8 characters. 2022-09-28 09:38:55 +08:00
ligd
078a0486f5 armv7-a: SMP hande all cores start at same time 
In SMP mode, if all cores start at same time, all from __start(),
then only primary need do initialize, so others core should wait
primary, use 'sev' let the non-primary continue to __cpuN_start().

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-09-28 10:33:13 +09:00
wangbowen6
589647308c arm/tlsr82: move peripherals pin config to board.h 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-09-28 09:30:06 +08:00
Xiang Xiao
764540267e sched/clock: Rename g_system_timer to g_system_ticks 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-27 17:45:44 -03:00
ligd
059497d1d1 armv7-a/r: NON-primary core should invalidate dacache level1 
NON-primary cpu will invalidate cpu0's cache L2, that will caused cpu0's data mismatch, and then system crash

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-09-27 14:41:39 +08:00
David Sidrane
a1ebd499ea stm32h7:SDMMC fix unaligned access for buffers not on 32 bit boundaries 
The IDMA needs to have 32 bit word alignment, in fact it will
   AND off the lower 2 bits of the value stored in IDMABASE0R.
   This bug was masked by CONFIG_ARMV7M_DCACHE causing proper word alignment
   and also FAT_DMAMEMORY being aligned.

   This commit extends the unaligned logic (used for dcache) to take into account
   the need for a buffer copy when the buffer is ot 32 bit word.

    It leverages the fact that when CONFIG_ARMV7M_DCACHE is not defined the up_xxxxx_dcache are nops.
 2022-09-27 09:43:29 +08:00
Rajvinder Kaur
2e1c522a79 stm32h7\stm32_fdcan_sock: reserve space for timeval struct in the intermediate storage of tx and rx CAN frames when timestamp is enabled 2022-09-26 20:05:44 -03:00
chao an
aa51629bd2 arm/armv7-r: redefine the linker symbols as armlink style 
Fix build break:

Error: L6218E: Undefined symbol _sbss (referred from arm_head.o).
Error: L6218E: Undefined symbol _ebss (referred from arm_head.o).
Error: L6218E: Undefined symbol _eronly (referred from arm_head.o).
Error: L6218E: Undefined symbol _sdata (referred from arm_head.o).
Error: L6218E: Undefined symbol _edata (referred from arm_head.o).

Signed-off-by: chao an <anchao@xiaomi.com>
 2022-09-26 19:04:25 +02:00
chao an
a2cd1b0db3 arm/armlink: add support of link time optimization(lto) 
Optimization goal(Code size)

Smaller                           GCC(-Os) GCC(-flto -Os) CLANG(-flto -Oz) ARMCLANG(-flto -Oz/-Omin)
lm3s6965-ek/qemu-flat(Cortex-M3)   208662      193893           199525             195464
                                               -7.07%           -4.37%             -6.32%
sabre-6quad/smp(Cortex-A9)         131360      122500            N/A               123988
                                               -6.74%            N/A               -5.61%

Faster performance                GCC(-O3) GCC(-flto -O3) CLANG(-flto -Ofast) ARMCLANG(-flto -Ofast) ARMCLANG(-flto -Omax)
lm3s6965-ek/qemu-flat(Cortex-M3)   257502      296364           369465             346696                  384204
                                              +15.00%          +43.40%            +34.60%                 +49.20%
sabre-6quad/smp(Cortex-A9)         166520      196004             N/A              207908                  224140
                                              +17.70%             N/A             +24.85%                 +34.60%

Reference:
https://developer.arm.com/documentation/101754/0618/armclang-Reference/armclang-Command-line-Options/-O--armclang-

Signed-off-by: chao an <anchao@xiaomi.com>
 2022-09-26 18:23:27 +08:00
Xiang Xiao
40ef5bc6db libc: Move queue.h from include to include/nuttx 
to avoid the conflict with libuv's queue.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-26 08:04:58 +02:00