1. Update all CMakeLists.txt to adapt to new layout
2. Fix cmake build break
3. Update all new file license
4. Fully compatible with current compilation environment(use configure.sh or cmake as you choose)
------------------
How to test
From within nuttx/. Configure:
cmake -B build -DBOARD_CONFIG=sim/nsh -GNinja
cmake -B build -DBOARD_CONFIG=sim:nsh -GNinja
cmake -B build -DBOARD_CONFIG=sabre-6quad/smp -GNinja
cmake -B build -DBOARD_CONFIG=lm3s6965-ek/qemu-flat -GNinja
(or full path in custom board) :
cmake -B build -DBOARD_CONFIG=$PWD/boards/sim/sim/sim/configs/nsh -GNinja
This uses ninja generator (install with sudo apt install ninja-build). To build:
$ cmake --build build
menuconfig:
$ cmake --build build -t menuconfig
--------------------------
2. cmake/build: reformat the cmake style by cmake-format
https://github.com/cheshirekow/cmake_format
$ pip install cmakelang
$ for i in `find -name CMakeLists.txt`;do cmake-format $i -o $i;done
$ for i in `find -name *\.cmake`;do cmake-format $i -o $i;done
Co-authored-by: Matias N <matias@protobits.dev>
Signed-off-by: chao an <anchao@xiaomi.com>
The following warning is emitted when building with GCC 12.2.0:
"the comparison will always evaluate as ‘true’ for the address of ‘g_parm’ will never be NULL [-Waddress]"
As g_param is an array of char[]. each member should have an actual address, so the validation in each if statement is not required.
Allows boards to supply their own gnu-elf linker script, used when building Nuttx applications and CONFIG_BUILD_KERNEL.
This is useful when building fully-linked applications (see #9395).
This patch add an example and pyhton base modules:
1.add memdump.py is an example to analyze memory
usage by python script.
2.add The most basic data structure analysis, like list, etc.
future ideas:
Maybe we can add modules related to "sched, drivers, arch, fs.." to
automatically analyze scripts to debug some problems
References:
linux kernel (https://github.com/torvalds/linux/tree/master/scripts/gdb)
The official manual of gdb (https://sourceware.org/gdb/onlinedocs/gdb/Python-API.html)
Change-Id: Ib9025a0a141cb89f3813526f7c55dcb28de31ed9
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
This PR is a modification that optimizes priority inheritance
for only one holder. After the above modifications are completed,
the mutex lock->unlock process that supports priority inheritance
can be optimized by 200 cycles.
Before modify: 2000 cycle
After modify: 1742 cycle
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
This commit aims to provide a way to get the current applied defconfig on runtime by providing CONFIG_BASE_DEFCONFIG that is updated when the configure and build scripts are run.
The "CONFIG_APPS_DIR" generated in .config has double quotes and is not recognized as a path by most make systems. This commits removes these double quotes to make the compile successfully.
The offset of the relevant registers in xcp will change after
enabling the FPU, this PR will add fpu offset correct the register offset
Signed-off-by: chao an <anchao@xiaomi.com>
Currently when we modify some Kconfig related to some chip or
some architecture we need to run refresh.sh to all boards that
is too slow (more than one hour to finish).
This patch modify the script to update only the boards configs
of an specific chip or only the boards of an specific architecture.
Examples:
$ ./tools/refresh.sh --silent --defaults arch:renesas
Normalize us7032evb1/ostest
Normalize us7032evb1/nsh
Normalize skp16c26/ostest
Normalize rx65n-rsk2mb/netnsh
Normalize rx65n-rsk2mb/ipv6
Normalize rx65n-rsk2mb/nsh
Normalize rx65n-rsk1mb/netnsh
Normalize rx65n-rsk1mb/nsh
Normalize rx65n-grrose/netnsh
Normalize rx65n-grrose/ipv6
Normalize rx65n-grrose/nsh
Normalize rx65n/nsh
It updates the boards from all 'renesas' architecture (m9c, rx65n, sh1)
$ ./tools/refresh.sh --silent --defaults chip:rx65n
Normalize rx65n-rsk2mb/netnsh
Normalize rx65n-rsk2mb/ipv6
Normalize rx65n-rsk2mb/nsh
Normalize rx65n-rsk1mb/netnsh
Normalize rx65n-rsk1mb/nsh
Normalize rx65n-grrose/netnsh
Normalize rx65n-grrose/ipv6
Normalize rx65n-grrose/nsh
Normalize rx65n/nsh
It updates all the boards from renesas chip 'rx65n' family
The syntax check of kconfiglib is stricter than kconfig-frontends,
but the warnings of kconfiglib are not catched by Makefile. Since kconfiglib
is implemented by python, the return value of the shell is always zero($?),
In this PR, I redirected the relevant standard errors to the file to check
whether the kconfig warning is occurred
Signed-off-by: chao an <anchao@xiaomi.com>
The order of the registers was changed by the following commit:
---------------------------------
| armv7-a/r: modify regs index to improve exception performance
|
| Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Signed-off-by: chao an <anchao@xiaomi.com>
Some time nuttx will receive SIGSEGV while executing the function:
| Thread 1 "nuttx" received signal SIGSEGV, Segmentation fault.
| 0xf7bab4a0 in __sanitizer::common_flags_dont_use () from /lib/i386-linux-gnu/libasan.so.6
| The program being debugged was signaled while in a function called from GDB.
| GDB has restored the context to what it was before the call.
| Evaluation of the expression containing the function
| (up_check_tcbstack) will be abandoned.
Signed-off-by: chao an <anchao@xiaomi.com>
Fix:
```
mksymtab.c: In function ‘main’:
mksymtab.c:280:15: warning: the comparison will always evaluate as ‘true’ for the address of ‘g_parm’ will never be NULL [-Waddress]
280 | cond = (g_parm[COND_INDEX] && strlen(g_parm[COND_INDEX]) > 0);
```
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Add header keywords into whitelist, skip the warning if the
particular headers will contain the functions with mixed case
Signed-off-by: chao an <anchao@xiaomi.com>
Current Toolchain.defs set the compile flags directly, it's OK for
target specified gcc toolchain.
But some LLVM based toolchains (Rust/Zig etc) use single toolchain to handle all supported paltform.
In this patch, arch level Toolchain.defs export standard LLVM style arch flags, and let <Lang>.defs to map them into internal style,
This will simplify the intergration of non-c language.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Some targets, such as qemu-rv support multiple architectures. The required flags need to passed to the linker when built "out-of-tree" in the application directory.
Initially supporting ESP32-C3 chip, to be followed by other RISC-V-based
chips from Espressif.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
