Commit Graph

175 Commits

Author SHA1 Message Date
David Sidrane
a0745bbef6 Merged in david_s5/nuttx/master_imxrt (pull request #748)
Adding imxrt 106x

* imxrt:Fix comment in imxrt105x_memorymap

* imxrt:Add imxrt1060 memory map

* imxrt:Add imcrt106x to imxrt_memorymap

* imxrt:Add i.MX RT 106x to Kconfig

* imxrt:Moved IMXRT_GPIO_NPORTS to chip.h & fixed comments

* imxrt:105x IRQ fix comment

* imxrt:gpioirq GPIO4,5 using wrong boundry

* imxrt:Add RT106x irq headers & Kconfig

* imxrt:Add rt106x GPIO chip headers

* imxrt:Extend Number of GPIO ports

* imxrt:Add 106x DMAMUX header

* imxrt:iomuxc add 106x

* imxrt:106x iomuxc extend Indexes

* imxrt:pinmux Add 106x

* imxrt:clockconfig use imxrt_memorymap.h

* imxrt:allocateheap use OCRAM2 as BASE when avaialbe

Approved-by: GregoryN <gnutt@nuttx.org>
2018-11-06 22:47:20 +00:00
Dave Marples
ae054b93bb arch/arm/src/imxrt/imxrt_usdhc.c: Initial commit of the i.MXRT SDHC driver. This driver is partially functional, working in PIO mode. DMA support and additional testing are needed. 2018-11-01 06:26:51 -06:00
Gregory Nutt
6d93658ff8 Add new configuratin CONFIG_NET_MCASTGROUP. This option is selected automatically if either CONFIG_NET_IGMP or CONFIG_NET_MLD are selected. Most conditional logic based on CONFIG_NET_IGMP replaced with conditioning on CONFIG_NET_MCASTGROUP. 2018-10-31 15:03:51 -06:00
Gregory Nutt
a3c67df91d arch/arm/src/imxrt: Add full support for the LPSPI in poll mode; includes a minor fix for LPI2C. 2018-10-31 12:50:05 -06:00
David Sidrane
92e4a7223c Merged in david_s5/nuttx/master_imxrt (pull request #737)
Master imxrt

* imxrt:Fix typos bit# and names

* imxrt:wdog Registers are 16 Bits

* imxrt:wdog Update has to be within 255 clocks of unlock

* imxrt:clockconfig Fix comments

* imxrt1050-evk:board.h Fix comments

* imxrt:imxrt_ccm.h Define Mux Selects for board.h use

* imxrt:clockconfig Allow better control from board.h

       1) Allows a board config clock setting to be defined
       in terms of the /n values shown in Figure 18-2.
       Clock Tree of the i.MX RT1050 Processor Reference
       Manual, Rev. 1, 03/2018

       2) Allows the clock multipelx selection to be made in
       The board config.

* imxrt1050-evk:Define board clocking based on divisor and muxes

Approved-by: GregoryN <gnutt@nuttx.org>
2018-10-23 22:54:28 +00:00
Ivan Ucherdzhiev
42f1f8898b /arch/arm/src/imxrt/imxrt_lpi2c.c: Fixes 2 bugs in the for IMXRT1050: (1) I2C time out and did not send STOP condition when sending single byte, (2) I2C could not receive bytes after repeated start. 2018-10-13 06:38:33 -06:00
Dave Marples
91eb792e56 Corrections for the i.MXRT Ethernet:
(1) Now the Ethernet is completely re-initialized when an error occurs by means of taking the interface down and back up but the PHY is _not_ renegotiated for that case because that is very time consuming and an error in the Ethernet is no reflection on the state of the PHY anyway.

(2) Explicitly sets the expected PHY address to zero (this could be moved into the config) rather than searching for it which takes ages, and it's zero anyway for this board (that's the broadcast address, and anything that cannot respond on that has multiple PHYs, so that would be a new board).

(3) Allows for the renegotiation of the PHY to be optional when a reset is needed. If a non-renegotiated reset doesn't result in good comms to the PHY then it'll automatically be escalated to a renegotiated one.

(4) Only performs a reset for errors that need it (the CRITICAL_ERROR define).  The list of errors that need reset are somewhat arbitrarily chosen based on my prejudices and might need to be revisited, but certainly the jabber errors don't need reset, the partial packet is thrown away by the layer above anyway.

(5) Re-loads the multicast table on reset.

(6) Adds a bit more logging into the imxrt Ethernet module.
2018-09-28 07:25:48 -06:00
Dave Marples
4eb118afd1 arch/arm/src/imxrt/imxrt_enet.c: Fix a race condition in setting up the Ethernet Tx transfer. 2018-09-26 10:59:47 -06:00
Ivan Ucherdzhiev
910e7a3899 arch/arm/src/imxrt/imxrt_lpsrtc.c: SVNC LPCR register bits 0 & 1 are NOT reserved and are, in fact, needed to enabled the SRTC. Now the SRTC is working. 2018-09-26 10:13:20 -06:00
Ivan Ucherdzhiev
955527b14f arch/arm/src/imxrt: Add LPI2C driver. 2018-09-26 07:57:45 -06:00
Dave Marples
681609ad51 arch/arm/src/imxrt/imxrt_enet.c: The board would not come up if I ran Nuttx from cold. I dumped the PHY registers to see what the differences were and the PHY was coming up in NANDTree mode. This is a mode for testing connectivity between the PHY and the MAC. Switching this mode off in the PHY registers has fixed the problem. 2018-09-25 06:52:07 -06:00
Gregory Nutt
510b0f7e07 arch/arm/src: Correct all ARMv7-M architectures. Interrupts were not be disabled correctly on power up. Writing zero to the NVIC SET-ENABLE registers has no effect. In order to disable interrupts, it is necessary to write all ones to the NVIC CLEAR-ENABLE register. Noted by David Sidrane. 2018-09-21 21:32:50 -06:00
Gregory Nutt
f8bfbd58c5 arch/arm/src/armv7-m/up_trigger_irq.c: Add logic to trigger ARMv7-M interrupts and exceptions. 2018-08-25 10:23:21 -06:00
Gregory Nutt
9bc951a335 Rename devif_loopback_out to devi_loopback 2018-08-25 08:33:21 -06:00
Xiang Xiao
0074afa0ac net/netdev: add devif_loopback_out() to check the loopback case where a packet is being sent to itself. Modify the net driver to call this function in this case. This function will simply re-inject the packet back into the network and the network driver will not put anything on the wire. 2018-08-24 09:21:33 -06:00
Xiang Xiao
e1202d2ed3 Replace all ASSERT with DEBUGASSERT to save the code space 2018-08-24 06:58:30 -06:00
Gregory Nutt
bfc8f9dfdb arch/arm/src/imxrt/imxrt_enet.c: Fix a warning about imxrt_calcethcrc() being defined, but not used. 2018-08-03 10:53:37 -06:00
Jake Choy
bf2a61b8cf I finally got the CRC32 to work properly after the FAE pointed me in the right direction. Here is a patch for the enet driver:
- Added CRC32 functions for multicast address filtering.
- Do not reset PHY settings when doing an ifup
- Use chip's unique id as the device MAC
- Enable discard enet frames with errors at PHY layer
2018-07-26 08:31:40 -06:00
Ivan Ucherdzhiev
579e984d8a arch/arm/src/imxrt/imxrt_serial.c: IMXRT1050 LPUART TERMIOS support added. 2018-07-26 07:08:17 -06:00
Ivan Ucherdzhiev
35fbaf7c4c arch/arm/src/imxrt/chip/imxrt_lpspi.h: IMXRT1050 LPSPI register and bit definitions added. 2018-07-26 07:03:57 -06:00
Gregory Nutt
22cd0d47fa This commit attempts remove some long standard confusion in naming and some actual problems that result from the naming confusion. The basic problem is the standard MTU does not include the size of the Ethernet header. For clarity, I changed the naming of most things called MTU to PKTSIZE. For example, CONFIG_NET_ETH_MTU is now CONFIG_NET_ETH_PKTSIZE.
This makes the user interface a little hostile.  People thing of an MTU of 1500 bytes, but the corresponding packet is really 1514 bytes (including the 14 byte Ethernet header).  A more friendly solution would configure the MTU (as before), but then derive the packet buffer size by adding the MAC header length.  Instead, we define the packet buffer size then derive the MTU.

The MTU is not common currency in networking.  On the wire, the only real issue is the MSS which is derived from MTU by subtracting the IP header and TCP header sizes (for the case of TCP).  Now it is derived for the PKTSIZE by subtracting the IP header, the TCP header, and the MAC header sizes.  So we should be all good and without the recurring 14 byte error in MTU's and MSS's.

Squashed commit of the following:

    Trivial update to fix some spacing issues.
    net/: Rename several macros containing _MTU to _PKTSIZE.
    net/: Rename CONFIG_NET_SLIP_MTU to CONFIG_NET_SLIP_PKTSIZE and similarly for CONFIG_NET_TUN_MTU.  These are not the MTU which does not include the size of the link layer header.  These are the full size of the packet buffer memory (minus any GUARD bytes).
    net/: Rename CONFIG_NET_6LOWPAN_MTU to CONFIG_NET_6LOWPAN_PKTSIZE and similarly for CONFIG_NET_TUN_MTU.  These are not the MTU which does not include the size of the link layer header.  These are the full size of the packet buffer memory (minus any GUARD bytes).
    net/: Rename CONFIG_NET_ETH_MTU to CONFIG_NET_ETH_PKTSIZE.  This is not the MTU which does not include the size of the link layer header.  This is the full size of the packet buffer memory (minus any GUARD bytes).
    net/: Rename the file d_mtu in the network driver structure to d_pktsize.  That value saved there is not the MTU.  The packetsize is the memory large enough to hold the maximum packet PLUS the size of the link layer header.  The MTU does not include the link layer header.
2018-07-04 14:10:40 -06:00
Gregory Nutt
67810d70d9 arch/arm/src/stm32l4: Fix typo errors found in build testing. 2018-06-28 16:24:21 -06:00
Gregory Nutt
f24f523e4e arch/arm/src/imxrt,stm32,stm32f0,stm32f7,stm32l4: Fix scope of naming. CONFIG_PM_SERIAL_ACTIVITY->CONFIG_STM32_PM_SERIAL_ACTIVITY, for example. 2018-06-28 16:18:15 -06:00
Gregory Nutt
b030209532 arch/arm/src/imxrt: Trivial SNVS from Rev 1. of the Reference Manual. 2018-06-28 10:54:56 -06:00
Gregory Nutt
9038cac4eb arch/arm/src/imxrt: Fix some early testing bugs. The HPRTC is now functional. However, if the LPSRTC is enabled, then there is a hang during LPSRTC initialization. It appears that there is some problem in providing clocking and initializing the LPSRTC domain. 2018-06-27 15:27:56 -06:00
Gregory Nutt
5889a2397c This commit addes support for the i.MXRT RTC. This initial commit is code complete (with limited featurs and options) but untested.
Squashed commit of the following:

    arch/arm/src/imxrt:  Fix some first time compile issues.
    arch/arm/src/imxrt:  This brings the RTC implement to code complete but still untested.
    arch/arm/src/imxrt:  Add some RTC initialization logic.
    arch/arm/src/imxrt:  Flesh out most of the RTC driver lower half and LPSRTC support.
    arch/arm/src/imxrt:  Some inital, partial implementation of the HPRTC and LPSRTC.
    arch/arm/src/imxrt:  Add HPSRTC/HPRTC file framework (no logic, just skeleton files).
    arch/arm/src/imxrt:  Add HPRTC header file.
    Some initial configuration logic for SNVS LPRTC and HP RTC.
2018-06-27 11:19:12 -06:00
Gregory Nutt
82ff00fabf arch/arm/src/imxrt/chip: Add SNVS/RTC register definition header file. 2018-06-21 12:36:12 -06:00
Ivan Ucherdzhiev
bee8ed3289 arch/arm/src/imxrt/chip: Add I2C register definition header for the i.MX RT 2018-06-21 10:03:02 -06:00
Gregory Nutt
cb374e6e62 arch/: Clean up some naming and spacing. 2018-06-20 15:38:06 -06:00
Gregory Nutt
8bd9cfe038 Squashed commit of the following:
arch/arm:  Remove support for CONFIG_ARMV7M_CMNVECTOR.  It is now the only vector support available.  Also remove CONFIG_HAVE_CMNVECTOR.  That no longer signifies anything."
    arch/arm/src/stm32:  This commit removes support for the dedicated vector handling from the STM32 architecture support. Only common vectors are now supported.
2018-06-20 12:30:37 -06:00
Gregory Nutt
05ad7208e7 configs/imxrt1050-evk: Add knsh configuration.. PROTECTED mode NSH build. 2018-06-08 16:27:14 -06:00
Gregory Nutt
548cd2892a arch/arm/src/imxrt and configs/imxrt1050-evk: Add PHY access support needed to support the network monitor. Cannot enable it yet... I am getting hardfaults when I enable the PHY interrupt. 2018-05-25 13:02:41 -06:00
Jake Choy
8601d767cc This commit adds an i.MX RT Ethernet drivers.
Squashed commit of the following:

Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/imxrt:  Add cache operations to permit the Ethernet driver to work with the D-Cache enabled, at least in write-through mode.

Author: Jake Choy <jakearcx@gmail.com>
    arch/arm/src/imxrt:  The Ethernet driver is now functional, at least with the D-Cache off.  The final fix was for the reference clock that needs to be forced to provide and input (SION).

Author: Gregory Nutt <gnutt@nuttx.org>
    Fix trivial coding standard issue.
    configs/imxrt1050-evk:  Correct CONFIG_RAM_SIZE in all configurations (5Kb not 5Mb).  I don't believe that CONFIG_RAM_SIZE is used at all in the i.MX RT so this is as grievous an error as it seems.  Also enabled built-in applications in all NSH configurations.
    arch/arm/src/imxrt/imxrt_enet.c:  Trivial and cosmetic.
    Cosmetic update to comments.
    arch/arm/src/imxrt/imxrt_enet.c:  Oops.. put the PHY interrupt init hooks in the wrong place.  That is a one-time initialization but imxrt_initphy() is called on each ifup.
    arch/arm/src/imxrt/imxrt_enet.c:  Add hooks for board-specific PHY initialization (not yet needed, but there when needed).
    Remove dangling white space at the end of lines
    arch/arm/src/imxrt/Kconfig:  Add option for board-specific PHY initialization.
    configs/imxrt1050-evk/src:  Add basic logic to support PHY interrupts.  Incomplete.. needs additional support in imxrt_enet.c to 1. call to initialize PHY interrupt features, and 2. IOCTL commands to access PHY registers.
    configs/imxrt1050-evk/README.txt: Trivial update.
    configs/imxrt1050-evk/netnsh/defconfig:  Disable LED support because pins conflict with PHY.  Enable device statists.  Enable NSH ifup and ifdown commmands
    arch/arm/src/imxrt:  Use macros in imxrt_periphclks.h vs. direct CCM CCGR accesses in Ethernet driver.
    arch/arm/src/imxrt:  Misc changes for a clean compilation of Ethernet deriver.  configs/imxrt1050-evk/netnsh:  Add an NSH configuration for testing Ethernet.

Author: Jake Choy <jakearcx@gmail.com>
    arch/arm/src/imxrt:  Initial WIP Ethernet driver.
2018-05-25 09:36:23 -06:00
Gregory Nutt
8edbf04a0d /arch/arm/src/imxrt/imxrt_edma.c: Correct arguments to arch_clean_dcache() and arch_invalidate_dcache(). 2018-05-24 09:41:46 -06:00
Gregory Nutt
c9be3dd387 arch/arm/src/imxrt/imxrt_edma.c: Fix some issues with adding a new TCD to the end of a scatter/gather chain: Was not correctly writing back the new tail pointer; Need to flush the previous TCD in the chain whose fields were modify to link to the new TCD. 2018-05-23 20:29:20 -06:00
Gregory Nutt
618d264e1d arch/arm/src/imxrt: There is a separate interrupt vector for DMA channel error interrupts. 2018-05-23 06:52:41 -06:00
Gregory Nutt
db0cdfc407 Squashed commit of the following:
arch/arm/src/imxrt:  May eDMA channel linking a configuration option.  Add support to select the DMA channel priority and pre-emption controls.
    arch/arm/src/imxrt:  Update some HowTo comments in the eDMA header file.
    arch/arm/src/imxrt:  Fix a logic error in parmater passing.  Caller does not know actual channel number when setting up linked channel, only the channel handler.
2018-05-22 15:28:28 -06:00
Gregory Nutt
890656f043 Squashed commit of the following:
arch/arm/src/imxrt:  Fixes for clean eDMA driver build with Scatter/Gather enabled.
    arch/arm/src/imxrt:  Fixes for clean eDMA driver build with Scatter/Gather disabled.
    arch/arm/src/imxrt:  Add flags to DMA configuration to control transfer setup.  Remove some user interfaces that are inconsistent with modular design.
    arch/arm/src/imxrt:  Update DMA channel interrupt handler.
    arch/arm/src/imxrt:  Add implementation of eDMA imxrt_dmach_start().
    arch/arm/src/imxrt:  Add implementation of eDMA imxrt_dmach_setup().
    arch/arm/src/imxrt:  Add eDMA imxrt_tcd_chanlink().
    arch/arm/src/imxrt:  Add eDMA imxrt_dmach_getcount; free allocated TCDs automatically when the DMA completes or is aborted.
2018-05-22 11:39:37 -06:00
Gregory Nutt
1cf676344e Squashed commit of the following:
arch/arm/src/imxrt:  Add structures to support list of TCDs for Scatter/Gather DMA.
    arch/arm/src/imxrt:  Add eDMA imxrt_dmach_initconfig().
    arch/arm/src/imxrt:  Add eDMA imxrt_tcd_instantiate().
    arch/arm/src/imxrt:  Replacing some of the logic cloned from SAMv7 XDMAC with eDMA logic from NXP sample code.  I am thinking that the eDMA is too complex to force into the same pattern as for other MCUs.
    arch/arms/src/imxrt/imxrt_edma.c:  Add support for in-memory TCDs.
    arch/arm/src/imxrt/chip:  Add an in-memory representation of the TCD in imxrt_edma.h
2018-05-21 11:46:16 -06:00
Gregory Nutt
cce5d017b4 arch/arm/src/imxrt: Fix some eDMA interrupt controls. 2018-05-20 12:21:36 -06:00
Gregory Nutt
20f1597fa5 arch/arm/src/imxrt: IOMUXC logic now uses peripheral clock helpers (I think it was enabling the wrong clocks anyway). Minor updates to eDMA logic. 2018-05-20 12:02:50 -06:00
Gregory Nutt
9c9c0eb4d5 arch/arm/src/imxrt: Add eDMA interrupt decode logic. 2018-05-20 10:59:36 -06:00
Gregory Nutt
87df439909 arch/arm/src/imxrt: Add eDMA initialization logic. 2018-05-20 10:34:27 -06:00
Gregory Nutt
0f6aeb7cff arch/arm/src/imxrt: Centralilze and standardize control of peripheral clocking. Add logic to initialize the DMAMUX. 2018-05-20 10:03:45 -06:00
Gregory Nutt
fe364ba1f4 arch/arm/src/imxrt: A little more eDMA logic. Slow progress. 2018-05-17 14:23:58 -06:00
Gregory Nutt
1acc765156 arch/arm/src/imxrt: A little more DMA-related logic. Still no significant logic in place. 2018-05-17 09:48:45 -06:00
Gregory Nutt
f91c3666a1 arch/arm/src/imxrt: A little more DMA logic. Still far from complete. 2018-05-16 16:20:30 -06:00
Gregory Nutt
ea8d78c9c5 arch/arm/src/imxrt: Add framework for eDMA support. Initial port is a rip off from the SAMA5Dx and is little more than the framework for the DMA support. 2018-05-16 14:28:22 -06:00
Gregory Nutt
9bb4a80838 arch/arm/src/imxrt/chip: Remove un-necessary TCD structure. 2018-05-16 12:35:10 -06:00
Gregory Nutt
3b355d52f2 arch/arm/src/imxrt/chip: Add more eDMA register definitions. Still missing TCD definitions. 2018-05-16 12:01:05 -06:00
Gregory Nutt
8f0b87a2d9 arch/arm/src/imxrt/chip: Add more eDMA register definitions. Still missing bit-field definitions. 2018-05-16 09:49:48 -06:00
Jake Choy
4638e3f4c7 rch/arm/src/imxrt/chip: Add Ethernet pin properties. 2018-05-16 07:50:24 -06:00
Gregory Nutt
79ab957982 arch/arm/src/imxrt/chip: Add DMA MUX register definition header file. 2018-05-16 07:25:37 -06:00
Gregory Nutt
2b2f3bf263 arch/arm/src/imxrt/chip: Add DMA channel assignments. 2018-05-15 14:44:33 -06:00
Jake Choy
034ab467e6 arch/arm/src/imxrt: Corrects some IOMUX controls. 2018-05-15 10:16:57 -06:00
Gregory Nutt
c82724d462 arch/arm/src/imxrt: Add missing support for the Cortex-M7 caches; configs/imxrt1050-evk: Enable I- and D-Caches in the nsh configuration. Calibrate the delay loop. Add support for the on-board LED. 2018-05-15 10:05:16 -06:00
Gregory Nutt
c681519720 arch/arm/src/imxrt/imxrt_serial.c: Fix some interrupt instabilities; must be in a critical section when modifying serial interrupts. configs/imxrt1050-evk/nsh/defconfig: Use the BASEPRI register to enable/disable interrupts; enable the PROCFS file system. 2018-05-15 07:50:19 -06:00
Gregory Nutt
2fa738e08c arch/arm/src/imxrt: Various fixes from attempt at initial bringup. 2018-05-14 16:07:34 -06:00
Gregory Nutt
3a34b29f76 arch/arm/src/imxrt/chip: Add pin multiplexing header files. 2018-05-14 13:29:53 -06:00
Gregory Nutt
ce7dcfcd12 arch/arms/src/imrxt: Correct a few logic mistakes in the i.MX RT serial driver. 2018-05-11 07:52:48 -06:00
Michael Jung
29af41a85f libc/unistd: Initial, minimal implementation of sysconf(). Only sufficient to support the functionality of less standard getdtabilesize(). 2018-05-10 14:08:34 -06:00
Gregory Nutt
bd455c9e46 arch/arm/src: All ARM architctures now support CONFIG_ARCH_IDLE_CUSTOM 2018-05-07 10:13:20 -06:00
Jake Choy
4261249fb6 arch/arm/src/imxrt: Add GPIO5 IRQ support. 2018-05-02 09:19:42 -06:00
Jake Choy
6e1d43dd11 arch/arm/src/imxrt: This commit fixes more issues with the i.MX RT GPIO IRQ.
imxrt_gpioirq.c
    - Add check for interrupt mask register before dispatching ISR. The GPIO_ISR bits are set independent of the GPIO_IMR bits.
  imxrt_irq.c
    - fixed a range check for extint in function imxrt_irqinfo().
2018-05-01 14:25:47 -06:00
Jake
e54f221ed0 arch/arm/src/imxrt: Fix some syntax errors in the GPIO IRQ logic. 2018-04-30 14:58:09 -06:00
Jake
5e7fe7b881 arch/arm/src/imxrt: Add IOMUX implemention for GPIO5. 2018-04-27 08:42:02 -06:00
Ivan Ucherdzhiev
c881ea6d5b arch/arm/src/imxrt: IMXRT LPUART Clock enable fix. 2018-04-27 06:46:09 -06:00
Gregory Nutt
27828d0128 arch/arm/src/imxrt: Fix masks used in GPIO pin configurations. Noted by jakearcx. 2018-04-26 08:18:56 -06:00
Gregory Nutt
f3a8e01557 arch/arm/src/imxrt/chip: Add some missing definitions for GPIO5 2018-04-25 15:12:08 -06:00
Gregory Nutt
17cc0b9bfe arch/arm/src/imxrt: Minor reparitioning to account for the fact that the GPIO5 base address is not contiguous with the GPIO1-4 base addresses. 2018-04-25 14:54:14 -06:00
Gregory Nutt
83ccdd0105 arch/arm/src/imxrt: Fix typo introduced in last commit. Noted by jakearcx@gmail.com. 2018-04-20 06:49:45 -06:00
Gregory Nutt
021b4954d7 arch/arm/src/imxrt: Add power management hooks 2018-04-17 09:17:44 -06:00
Ivan Ucherdzhiev
26214f7fb5 arch/arm/src/imxrt: Corrects error in serial interrupts and baud setup. Now the baseic IMXRT1050-EVK port is ready. The console is working. 2018-04-17 07:15:15 -06:00
Gregory Nutt
d59c97208c arch/arm/src/imxrt: Fix problem with with CPU hanging during boot in the clockconfig function. configs/imxrt1050-evk/scripts: Update linker script so that the NXP boot header will be included in the build. 2018-04-16 09:30:04 -06:00
Ivan Ucherdzhiev
cf8c25df64 This commit brings in basic support fo the i.MX RT 1050 'crossover' SoC. The basic support is complete and compiles without error, but is still untested.
This port was the joing effort of Janne Rosberg, Ivan Ucherdzhiev, and myself.  I give credit to Ivan for the kill because he is the one to held on to the end.

Squashed commit of the following:

  Author: Gregory Nutt <gnutt@nuttx.org>
    configs/imxrt1050-evk/scripts:  Add section to linker script to handle the case where RAMFUNCs are enabled.  RAMFUNCs appear to be enabled in the default configuration ... they probably should not be enabled.

  Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
    arch/arm/src/imxrt:  imxrt_lowputc.c is finished. Now everything needed for the initial port is done and ready for testing.
    arch/arm/src/imxrt:  Add logic to imxrt_lowputc.c.  Still incomplete.

  Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
    arch/arm/src/imxrt:  Add serial support.  configs/imxrt1050-evk:  Add linker script.

  Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/imxrt:  Add initial cut at imxrt_allocateheap.c

  Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
    arm/arm/src/imxrt:  Completes all definitions for PADMUX, CTLMUX, and IOMUX_INPUT and mapping tables on imxrt_gpio.c and imxr_iomuxc.c.
    arch/arm/src/imxrt/chip:  Add definitions for IMXRT_PADCTL and IMXRT_PADMUX registers.  Only the IMXRT_INPUT definitions in this commit.
    arch/arm/src/imxrt/chip:  Add more IOMUXC register definitions.

  Author: Gregory Nutt <gnutt@nuttx.org>
    configs/imxrt1050-evk:  Add STRIP definition to Make.defs.
    arch/arm/src/imxrt:  Bring in i.MX6 memory configuration settings.
    arch/arm/src/imxrt:  Remove call to non-existent imxrt_gpioinit() from imxrt_start.c.
    arch/arm/src/imxrt:  Bring in incomplete imxrt_iomuxc.c file from i.mx6.
    arch/arm/src/imxrt:  Add first cut at GPIO interrupt logic.
    arch/arm/include:  Add definitions to support a second level of GPIO pin interrupts.

  Author: Janne Rosberg <janne.rosberg@offcode.fi>
    arch/arm/src/imxrt:  Add imxrt_wdog.c/.h

  Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/imxrt:  Port SAMv7 interrupt logic to imxrt_irq.c.
    arch/arm/src/imxrt:  More clarification of the start-up memory map.
    arch/arm/src/imxrt:  Some mostly cosmetic clean-up to the imxrt_start.c file that was so rudely taken from the SAMv7.
    arch/arm/src/imxrt:  Add imxrt_start.c.  Initial commit is the the SAMv7 startup logic with name changes.

  Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
    arch/arm/src/imxrt:  Adds a few IOMUXC register definitions.

  Author: Janne Rosberg <janne.rosberg@offcode.fi>
    arch/arm/src/imxrt:  Add imxrt_clockconfig.c/.h
    configs/imxrt1050-evk:  Add clock configuration definitions to board.h
    arch/arm/src/imxrt:  Fix CCM register name; Fix doubly defined in LPUART bit field.
    arch/arm/src/imxrt:  Add analog defines to CCM register definition header file.

  Author: Gregory Nutt <gnutt@nuttx.org>
    arch/arm/src/imxrt:  Bring in GPIO C files from i.MX6.  Things are in disarray now because that GPIO logic depends on IOMUXC logic which is not yet in place.
    arch/arm/src/imxrt:  Add a few more GPIO definitions to make the header file compatible with i.MX6
    arch/arm/src/imxrt/chip:  Add GPIO register definition file.

  Author: Janne Rosberg <janne.rosberg@offcode.fi>
    arch/arm/src/imxrt:  Add DCDC register definitions.
    arch/arm/srch/imxrt: Add CCM register bit definitions

  Author: Gregory Nutt <gnutt@nuttx.org>
    Purely cosmetic
    arch/arm/src/imxrt:  Add system reset controller register definition header file.
    Embarassingly trivial change left in compiler.
    arch/arm/src/imxrt:  Finishes i.MX RT1050 LPUART register definition header file.
    arch/arm/src/imxrt:  Beginning of an i.MX RT1050 LPUART register definition header file.
    Some trivial things

  Author: Janne Rosberg <janne.rosberg@offcode.fi>
    arch/arm/src/imxrt:  Add imxrt_wdog.h
    arch/arm/src/imxrt:  Add initial imxrt_ccm.h

  Author: Gregory Nutt <gnutt@nuttx.org>
    Trivial update to README.
    arch/arm/src/imxrt:  The i.MX Rt implements 4 bits of interrupt priority, not two.  Thanks, Janne.
    arch/arm/src/imxrt:  Fix some initial compile issues.  Still a long way from complete, but there is a buildable environment now for the imxrt1050-evk.
    configs/imxrt1050-evk:  Add an initial NSH configuration for testing.
    configs/Kconfig:  Hook the i.MX RT 1050 board configuration into the NuttX configuration system.
    configs/imxrt_evk:  Add the framework for i.MX RT 1050 board support.
    arch/arm/src/imxrt:  Bring in a few more files from LPC54xxx.
    arch/arm/src/imxrt:  Bring in imxrt_clrpend() from the LPC54xxx.
    arch/arm/src/imxrt:  Bring in Cortex-M7 SysTick setup from the SAMv7.
    arch/arm/src/imxrt:  Add a few easy files.
    arch/arm/src/imxrt/chip:  Add memory map header files.
    arch/arm/src/imxrt:  A few basic files to start the port to the i.MX RT 1050.
2018-04-12 09:31:09 -06:00