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9958 Commits

Author SHA1 Message Date
Gregory Nutt
729ee7c099 ARMv7-A: Small improvement to some register handling in context restoration. 2016-12-23 11:13:18 -06:00
Gregory Nutt
d9ef0e86fb Fix a couple of errors in the last commit 2016-12-23 10:45:13 -06:00
Gregory Nutt
c00a1870d7 Implement deferred IRQ locking. Adds support for ARMv7-A. 2016-12-23 10:17:36 -06:00
Gregory Nutt
e6fff09ef8 Implement deferred IRQ locking. So far only form ARMv7-M. 2016-12-23 07:55:41 -06:00
David Sidrane
76ceb37553 Allow dma in 1 bit mode in STM32F4xxx 2016-12-22 09:19:37 -10:00
Gregory Nutt
fb146abee0 All CMP platforms: Apply same fix verified on other platforms found on Xtensa. 2016-12-21 14:04:09 -06:00
Gregory Nutt
5666bf30a7 Review of last PR 2016-12-20 07:08:46 -06:00
Young
07b70fcc20 Improve the PWM logs 2016-12-20 17:05:51 +08:00
Young
9d355e12d5 Support indefinite number of pulses generation in PULSECOUNT mode 2016-12-20 14:08:31 +08:00
Young
e35406f7d6 Support PWM_PULSECOUNT feature for TI tiva 2016-12-20 13:20:04 +08:00
David Sidrane
ec85425041 STM32: Fix some STM32F7 copy paste errors 2016-12-17 08:31:12 -06:00
Gregory Nutt
4795d58e03 Back out most of 46dbbe837e. The order is correct -- or, rather, the order is the same as the order that response data is provided. Change the order will break all other drivers. 2016-12-15 07:16:24 -06:00
Gregory Nutt
f063e4c5ac Remove Calypso architecture support and support for Calypso SERCOMM driver. 2016-12-13 18:35:52 -06:00
Gregory Nutt
c83da3c48f Remove minnsh configurations and support logic: up_getc() and lowinstream. 
This was an interesting exercise to see just how small you could get NuttX, but otherwise it was not useful:  (1) the NSH code violated the OS interface layer by callup up_getc and up_putc directly, and (2) while waiting for character input, NSH would call up_getc() which would hog all of the CPU.  NOt a reasonably solution other than as a proof of concept.
 2016-12-13 18:01:23 -06:00
Gregory Nutt
26560cb9e1 i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept. 2016-12-13 16:59:50 -06:00
Frank Benkert
a36ed28790 SAMV7: MCAN: Prevent Interrupt-Flooding of ACKE when not connected to CAN-BUS. An Acknowledge-Error will occur every time no other CAN Node acknowledges the message sent. This will also occur if the device is not connected to the can-bus. The CAN-Standard declares, that the Chip has to retry a given message as long as it is not sent successfully (or it is not cancelled by the application). Every time the chip tries to resend the message an Acknowledge-Error-Interrupt is generated. At high baud rates this can lead in extremely high CPU load just for handling the interrupts (and possibly the error handling in the application). To prevent this Interrupt-Flooding we disable the ACKE once it is seen as long we didn't transfer at least one message successfully. 2016-12-13 11:22:54 -06:00
Gregory Nutt
edeee90c66 i.MX6 interrupt handling: Additional logic needed to handle nested interrupts when an interrupt stack is used 2016-12-13 10:04:38 -06:00
Gregory Nutt
113d8bdcca Fix some SMP-related compilation errors 2016-12-09 17:10:59 -06:00
Gregory Nutt
8b81cf5c7e Merged in david_s5/nuttx-3/david_s5/typo-in-stm32f76xx77xx_pinmaph-edited-on-1481298811328 (pull request #182) 
Typo in stm32f76xx77xx_pinmap.h edited online with Bitbucket
 2016-12-09 10:54:39 -06:00
Alan Carvalho de Assis
35023e4c6d LPC43xx SD card: Correct pin configuration options needed for SD card pins. 2016-12-09 10:54:17 -06:00
David Sidrane
64ae731c99 stm32_allocateheap.c edited online with Bitbucket 2016-12-09 16:35:35 +00:00
David Sidrane
e7597d1754 Typo in stm32f76xx77xx_pinmap.h edited online with Bitbucket 2016-12-09 15:53:58 +00:00
David Sidrane
df9c5b33a0 Added STM32F469 RAM size and deliberated STM32F446 size 2016-12-09 05:02:31 -10:00
Paul A. Patience
30bbeb6c1f STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs 2016-12-08 16:31:39 -05:00
David Sidrane
dd309ad9e8 I was wrong - the original commit was correct. Assume a write op on the last word: address of 0xxxxxfe and count of 2. It is a valid operation and address+count is == STM32_FLASH_SIZE - so that is OK 2016-12-08 21:14:31 +00:00
David Sidrane
c77bda47d7 BUGFIX:STM32F427 was rebooting. Over reached family. 2016-12-08 20:31:56 +00:00
Gregory Nutt
ab43681f15 Update TODO and some comments. 2016-12-08 10:24:40 -06:00
Pierre-noel Bouteville
017773eda3 EFM32: Fix a compilation error 2016-12-07 09:13:13 -06:00
Gregory Nutt
a7b688e87b sched notes: Add additional note to see if/when CPU is started in SMP mode. 2016-12-07 09:08:20 -06:00
Gregory Nutt
dc79e35d65 For Cortex-A9, should also set ACTLR.FW in SMP mode to enble TLB and cache broadcasts. Does not fix SMP cache problem. 2016-12-07 09:06:41 -06:00
Gregory Nutt
b9be0279b1 Coding standard requires a blank line after every comment. 2016-12-07 06:52:15 -06:00
Gregory Nutt
cae56b825b Merged in david_s5/nuttx/upstream_to_greg_SDIO_fix (pull request #177) 
Allow a config to override the SDIO clock edge setting
 2016-12-07 12:48:11 +00:00
David Sidrane
cbf863b1ca STM32F7: Allow the config to override the clock edge setting 2016-12-06 13:43:57 -10:00
David Sidrane
7cc0a06f44 STM32: Allow the config to override the clock edge setting 2016-12-06 13:30:07 -10:00
Gregory Nutt
e190e1ee5b stm32fxxxxx_otgfs.h edited online with Bitbucket 2016-12-06 15:58:05 +00:00
Gregory Nutt
8e447453e1 Add a missing bit field definitions that was lost when stm32_otgfs.h was deleted. 2016-12-06 09:22:03 -06:00
Gregory Nutt
d6437407b1 Fix broken build. Previous commit removed a file that was being used. 2016-12-06 09:03:00 -06:00
Gregory Nutt
b6a21edb42 Merged in david_s5/nuttx/upstream_to_greg (pull request #176) 
Upstream to greg
 2016-12-06 12:22:42 +00:00
David Sidrane
885b718552 Expanded otgfs support to stm32F469 and stm32f446 
Added missing bits definitions
   Used stm32F469 and stm32f446 bit definitions
   Removed unsed header file
 2016-12-05 18:07:57 -10:00
David Sidrane
50f36f8967 Added support for stmf469 SAI and I2S PLL configuration and STM446 fixes 2016-12-05 14:21:46 -10:00
David Sidrane
8b31eda4d8 Added Timers 2-5 and control of SAI and I2S PLLs 2016-12-05 14:19:56 -10:00
Gregory Nutt
9ed0387379 Olimex-LPC1766-STK: Enable procfs in NSH configuration. Automount /proc on startup. 2016-12-05 08:52:40 -06:00
Gregory Nutt
6cff0a7012 SAMA5 PWM: Minor improvement to a loop 2016-12-04 15:48:13 -06:00
Gregory Nutt
39c4ecbcd0 SAMA5 PWM: Costmetic 2016-12-04 15:39:53 -06:00
Gregory Nutt
ff76ebfd31 SAMA5 does not build when executing from SDRAM before board frequencies are not constant. Rather, the bootloader configures the clocking and we must derive the clocking from the MCK left by the bootloader. This means lots more computations. This is untested on initial commit because I don't have a good PWM test setup right now. 2016-12-04 15:25:43 -06:00
Masayuki Ishikawa
d92a7886a4 SAM3/4: Add SMP support for the dual-core SAM4CM 2016-12-04 07:23:31 -06:00
Masayuki Ishikawa
84900298b7 ARMv7-M SMP: Applied the latest changes for ARMv7A-SMP 2016-12-04 06:49:49 -06:00
Gregory Nutt
9c65b0321d Eliminate some warnings 2016-12-04 06:24:24 -06:00
Gregory Nutt
920a9592d1 Fix a naming collision introduced in last big commit 2016-12-03 18:19:08 -06:00
Gregory Nutt
7467329a98 Eliminate CONFIG_NO_NOINTS. Lots of files changed -> lots of testing needed. 2016-12-03 16:28:19 -06:00
Gregory Nutt
ad3897531f C5471 Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 12:17:55 -06:00
Gregory Nutt
43459fe75e DM09x0 Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 11:42:15 -06:00
Gregory Nutt
bfa1da14e2 LM3S Ethernet now supports CONFIG_NET_NOINTS 2016-12-03 08:32:49 -06:00
Gregory Nutt
1851e9e837 SAMA5D3: Add support for CONFIG_NET_NOINTS to EMACA and GMAC driver. 2016-12-02 16:36:27 -06:00
Gregory Nutt
b95e1f656b i.MX6: Add an untested SPI driver taken directly from the i.MX1 port. 2016-12-02 13:51:07 -06:00
Alan Carvalho de Assis
cd119ad544 GPDMA driver for the LPC43xx. The GPDMA block is basically the same as the LPC17xx. Only the clock configuration is different and LPC43xx has four different DMA request sources, where LPC17xx has only two. 2016-12-01 18:01:04 -06:00
Sebastien Lorquet
db24f237d7 STM32L4: Correct USART1/2 definitions. Use default mbed UART4 settings 2016-12-01 09:00:59 -06:00
Alan Carvalho de Assis
8b3a6d1eca LPC43 SD/MMC: Correct some git definitions on SMMC control register in lpc43_sdmmc.h 2016-11-30 14:50:32 -06:00
Janne Rosberg
a03d26e88d stm32_otghshost: if STM32F446 increase number of channels to 16 2016-11-30 12:17:12 -06:00
Gregory Nutt
44668c00a0 LPC17 Ethernet: Tiny, trivial, cosmetic spacing change 2016-11-30 12:16:21 -06:00
Gregory Nutt
934aded293 arch/: Adapt all Ethernet drivers to work as though CONFIG_NET_MULTIBUFFER were set. Remove all references to CONFIG_NET_MULTIBUFFER 2016-11-29 16:06:48 -06:00
Gregory Nutt
f06d521c10 Minor extensions to some comments 2016-11-29 10:01:38 -06:00
Gregory Nutt
79bb895073 i.MX6: Don't output the alphabet if CONFIG_DEBUG_FEATURES is not set. 2016-11-29 08:34:22 -06:00
Gregory Nutt
a8b69c3efe Back out a debug change that was included in commit 2016-11-29 07:51:49 -06:00
Marc Rechté
3f91bd6056 STM32 DAC: Fix shift value whenever there are is a DAC2 and, hence, up to three interfaces. 2016-11-29 07:03:54 -06:00
Gregory Nutt
d65be718c2 sched_note: Extend OS instrumentation to include some SMP events. 2016-11-27 17:14:57 -06:00
Gregory Nutt
cbf98ae0a0 ARMv7 GIC: SGIs are non-maskable but go through the same path as other, maskable interrupts. Added logic to serialize SGI processing when necessary. 2016-11-27 13:18:34 -06:00
Gregory Nutt
21e42d18c1 ARMv7-A/i.MX6 SMP: Move SMP coherernt cache setup to earlier in initialization of CPUn, n>0 2016-11-27 11:28:24 -06:00
Gregory Nutt
cd54c71dc1 ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however. 2016-11-27 10:21:46 -06:00
Gregory Nutt
278d8330d6 arm_scu.c edited online with Bitbucket. Fux some typos. 2016-11-27 02:59:42 +00:00
Gregory Nutt
3f6eadc238 ARMv7-A: Fix some SCU SMP logic 2016-11-26 18:41:48 -06:00
Gregory Nutt
546e352830 i.MX6: Add some controls to enable SMP cache coherency in SMP mode 2016-11-26 17:46:20 -06:00
Gregory Nutt
3353d9280f i.MX6: Disable non-cached region support. Add SCU register definitions. 2016-11-26 17:03:57 -06:00
Gregory Nutt
8dc79bb7ef Update comments and README file 2016-11-26 16:02:37 -06:00
Gregory Nutt
b2ba12e02a SMP: Basic function 2016-11-26 14:23:23 -06:00
Gregory Nutt
785ed5faf2 SMP: A few more compile/link issues. Still problems. 2016-11-26 13:20:11 -06:00
Gregory Nutt
6ff6da083f Fix a few compile related issues from the last commit 2016-11-26 12:23:09 -06:00
Gregory Nutt
aae306e942 i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region. 2016-11-26 12:04:02 -06:00
Gregory Nutt
dda0ac8b21 Update comments 2016-11-26 11:06:24 -06:00
Gregory Nutt
9376296e99 Merge remote-tracking branch 'origin/master' into imx6-smp 2016-11-26 11:02:55 -06:00
Gregory Nutt
8bacb1e426 Update comments 2016-11-26 11:02:21 -06:00
Gregory Nutt
bdf570ea08 Fix typos in comments 2016-11-26 10:42:25 -06:00
Gregory Nutt
2fba04f752 i.MX6 SMP: Beginning of non-cacheable region (incomplete) 2016-11-26 10:37:06 -06:00
Gregory Nutt
61b45a8544 i.MX6: Add some comments 2016-11-26 09:27:29 -06:00
Gregory Nutt
e3fe320e08 SMP: Add support for linking spinlocks into a special, non-cached memory region. 2016-11-26 08:47:03 -06:00
Maciej Wójcik
0d0b1b64e2 Fix for F1 RTC Clock, tested on F103 2016-11-25 06:17:18 +01:00
Gregory Nutt
b08fb33c28 SMP: Fix typos in some conditional compilation 2016-11-24 17:59:45 -06:00
Gregory Nutt
7f636f2280 SMP: Add spin_trylock(). Use this in conditions where other CPUs need to stopped but we cannot call enter_critical_section. 2016-11-24 13:33:43 -06:00
Gregory Nutt
f77dcdf323 ARMv7-A SMP: Add a little logic to signal handling. 2016-11-24 11:45:05 -06:00
Gregory Nutt
c03d126da6 arm_cpupause.c edited online with Bitbucke. What was I thinking... Back out previous change. 2016-11-24 04:45:07 +00:00
Gregory Nutt
19e7f2210e arm_cpupause.c edited online with Bitbucket. Fix a typo in a comment. 2016-11-24 04:24:40 +00:00
Gregory Nutt
4b0bbf41ca SMP: Fix backward condition in test. 2016-11-23 22:24:14 -06:00
Alan Carvalho de Assis
7dbc25b02b LPC43xx: Add timer driver; configs/bambino-200e: Add support for timer driver 2016-11-23 13:33:51 -06:00
Gregory Nutt
f90525a5d1 SMP: Update some comments; trivial improvement by inlining static function. 2016-11-22 16:48:57 -06:00
Gregory Nutt
12f830ffd5 SAM3/4: Name of method is now setcallback, not sethandler 2016-11-22 12:06:07 -06:00
Gregory Nutt
bac7153609 SMP: Add logic to avoid a deadlock condition when CPU1 is hung waiting for g_cpu_irqlock and CPU0 is waitin for g_cpu_paused 2016-11-22 11:34:16 -06:00
Sebastien Lorquet
ec586ab350 implementation of dumpgpio for stm32l4, was required for pwm debug. 2016-11-22 07:57:21 -06:00
Gregory Nutt
130bfa3f6b Remove a assertion condition that appears to rarely cause false-alarm assertions. Teported by Petteri Aimonen 2016-11-21 14:43:56 -06:00
Gregory Nutt
f53e48199f Simplify and document some macros 2016-11-21 13:12:43 -06:00
Gregory Nutt
558784d06f Spinlocks: Added capability to provide architecture-specific memory barriers. This was for i.MX6 but does not help with the SMP problems. It is still a good feature. 2016-11-21 11:55:59 -06:00
Gregory Nutt
0804286ad3 arch/: Add option to use low-priority work queue to all Ethernet drivers in arch that support CONFIG_NET_NOINTS. 2016-11-19 09:20:01 -06:00
Gregory Nutt
0db99b8c89 Trivial fix from review of last PR 2016-11-19 06:52:51 -06:00
Gregory Nutt
8705ce816a Merged in gnagflow/nuttx (pull request #173) 
Master
 2016-11-19 12:49:56 +00:00
Wolfgang Reißnegger
b23c1f8817 Typo fix in sam_udp.c 2016-11-18 17:23:22 -08:00
Wolfgang Reißnegger
d135246a7d SAM3/4: Remove 'stalled' flag in UDP driver. 
The flag is not necessary. The state of the endpoint can be determined
using 'epstate' instead.
 2016-11-18 17:23:21 -08:00
Wolfgang Reißnegger
9e349f4335 SAM3/4: Remove unused 'halted' flag in UDP driver. 2016-11-18 17:23:21 -08:00
Wolfgang Reißnegger
c7ef82c546 SAM3/4: Add delay between setting and clearing the endpoint RESET bit in sam_ep_resume(). 
We need to add a delay between setting and clearing the endpoint reset
bit in SAM_UDP_RSTEP. Without the delay the USB controller will (may?)
not reset the endpoint.

If the endpoint is not being reset, the Data Toggle (DTGLE) bit will
not to be cleared which will cause the next transaction to fail if
DTGLE is 1. If that happens the host will time-out and reset the bus.

Adding this delay may also fix the USBMSC_STALL_RACEWAR in
usbmsc_scsi.c, however this has not been verified yet.
 2016-11-18 17:23:21 -08:00
Paul A. Patience
8d9804d57b STM32: STM32F303xB and STM32F303xC chips have 4 ADCs 2016-11-18 19:28:09 -05:00
Gregory Nutt
f92afbfbf3 apps/examples/timer: Restore the timer example, but adapt the interface to use the new signal logic from Sebastien, Lorquet. Totally untested and probably does not work! 2016-11-17 15:19:17 -06:00
Gregory Nutt
19c1c9d78b All timer lower half drivers. Port Sebastien's changes to all all other implementations of the timer lower half. Very many just and untested. Expect some problems. 2016-11-17 15:03:31 -06:00
Sebastien Lorquet
197cec58d2 timer driver: Use signal to notify of timer expiration. Add generic argument so that there can be additional usage. 2016-11-17 14:38:21 -06:00
Gregory Nutt
18ad40b98c ARMv7-M: Fix double allocation of MPU region in mmu.h 2016-11-17 13:37:24 -06:00
Gregory Nutt
bb19f1b499 spinlocks should be volatile. 2016-11-17 10:04:22 -06:00
Kolb, Stefan
bf096873a1 SAMV7 USBDEVHS: A problem occurred if the USB cable is unplugged while a large amount of data is send over an IN endpoint using DMA. If the USB cable is plugged in again after a few seconds it is not possible to send data over this IN endpoint again, all other endpoints work as expected. 
The problem occurs because if the USB cable is unplugged while an DMA transfer is in flight the transfer is canceled but the register SAM_USBHS_DEVDMACTRL is left in an undefined state.  The problem was fixed the problem by resetting the register SAM_USBHS_DEVDMACTRL to a known state. Additionally all pending interrupts are cleared.
 2016-11-14 10:32:49 -06:00
Sebastien Lorquet
98088a7456 typos 2016-11-09 19:52:29 +01:00
Sebastien Lorquet
a9c66683f2 Change the way to configure quadrature encoder prescalers. 2016-11-09 19:16:44 +01:00
Gregory Nutt
3cb1e0e67f STM32F7: Fix Make.defs. Would not work if only SDMMC2 were enabled. 2016-11-07 09:37:22 -06:00
Marc Rechté
eb9a8ed790 STM37xx PWM: Add PWM driver support for STMF37xx. The changes have been tested successfuly for TIM4 and TIM17 (different IPs). 2016-11-07 09:35:48 -06:00
Gregory Nutt
1344d8b466 STM32F746-WS: A few repairs to the nsh/defconfig for USB support. 2016-11-07 09:20:47 -06:00
Gregory Nutt
dd04d73afe STM32F7 SD/MMC driver depends on CONFIG_SDIO_DMA which is only defined in stm32/Kconfig. Changed to CONFIG_STM32F7_SDMMC_DMA and defined in stm32f7/Kconfig. 2016-11-07 09:16:34 -06:00
Gregory Nutt
ac6581acec Changes from review of last PR 2016-11-07 08:28:39 -06:00
Gregory Nutt
261aef1e0d Merged in petekol/nuttxnsm (pull request #168) 
stm32f7 important usb fixes
 2016-11-07 14:08:00 +00:00
Lok Tep
d6315a3084 del stm32f74xx75xx_sdmmc.h 2016-11-07 13:12:52 +01:00
Gregory Nutt
89c3c20052 Merge remote-tracking branch 'origin/master' into misoc 2016-11-06 11:09:05 -06:00
Gregory Nutt
c1a687a4e5 Trivial changes from review of last PR 2016-11-06 08:11:01 -06:00
Heesub Shin
bda7d9ee4d ARMv7-R: fix to restore the Thumb flag in CPSR 
Thumb flag in CPSR is not restored back when the context switch occurs
while executing thumb instruction.

Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Byoungtae Cho <bt.cho@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 21:48:02 +09:00
Heesub Shin
343243c7c0 ARMv7-R: fix CPSR corruption after exception handling 
A sporadic hang with consequent crash is observed when booting:

    arm_prefetchabort: Prefetch abort. PC: 04d34a00 IFAR: 04d34a00 IFSR: 00000008
    up_assert: Assertion failed at file:armv7-r/arm_prefetchabort.c line: 87 task: init
    up_dumpstate: Current sp: 004c3df0
    up_dumpstate: Interrupt stack:
    up_dumpstate:   base: 004c05fc
    up_dumpstate:   size: 00000800
    up_dumpstate: User stack:
    up_dumpstate:   base: 004c3f58
    up_dumpstate:   size: 00000fec
    up_dumpstate: User Stack
    up_stackdump: 004c3de0: 004a0d14 004c3df0 004c3f58 004a0d20 00000057 004c2c58 09000000 004a42a4
    up_stackdump: 004c3e00: 00000003 004c3e10 004a0f1c 004bbcef 33c44b00 004a0f28 04d34a00 00000008
    up_stackdump: 004c3e20: 00000008 004a01bc 004bfd38 00000001 00007fff 00000001 34134a00 d83e4c00
    up_stackdump: 004c3e40: 09000000 00000000 33c44b00 d83e4c00 0c3f4c00 00000000 00000000 00000003
    up_stackdump: 004c3e60: 004c3e70 004a1494 04d34a00 200b0253 004c3ed8 004a5298 004c3ed8 6d00006d
    up_stackdump: 004c3e80: 0000006d 004bc3f4 00000009 004a4f64 00000009 b9e0784f 333f3ed0 69d4227d
    up_stackdump: 004c3ea0: d81f09bd 0f867344 5a7e2c12 8acefd34 5d00dc1b 004bc432 004c3f08 004c0e08
    up_stackdump: 004c3ec0: 00000000 00000000 00000000 00000000 00000000 004a4210 004a5258 004a5300
    up_stackdump: 004c3ee0: 00000000 00000001 ffffffff 004c3f80 000002b0 004a4234 00000007 004c3f08
    up_stackdump: 004c3f00: 004a58b4 004bc432 004bc3f4 004c3f80 000002b0 0000029c 00000000 0000029c
    up_stackdump: 004c3f20: 00000000 004a5900 0000ff01 00000000 00000000 004a61f4 00000000 004a5fa4
    up_stackdump: 004c3f40: 00000000 004a5f6c 00000000 004a2668 00000000 00000000 b7509f04 004c3f64
    up_registerdump: R0: 00000001 00007fff 00000001 34134a00 d83e4c00 09000000 00000000 33c44b00
    up_registerdump: R8: d83e4c00 0c3f4c00 00000000 00000000 00000003 004c3e70 004a1494 04d34a00
    up_registerdump: CPSR: 200b0253

It seems to be caused by the corrupted or wrong CPSR restored on return
from exception. NuttX restores the context using code like this:

    msr spsr, r1

GCC translates this to:

    msr spsr_fc, r1

As a result, not all SPSR fields are updated on exception return. This
should be:

    msr spsr_fsxc, r1

On some evaluation boards, spsr_svc may have totally invalid value at
power-on-reset. As it is not initialized at boot, the code above may
result in the corruption of cpsr and thus unexpected behavior.

Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 20:48:09 +09:00
Heesub Shin
6bfc6b4d23 ARMv7-R: fix typo in mpu support 
s/ARMV7M/ARMV7R/g

Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 20:48:09 +09:00
Heesub Shin
003511d198 ARMv7-R: add cache handling functions 
This commit adds functions for enabling and disabling d/i-caches which
were missing for ARMv7-R.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 20:48:01 +09:00
Heesub Shin
6a1a846011 ARMv7-R: add new Kconfig entries for d/i-cache 
Unlike in ARMv7-A/M, Kconfig entries for data and instruction caches
are currently missing in ARMv7-R. This commit adds those missing Kconfig
entries. Actual implmenetation for those functions will be added in the
subsequent patches.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:46 +09:00
Heesub Shin
2b922fcdbd ARMv7-R: remove the redundant update on SCTLR 
mpu_control() is invoking cp15_wrsctlr() around SCTLR update
redundantly.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:45 +09:00
Heesub Shin
05d477661b ARMv7-R: fix invalid drbar handling 
In ARMv7-R, [31:5] bits of DRBAR is physical base address and other bits
are reserved and SBZ. Thus, there is no point in passing other than the
base address.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:41 +09:00
Heesub Shin
af6e4f59c6 ARMv7-R: fix compilation error 
This commit fixes compilation errors on MPU support for ARMv7-R.

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:38 +09:00
Heesub Shin
96a200a71c ARMv7-R: fix typo 
fix trivial typo: s/ARMv7-A/ARMv7-R/

Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
 2016-11-06 16:07:36 +09:00
Gregory Nutt
b0dffdc2ca Fix a number of header files with mismatched 'extern C {' and '}' 2016-11-05 07:25:05 -06:00
Lok Tep
b1b2008037 bad offset 2016-11-04 22:02:15 +01:00
Lok Tep
82f8802275 typo, missing ( 2016-11-04 21:58:31 +01:00
Gregory Nutt
905f6f2956 Merge remote-tracking branch 'origin/master' into misoc 2016-11-04 09:58:57 -06:00
Gregory Nutt
8bd8ab1a45 configs/nucleo_f303re: Various fixes to get the adc configuration building again after PR. Refresh all configurations. 2016-11-04 06:59:28 -06:00
Gregory Nutt
1d0d2fb8e1 Fix typo introduced with big set of sem_setprotocol() changes. 2016-11-03 21:08:17 -06:00
Gregory Nutt
65b1ced5f2 Merge remote-tracking branch 'origin/master' into misoc 2016-11-03 18:12:02 -06:00
Gregory Nutt
0a5b4f684a arch: Disable priority inheritance on all semaphores used for signaling in the rest of the MCU drivers 2016-11-03 17:38:26 -06:00
Gregory Nutt
d8fecba333 arch: Disable priority inheritance on all semaphores used for signaling in all RNG drivers 2016-11-03 17:19:51 -06:00
Gregory Nutt
d28181da10 arch: Disable priority inheritance on all semaphores used for signaling in all USB host drivers 2016-11-03 17:05:53 -06:00
Gregory Nutt
bb6bfa633e arch: Disable priority inheritance on all semaphores used for signaling in all SD card drivers 2016-11-03 15:13:27 -06:00
Gregory Nutt
8b07aa6f7c arch: Disable priority inheritance on all semaphores used for signaling in all SPI drivers 2016-11-03 14:51:44 -06:00
Gregory Nutt
e1cd9febbf arch: Disable priority inheritance on all semaphores used for signaling in all I2C/TWI drivers 2016-11-03 14:23:42 -06:00
Spahlinger, Michael
77caf4180f SAMV7: Fix to SPI-Master driver. Without this the chip select decoding feature will not work properly 2016-11-03 09:22:33 -06:00
Gregory Nutt
8190e08948 Back out part of previous commit 2016-11-03 08:57:55 -06:00
Alan Carvalho de Assis
1e754402b8 Add C++ support linking with GNU toolchain newlib/stdlibc++ 2016-11-03 08:50:58 -06:00
Gregory Nutt
569283fa65 Merge remote-tracking branch 'origin/master' into misoc 2016-11-03 08:33:47 -06:00
Gregory Nutt
cb96e632fa LM32: Add toolchain configuration; Add Toolchain.defs. 2016-11-03 07:21:25 -06:00
Paul A. Patience
93e9387689 STM32 ADC: Fix compilation error when DMA isn't enabled 2016-11-02 12:52:19 -04:00
David Sidrane
d870f4ab29 I think, that Size is (highest address+1 - Base address) 
Base address has been removed and if address+count >= size we are outside of the Flash
 2016-11-01 22:27:35 +00:00
Aleksandr Vyhovanec
2bb15fe789 Minor changes 2016-11-01 23:48:44 +03:00
Aleksandr Vyhovanec
20a1642552 To write the last page 2016-11-01 23:34:30 +03:00
David Sidrane
b344936c7b STM32F7:otgdev fixed typo 2016-10-28 23:20:53 +00:00
Vytautas Lukenskas
5b1a3e6fe0 Restore RS485 mode on serial port open (if RS485 is enabled via menuconfig). 2016-10-28 09:10:11 -06:00
Gregory Nutt
3bacda1565 STM32 Serial: Trivial removal of an extra space in a comment 2016-10-28 07:16:52 -06:00
Paul A. Patience
912fe06a86 Add architecture-specific inttypes.h 2016-10-27 16:01:38 -04:00
Vytautas Lukenskas
d9c2789253 LPC32xx serial: Fix a typo in ioctl TIOCSRS485 ioctl. 2016-10-27 07:00:32 -06:00
Gregory Nutt
76788040d5 ESP32: Add esp32_config.h 2016-10-26 15:45:03 -06:00
David Sidrane
314dd62dd5 stm32f76xx77xx_pinmap.h Missed one 2016-10-26 21:10:59 +00:00
David Sidrane
0bab23fb1b stm32_i2c.c Dejavu 2016-10-26 21:00:50 +00:00
Gregory Nutt
6acc831e77 Remove duplicate select from Kconfig 2016-10-26 07:00:24 -06:00
Sebastien Lorquet
f24701f5c7 Merge branch 'master' into stm32l4_pinouts 2016-10-26 13:31:54 +02:00
Sebastien Lorquet
68dae715b0 CHxN channels are always outputs 2016-10-26 13:21:57 +02:00
Marc Rechte
483f012600 Initial implemention of the STM32 F37xx SDADC module. There are also changes to ADC, DAC modules. SDADC has only been tested in DMA mode and does not support external TIMER triggers. This is a work in progress. 2016-10-25 14:14:10 -06:00
Gregory Nutt
04c6319e32 Merged in slorquet/nuttx/stm32l4_uarts (pull request #155) 
Enable and renames for 32l4 UARTs 4 and 5
 2016-10-25 13:09:17 +00:00
Sebastien Lorquet
27920eeae9 Enable and renames for 32l4 UARTs 4 and 5 2016-10-25 10:55:25 +02:00
Sebastien Lorquet
9be23d0c76 Fix i2c devices rcc registers 2016-10-25 10:53:24 +02:00
Max Kriegleder
1d50259358 STM32 F4 I2c: A new implementation of the STM32 F4 I2C bottom half. The commin I2C as this did not handled correctly in the current implementation (see also https://github.com/PX4/NuttX/issues/54). The changes almost exclusively affect the ISR. 2016-10-24 16:32:10 -06:00
Frank Benkert
cf5fdf1f8f SAM Watchdog: Register the watchdog device at the configured device path CONFIG_WATCHDOG_DEVPATH vs. hard-coded /dev/wdt 2016-10-21 07:09:20 -06:00
Gregory Nutt
48fb97e7b5 More of the same cloned typo 2016-10-19 10:11:45 -06:00
Gregory Nutt
5d56172f82 Merged in w8jcik/nuttx (pull request #152) 
add tim8 to stm32f103v pinmap
 2016-10-19 16:03:34 +00:00
Gregory Nutt
841e1aa77f Fix a cloned typo 2016-10-19 09:14:21 -06:00
Maciej Wójcik
c719a32a40 add tim8 to stm32f103v pinmap 2016-10-19 16:34:07 +02:00
David Sidrane
c3543cf402 Kinetis:BugFix:i2c driver offset swapped for value in kinetis_i2c_putreg 2016-10-18 12:00:01 -10:00
David Sidrane
b29b2874fe Kinetis Allow CONFIG_ARMV7M_CMNVECTOR, CONFIG_STACK_COLORATION, CONFIG_ARCH_FPU 2016-10-18 12:00:01 -10:00
David Sidrane
bce382da52 Kinetis Support ARMV7 Common Vector and FPU 2016-10-18 12:00:01 -10:00
David Sidrane
4de46c848d Broke out DMA to use the modern Nuttx chip inclusion - still STUBS 2016-10-18 12:00:01 -10:00
David Sidrane
42ac6ecebd Kinetis broke out SPI to kinetis/kinetis_spi.h 2016-10-18 12:00:01 -10:00
David Sidrane
70d5c7753e Kinetis - Added missing headers 2016-10-18 12:00:01 -10:00
Gregory Nutt
30598c005f Cosmetic changes from review of last PR 2016-10-15 08:56:11 -06:00
David Sidrane
909ea5e8ef F4 Support versampling by 8 2016-10-15 03:56:07 -10:00
Gregory Nutt
5b46ce4889 Cosmetic changes from review of last PR 2016-10-14 17:39:21 -06:00
Gregory Nutt
f2ebb6d2a0 Merged in neilh20/anuttx/pr_K64_uid (pull request #147) 
Add Kinetis freedom-k64f uid
 2016-10-14 23:29:19 +00:00
Gregory Nutt
ad6856c931 Trivial stylistic changes from review of last PR 2016-10-14 11:12:49 -06:00
Sebastien Lorquet
fb1f424e12 Support Complementary PWM outputs on STM32L4 2016-10-14 18:06:11 +02:00
Sebastien Lorquet
f7e0a36f55 Multiple stm32l4 timer fixes: 
- too many parentheses when calculating max chan count (???)
- channel 4 does not have a complementary output
 2016-10-14 12:50:45 +02:00
neilh10
6dca9a4390 Add UID Unique ID 2016-10-13 19:50:35 -07:00
neilh10
64b020f1a8 Add UID Unique ID 2016-10-13 19:42:39 -07:00
Gregory Nutt
0bc19a63bb Merged in david_s5/nuttx-5/david_s5/kinetish-edited-online-with-bitbucket-1476115086140 (pull request #144) 
kinetis.h edited online with Bitbucket
 2016-10-10 10:04:04 -06:00
David Sidrane
0476c43748 kinetis.h edited online with Bitbucket 2016-10-10 15:58:21 +00:00
David Sidrane
4703a23171 kinetis.h edited online with Bitbucket 2016-10-10 15:56:02 +00:00
Lok Tep
9e3479555d usb set value typo 2016-10-07 15:47:30 +02:00
Lok Tep
fd92f01f55 exact values for i2c clock 2016-10-07 15:12:46 +02:00
Lok Tep
a2e4c0e898 i2s rcc typo fix 2016-10-07 15:12:34 +02:00
Jens Gräf
1d3abd17cc dma2d: fix an error in up_dma2dcreatelayer where an invalid pointer was returned when a certain underlying function failed. 2016-10-07 13:42:24 +02:00
Gregory Nutt
d61239e38f stm32_modifycr2 should be available on all platforms is DMA is enabled. 2016-10-06 08:50:52 -06:00