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508 Commits

Author SHA1 Message Date
Abdelatif Guettouche
5ac5655fa4 arch/xtensa/src/esp32/esp32_spi&spiflash: Free the correct buffer. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
172896728f arch/xtensa/src/esp32/esp32_spi.c: Instead of returning with no error 
code, assert the return of the imm_malloc function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
f0ae1dd54a arch/xtensa/src/esp32: Fix PR #1958 nxstyle issues. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7db8b920ff arch/xtensa/src/esp32/hardware: PIN_CTRL was defined twice. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
0ba0a3a092 arch/xtensa/src/esp32/hardware/esp32_soc.h: Lowercase hex value 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
b6429a50d7 arch/xtensa/src/esp32/esp32_allocateheap.c: Delete a preprocessor 
warning that's not relevant anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
1b12d20225 arch/xtensa/src/esp32/esp32_spiflash.c&esp32_spi.c: Allocate a buffer from DRAM 
when the given buffer is from PSRAM.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7ac5f7a35b arch/xtensa/src/esp32: Add a PROCFS entry for the internal memory 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
a1318926b4 arch/xtensa/esp32: Allow internal drivers and tasks' stack to be 
allocated in an internal heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-25 20:20:01 -03:00
Yoshinori Sugino
3ac90fca79 Remove tabs and spaces at the end of lines 2020-10-24 09:38:21 +01:00
YAMAMOTO Takashi
89c9855d7b esp32: Fix a few #endif comments 2020-10-20 18:50:28 +08:00
Xiang Xiao
eb4121ce38 Change all 'Nuttx' to 'NuttX' 
Unify the naming convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-10-20 01:45:06 -07:00
Juha Niskanen
94f0f55911 arch: serial: fix all TCGETS retrieving zero baud rate 
cfsetispeed() now stores baud rate to c_cflag member of
struct termios, so it must not be overridden later on.

Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2020-10-20 14:43:19 +08:00
YAMAMOTO Takashi
60a6d9cfe5 arch/xtensa/src/esp32/esp32_wlan.c: Fix an unused var warning 
chip/esp32_wlan.c: In function 'esp_ioctl':
chip/esp32_wlan.c:1262:30: warning: unused variable 'req' [-Wunused-variable]
   struct mii_ioctl_notify_s *req;
                              ^~~
 2020-10-19 21:06:07 -07:00
chenwen
67c0af650f xtensa/esp32: Add power management of deep-sleep 2020-10-17 19:38:14 -03:00
Alan C. Assis
3108233b8a Remove not needed esp32_caps.h 2020-10-17 20:02:43 +01:00
Alan C. Assis
b3905e1c03 Modify the PSRAM pins config to avoid duplicating the definitions 2020-10-17 20:02:43 +01:00
Alan C. Assis
e956c3d1d3 Fix warnings and remove not used function 2020-10-17 20:02:43 +01:00
Dong Heng
a0b84ae53e xtensa/esp32: Add ESP32 WiFi adapter and driver 2020-10-17 22:46:27 +09:00
Abdelatif Guettouche
0345b1edf7 arch/xtensa/src/esp32/Make.defs: Download Espressif's Wireless-3rdparty 
library.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-17 22:46:27 +09:00
Abdelatif Guettouche
605a49e9af arch/xtensa/src/esp/esp32/esp32_gpio.c: Fix the function's mask test 
condition and the functions' values.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-08 09:28:53 +09:00
Abdelatif Guettouche
0fdf9c7368 arch/xtensa/src/esp32/esp32_psram.c: Adapt configgpio to the latest 
change.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-08 09:28:53 +09:00
Masayuki Ishikawa
6232e7f84e arch: esp32: Fix crash on startup 
Summary:
- This commit fixes crash on startup introduced by commit 232aa62f03

Impact:
- Affects all use cases for esp32

Testing:
- Tested with esp32-core:smp with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2020-10-07 18:43:13 -03:00
Sara Souza
0faf861256 xtensa/esp32: Added Timer Support 2020-10-07 14:12:22 -03:00
Alan C. Assis
232aa62f03 Add support to PSRAM using SPIRAM interface 2020-10-07 16:55:34 +01:00
Abdelatif Guettouche
d1225f3110 arch/xtensa/src/esp32: Use the same function numbering as the TRM. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
5593683552 arch/xtensa/src/esp32/esp32_gpio.c: When configuring a pin pad, set the 
function first, if no function was assigned, fall back to the GPIO
function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
564237a602 arch/xtensa/src/esp32/esp32_gpio: Function "SPECIAL" doesn't exist. All 
pads go through the same GPIO matrix to select one of the 6 possible functions.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
efb2fd5e4b arch/xtensa/src/esp32/esp32_gpio.c: GPIO20 is not available. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
caa945cb24 arch/xtensa/src/esp32: Add a way to retrieve reset cause. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-07 11:51:47 -03:00
Abdelatif Guettouche
c20c8c6dd5 arch/xtensa/esp32: Implement system reset. 
Both CPUs are soft-reset with a call to board_reset.  This is actually a
Core Reset, so both cores and all registers are reset.  The only
exception is RTC.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-07 11:51:47 -03:00
Abdelatif Guettouche
2e4ec442ad arch/xtensa/src/esp32/esp32_intdecode.c: Don't clear A2, the mask 
argument is passed in that register

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-07 07:47:06 +09:00
saramonteiro
a562fba971 ESP32: Fixed the type of cpuint variables in esp32_emac.c esp32_i2c.c esp32_spi.c esp32_spi_slave.c 2020-10-02 09:57:56 -07:00
Abdelatif Guettouche
62732dd6b8 arch/xtensa/src/esp32/esp32_gpio.c: ESP32_NIRQ_GPIO was used instead of 
ESP32_NGPIOS

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-02 11:42:49 -03:00
Abdelatif Guettouche
844f39fc67 arch/xtensa/src/esp32/esp32_gpio.c: Change the logic of setting the ENA 
bits so that the call to up_cpu_index is only performed when SMP is
enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-02 11:42:49 -03:00
Abdelatif Guettouche
769d68a762 arch/xtensa: Fix some typos and correct some comments. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-09-30 13:55:28 -03:00
Abdelatif Guettouche
70c1170c2e Revert "arch/xtensa/src/esp32/esp32_gpio.c: Enable input mode only when" 
This reverts commit b5d3ba64e0.
 2020-09-29 09:07:41 -03:00
Abdelatif Guettouche
a128995eab arch/xtensa: Few typos and style fixes. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-09-21 19:14:19 -04:00
chenwen
64e2f102ac xtensa/esp32: Add power management of force-sleep 2020-09-20 17:23:07 +01:00
Abdelatif Guettouche
d47131d8ae arch/xtensa/src/esp32/hardware/esp32_spi.h: Remove a leftover license. 2020-09-15 14:40:17 +08:00
Abdelatif Guettouche
55f7473ba0 arch/xtensa/src/esp32/esp32_spiflash.c: #if0-out unused functions. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-09-15 14:40:17 +08:00
Abdelatif Guettouche
a97a9aeaf6 arch/xtensa/src/esp32/esp32_spiflash.c: File scope global variables are 
prefixed with g_

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-09-15 14:40:17 +08:00
Abdelatif Guettouche
c27bf32ce9 arch/xtensa/src/esp32/Kconfig: Add the SPI FLASH title to make appear in 
menuconfig.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-09-11 14:14:43 -03:00
Abdelatif Guettouche
9c0157c882 arch/xtensa/src/esp32/esp32_spiflash.c: Cosmetic changes. 
Add missing prototypes.
Fix some alignements.
Add some more comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-09-11 14:14:43 -03:00
Abdelatif Guettouche
6b6d983650 arch/xtensa/src/esp32/esp32_spiflash.c: Don't double check for direct 
read mode.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-09-11 14:14:43 -03:00
Ouss4
3560e16ac7 arch/xtensa/src/esp32/esp32_spi.c: When the TX buffer is empty send 
something to kick off the SPI clock.
 2020-09-04 17:43:51 -03:00
Ouss4
b5d3ba64e0 arch/xtensa/src/esp32/esp32_gpio.c: Enable input mode only when 
configuring an input.
 2020-09-01 15:06:58 -03:00
Ouss4
37d8799d07 arch/xtensa/src/esp32/esp32_spi.c: spi_cmddata function will be defined 
by board logic, don't need it here.
 2020-08-27 14:12:34 +08:00
Ouss4
99d3317329 arch/xtensa/src/esp32/esp32_irq.c: Include esp32_gpio.h to avoid 
implicit declaration warning.
 2020-08-27 14:12:34 +08:00
Alan C. Assis
7a1342f503 Fix coding style and other small issues 2020-08-23 08:26:10 -06:00
Alan C. Assis
4ded03a673 ESP32: Add support to RNG HW Driver 2020-08-23 08:26:10 -06:00
Dong Heng
39539be149 xtensa/esp32: Improve SPI transmission 
Master:
  1. add DMA RX/TX support
  2. add software chip selection
  3. add user defined chip selection
  4. add IOMUX check and IO map

Slave:
  1. add DMA RX/TX support
  2. add IOMUX check and IO map
  3. use full 256 bit SPI TX/RX cache in non-DMA mode
 2020-08-21 10:04:27 +01:00
Alan C. Assis
69f914adcd Another nxstyle issue fixed 2020-08-20 15:15:07 -06:00
Alan C. Assis
4e3070c542 Fix some right alignment 2020-08-20 15:15:07 -06:00
Alan C. Assis
34c144ad13 Fix many coding styles issues 2020-08-20 15:15:07 -06:00
Alan C. Assis
7d88f1e9cf Fix the introduced long line 2020-08-20 15:15:07 -06:00
Alan C. Assis
5b719daf69 Fix issues reported in the pull request and update defconfig 2020-08-20 15:15:07 -06:00
chenwen
1e9ef469dc xtensa/esp32: Add functions to switch CPU frequency from 80MHz to 240Mhz 2020-08-20 15:15:07 -06:00
Xiang Xiao
acca9fcc3b sched/wdog: Remove MAX_WDOGPARMS and related stuff 
since the variable arguments are error prone and seldom used.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-08-14 08:19:50 -06:00
Xiang Xiao
a0ce81d659 sched/wdog: Don't dynamically allocate wdog_s 
to save the preserved space(1KB) and also avoid the heap overhead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I694073f68e1bd63960cedeea1ddec441437be025
 2020-08-11 12:28:55 -06:00
Xiang Xiao
f618de9c97 Fix nxstyle warning 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-08-08 17:30:26 -03:00
Alan C. Assis
6ea7b29088 Add ESP32 Ethernet device driver 
This driver was implemented by Dong Heng<dongheng@espressif.com>
and reviewed by Alan Carvalho de Assis
 2020-08-06 23:35:16 +01:00
Alan C. Assis
c06d3e1b0a xtensa/esp32: Add SPI Flash device driver 
ESP32 runs code in a SPI Flash, so users can also use it to store
data directly or mount some parts into a filesystem.

The SPI Flash usually use SPI0.

This driver was implemented by Dong Heng dongheng@espressif.com
and modified to fix coding style by Alan Carvalho de Assis.
 2020-07-31 23:37:30 +01:00
Alan C. Assis
cb1d11a499 ESP32: Add driver support to I2C 
This driver was implemented by Dong Heng <dongheng@espressif.com>
and modified to fix coding style by Alan Carvalho de Assis.

Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@gmail.com>
 2020-07-28 14:31:55 +01:00
Alan C. Assis
ba274b999e Fix small formatting issues caused by VIM macro edition 2020-07-20 21:02:41 +01:00
Alan C. Assis
79a3fd1932 ESP32: Add driver support to SPI Master and Slave 
This driver was implemented by Dong Heng <dongheng@espressif.com>
and modified to fix coding style by Alan Carvalho de Assis.
 2020-07-19 21:26:58 +01:00
Xiang Xiao
23668a4b9b build: Remove the empty variable assignment 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-05-24 08:24:13 -06:00
Gregory Nutt
4b44b628ea Run nxstyle against all .c and .h files modified by this PR. 
All complaints fixed except for those that were not possible to fix:

- Used of Mixed case identifier in ESP32 files.  These are references to Expressif ROM functions which are outside of the scope of NuttX.
 2020-05-09 14:19:08 -03:00
Gregory Nutt
a4218e2144 include/nuttx/sched.h: Make naming of all internal names consistent: 
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
 2020-05-09 14:19:08 -03:00
Xiang Xiao
eca7059785 Refine __KERNEL__ and CONFIG_BUILD_xxx usage in the code base 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-05-01 10:43:47 -03:00
Alin Jerpelea
425e6c28dc
arch: xtensa: esp32: nxstyle fixes (#753) 
esp32 nxstyle fixes

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2020-04-08 08:28:17 -06:00
hartmannathan
bfc153ca27
Fix typos in comments and documentation (#750) 
* Fix typos in comments and documentation
 2020-04-08 06:45:35 -06:00
YAMAMOTO Takashi
f8f5830410 xtensa: Implement CONFIG_ARCH_IDLE_CUSTOM 2020-03-31 15:50:04 +08:00
Masayuki Ishikawa
6baebcecc4 arch: esp32: Fix compile error for smp 2020-03-19 19:40:18 -06:00
YAMAMOTO Takashi
f4e7845b85 esp32: emulate byte access for module text 
Tested on ESP-EYE.
 2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
855751b534 Introduce instruction memory allocator 
Necessary for dlfcn etc on ESP32, which has separate memory regions
for instruction and data.

known issues/todo
 * consider something similar to dual heaps for PROTOECTED
 * consider to adapt binfmt as well
 2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
23db3b2a48 ESP32: Use __asm__ __volatile__ for inline assembly 2020-03-13 19:06:15 -06:00
YAMAMOTO Takashi
086e8ffb12 arch/xtensa/src/esp32/esp32_cpustart.c: nxstyle fixes 
The remaining errors:

    Mixed case identifier found

I didn't fix them because they were on ROM symbols,
which are not supposed to obey NuttX's coding style.
 2020-03-13 18:51:26 -06:00
YAMAMOTO Takashi
7a06ff0392 xtensa: hostfs using simcall 
Tested on qemu -semihosting
 2020-03-12 09:03:31 -05:00
YAMAMOTO Takashi
7774cdd7aa Appease many of nxstyle errors for esp32 related files 
I skipped the following files because they were not simple.
I'll create separate PRs.

    arch/xtensa/src/esp32/esp32_cpustart.c
    arch/xtensa/src/common/xtensa_abi.h
    boards/xtensa/esp32/esp32-core/include/board.h

Also, I skipped the following files and directories because
they looked too huge and/or foreign.

    arch/xtensa/include/esp32/tie.h
    arch/xtensa/include/xtensa/xtensa_corebits.h
    arch/xtensa/src/esp32/hardware/
    arch/xtensa/include/esp32/tie-asm.h
    arch/xtensa/include/esp32/core-isa.h
    arch/xtensa/include/xtensa/core.h

I also fixed a few "is is" style typos when unwrapping long lines.
 2020-03-12 07:45:44 -06:00
Masayuki Ishikawa
a5cb0b3731 arch: xtensa: Fix SMP related logic 
NOTE: Applied the same logic as in other SMP architectures
 2020-03-04 23:34:43 -06:00
Masayuki Ishikawa
e16c3ca25b arch: esp32: Fix compile error with xtensa-esp32-elf-gcc 8.2.0 2020-03-04 03:51:13 -06:00
Xiang Xiao
cde88cabcc Run codespell -w with the latest dictonary again 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-02-23 22:27:46 +01:00
Xiang Xiao
bd4e8e19d3 Run codespell -w against all files 
and fix the wrong correction
 2020-02-22 14:45:07 -06:00
Xiang Xiao
6d69439f58 Call xxx_timer_initialize from clock subsystem 
Call xxx_timer_initialize from clock subsystem to make timer ready for use as soon as possiblei and revert the workaround:

commit 0863e771a9
Author: Gregory Nutt <gnutt@nuttx.org>
Date:   Fri Apr 26 07:24:57 2019 -0600

    Revert "sched/clock/clock_initialize.c:  clock_inittime() needs to be done with CONFIG_SCHED_TICKLESS and clock_initialize should skip clock_inittime() for external RTC case since the RTC isn't ready yet."

    This reverts commit 2bc709d4b9.

    Commit 2bc709d4b9 was intended to handle the case where up_timer_gettime may not start from zero case.  However, this change has the side-effect of breaking every implementation of tickless mode:  After this change the tickless timer structures are used before they are initialized in clock_inittime().  Initialization happens later when up_initialize is called() when arm_timer_initialize().

    Since the tickless mode timer is very special, one solution might be to

    1. Rename xxx_timer_initialize to up_timer_initialize
    2  Move up_timer_initialize to include/nuttx/arch.h
    3.  Call it from clock subsystem instead up_initialize

    Basically, this change make timer initialization almost same as rtc initialization(up_rtc_initialize).

    For now, however, we just need to revert the change.
 2020-02-08 07:40:06 -06:00
Xiang Xiao
76bbed07a4 Call up_irqinitialize from irq subsystem 
Call up_irqinitialize from irq subsystem to make the irq ready for use as soon as possible
 2020-02-08 07:39:22 -06:00
Xiang Xiao
5c80b94820 Replace #include <semaphore.h> to #include <nuttx/semaphore.h> 
Since the kernel side should call nxsem_xxx instead and remove the unused inclusion
 2020-02-01 08:27:30 -06:00
Xiang Xiao
80277d1630
Refine the preprocessor conditional guard style (#190) 2020-01-31 19:07:39 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189) 
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
 2020-01-31 09:24:49 -06:00
Xiang Xiao
6a3c2aded6 Fix wait loop and void cast (#24) 
* Simplify EINTR/ECANCEL error handling

1. Add semaphore uninterruptible wait function
2 .Replace semaphore wait loop with a single uninterruptible wait
3. Replace all sem_xxx to nxsem_xxx

* Unify the void cast usage

1. Remove void cast for function because many place ignore the returned value witout cast
2. Replace void cast for variable with UNUSED macro
 2020-01-02 10:54:43 -06:00
Ouss4
7dcf8dde7c arch/xtensa/src/esp32/esp32_start.c: A comma was missing in g_idlestack attributes. 2019-12-10 13:42:58 -06:00
Gregory Nutt
d5bbbba8ad Rename all remaining arch/xxx/src/xxx/chip to arch/xxx/src/xxx/hardware. 2019-05-25 09:27:28 -06:00
Gregory Nutt
b290160b3b Rename sched_process_timer to nxsched_process_timer. That is the appropriate name for an internal sched/ function (still many named incorrectly). 2019-03-20 19:27:40 -06:00
Gregory Nutt
3c0f6f4876 arch/xtensa/src/esp32/esp32_serial.c: Fix some backward arguments. Correct 2-stop bit setting. 
sched/sched/sched_waitid.c:  Could exit without leaving critical section on some error conditions.
sched/signal/sig_deliver.c: Update some comments.
 2019-02-28 11:32:31 -06:00
Gregory Nutt
dc8c814ca3 Squashed commit of the following: 
Fixed coding standard error in several files.  Use of while( is incorrect; a space is required between while and (.  Also ran tools/nxstyle and fix thoses complaints as well in most files.

    Changes to comply with coding standard.  Mostly focused on files with missing space after keyword in if(, switch(, and for(.  Offending files also got changes to comply with tools nxstyle.  If there were logs of nxstyle complaints, the file also got a taste of tools/indent.sh.  Still need to fix occurrences of while( with missing space.  There are a lot of them.
 2019-02-27 08:41:08 -06:00
Gregory Nutt
95746be5a2 arch/xtensa/src/esp32/esp32_timerisr.c: Fix backward comparison. 2019-02-17 18:02:26 -06:00
Gregory Nutt
a2e62f557d Squashed commit of the following: 
sched/init/nx_bringup.c:  Fix a naming collision.
    sched/init:  Rename os_start() to nx_start()
    sched/init:  Rename os_smp* to nx_smp*
    sched/init:  Rename os_bringup to nx_bringup
    sched/init:  rename all internal static functions to begin with nx_ vs os_
 2019-02-04 16:20:35 -06:00
Gregory Nutt
4b9abfa3c2 Every file that uses serial IOCTLs (TIOC*) must explicity include nuttx/fs/ioctl.h. This was included previously via sneak path in the now deleted arch/serial.h. 2019-01-27 13:41:44 -06:00
Xiang Xiao
818d8dda1e Remove empty seria.h and all references 2019-01-26 15:08:14 -06:00
Gregory Nutt
2683f713ab Make sure that labeling is used consistently in all function headers (part 3). 2018-02-01 12:17:03 -06:00
Gregory Nutt
7cf88d7dbd Make sure that labeling is used consistently in all function headers. 2018-02-01 10:00:02 -06:00
Sungki Kim
d9c1f37ed5 modify default uart pin for ESP-WROOM-32 2017-08-13 22:42:42 +09:00
Sungki Kim
dbe4978c6a fix gpio enable reg 2017-08-13 22:42:10 +09:00
Gregory Nutt
1c5ec07414 arch/: Remove dangling space at the end of lines. 2017-06-28 13:16:48 -06:00
Gregory Nutt
0de294a586 Fix lots of occurrences of 'the the', 'the there', 'the these', 'the then', 'the they. 2017-05-11 13:35:56 -06:00
Gregory Nutt
370e188fa3 Convert more drivers to use new interrupt argument structure. 2017-02-28 09:05:01 -06:00
Mark Schulte
b3222bbc8a irq_dispatch: Add argument pointer to irq_dispatch 
Provide a user defined callback context for irq's, such that when
registering a callback users can provide a pointer that will get
passed back when the isr is called.
 2017-02-27 06:27:56 -06:00
Gregory Nutt
c9b15ebb6a Xtensa ESP32: Remove call to sched_lock()/unock() from inter-cpu interrupt logic. Results in recursive call to sched_mergepending(). 2016-12-25 09:26:20 -06:00
Gregory Nutt
1b790a61cd Xtensa ESP32: Add stack checking logic. 2016-12-23 15:51:33 -06:00
Gregory Nutt
714e6f80ca Xtensa ESP32: Corrects a problem with dispatching to signal handlers: Cannot vector directly to the signal handling function as in other ABIs under the Xtensa Window ABI. In that case, we need to go through a tiny hook when performs the correct window call (call4) otherwise registers will be scrambled in the signal handler 2016-12-22 11:19:38 -06:00
Gregory Nutt
d9a64b9ca9 Xtensa ESP32: Some fixes from integration of ostest configuration. Almost works: There are some assertions in xtensa_sigdeliver() 2016-12-22 09:34:39 -06:00
Gregory Nutt
1b7162a0db Eliminate a warning 2016-12-21 08:04:48 -06:00
Gregory Nutt
81697f2285 Xtensa ESP32: Fix APP CPU startup... Can't use semaphores on the IDLE thread. 2016-12-20 11:26:37 -06:00
Gregory Nutt
6d5a718b98 Xtensa ESP32: A few fixes for APP CPU start-up 2016-12-20 10:38:27 -06:00
Gregory Nutt
4e9a0ffea5 Xtensa ESP32: Update APP CPU startup logic to match current Expressif example code. 2016-12-20 09:00:04 -06:00
Gregory Nutt
3b681586c0 Xtensa ESP32: Missing prologue/epilogue macros on C callable function 2016-12-20 08:31:36 -06:00
Gregory Nutt
e5182acbe3 Xtensa ESP32: Make sure that SMP configuratin still builds without errors. 2016-12-19 14:12:19 -06:00
Gregory Nutt
097f09cb02 Xtensa ESP32: Corrects timer initialization and timer input frequency. 2016-12-19 11:50:28 -06:00
Gregory Nutt
2b0b698d72 ESP32 Serial: Add logic to prevent infinite loops in interrupt handler. 2016-12-18 16:04:25 -06:00
Gregory Nutt
71bb79a6c7 ESP32 Serial: Fix some register bit definitions. 2016-12-18 15:11:34 -06:00
Gregory Nutt
586f0aab50 Fix context save logic when called in window ABI configuration. Add an IDLE stack. Don't depend on the mystery stack received from the bootloader. 2016-12-18 10:08:08 -06:00
Gregory Nutt
8de1127899 Xtensa ESP32: Using wrong register to disable interrupts. 2016-12-17 11:00:12 -06:00
Gregory Nutt
6599feb310 Xtensa ESP32: Fixes a few issue with restoring registers on interrupt return, but there is still a problem 2016-12-16 17:56:22 -06:00
Gregory Nutt
cdd8dc72a5 Xtensa ESP32: Basically a redesign of the interrupt dispatch logic. 2016-12-16 15:36:52 -06:00
Gregory Nutt
d4ad5f04d3 Xtensa ESP32: Minor rearchitecting of how CPU interrupts are enabled. MOre to come. 2016-12-16 14:13:09 -06:00
Gregory Nutt
cd3d414ba2 Xtensa: Fix some missing SMP logic 2016-12-16 13:37:28 -06:00
Gregory Nutt
6337fadd8c Missing escape character on CR of CR-LF expansion. 2016-12-16 10:49:42 -06:00
Gregory Nutt
f1a5b91cd8 Use r6, not r2 when passing paramters with call4 2016-12-16 09:21:44 -06:00
Gregory Nutt
aa5a8b0ca2 Xtensa: Make sure that all C callable assembly functions includes ENTRY prologue and RET epilogue. 2016-12-15 14:02:19 -06:00
Gregory Nutt
10b9a10d2f Xtensa ESP32: Fix several build-related issues associated with vector section 2016-12-15 10:08:26 -06:00
Gregory Nutt
b5e979d58f ESP32: Fix a couple of bugs associated with handling of CPU interrupts. 2016-12-14 13:31:44 -06:00
Gregory Nutt
730ca4ce41 Fix missing semicolons in DEBUGASSERT statements 2016-12-14 09:06:09 -06:00
Angus Gratton
dd5e47a418 ESP32 core v2: Two changes (1) flushes the UART TX buffer in the esp32 serial shutdown routine. The ROM bootloader does not flush the FIFO before handing over to user code, so some of this output is not currently seen when the UART is reconfigured in early stages of startup. And changes the openocd config file's default flash voltage from 1.8V to 3.3V. This is not necessary right now, but may save some hard-to-debug moments down the track (3.3V-only flash running at 1.8V often half-works and does weird things...) 2016-12-14 08:15:03 -06:00
Gregory Nutt
a7b688e87b sched notes: Add additional note to see if/when CPU is started in SMP mode. 2016-12-07 09:08:20 -06:00
Gregory Nutt
e3fe320e08 SMP: Add support for linking spinlocks into a special, non-cached memory region. 2016-11-26 08:47:03 -06:00
Gregory Nutt
ac1bb127b6 Correct some C++ style comments. 2016-11-08 08:51:03 -06:00
Gregory Nutt
b0dffdc2ca Fix a number of header files with mismatched 'extern C {' and '}' 2016-11-05 07:25:05 -06:00
Gregory Nutt
5cfb83ec81 ESP32: File repeated in Make.defs 2016-11-03 17:47:09 -06:00
Gregory Nutt
0a5b4f684a arch: Disable priority inheritance on all semaphores used for signaling in the rest of the MCU drivers 2016-11-03 17:38:26 -06:00
Gregory Nutt
54d7656f18 Update some comments 2016-11-03 07:04:03 -06:00
Gregory Nutt
cfcc7edded Xtensa/ESP32: Add window spill logic; Add C++ support to linker script 2016-10-31 17:51:48 -06:00
Gregory Nutt
4d0b0e44f1 Xtensa/ESP32: Add up_cpu_idlestack() and fix some compile issues. 2016-10-31 14:56:48 -06:00
Gregory Nutt
28d1478480 Xtensa/ESP32: Add CPU1 startup logic 2016-10-31 13:15:15 -06:00
Gregory Nutt
a787a99071 ESP32: Add inter-cpu interrupts 2016-10-31 08:29:28 -06:00
Gregory Nutt
63d5ab5b67 Add logic to attach inter-CPU interrupts. Fix some compilation errors. 2016-10-30 16:15:04 -06:00
Gregory Nutt
85ed3dae9a Update some compilation issues 2016-10-30 15:38:51 -06:00
Gregory Nutt
a4c3fef0b7 Xtensa: Add more exception vectors. All just cause a PANIC now. 2016-10-30 12:20:11 -06:00
Gregory Nutt
261e0edc61 Xtensa: Adapt co-processor state save/restore functions so that they are call-able from C with Windows ABI. 2016-10-30 08:35:09 -06:00
Gregory Nutt
4997ec7a1e ESP32 Core V2: Add an SMP configuration to support development (not yet usable). 2016-10-29 14:56:07 -06:00
Gregory Nutt
804f9c5de7 Xtensa: Rename some files. 2016-10-29 11:24:02 -06:00
Gregory Nutt
d346f25aae Xtensa/ESP32: Fix some compile issues related to new co-processor logic 2016-10-29 10:27:46 -06:00
Gregory Nutt
2fa8b9ba34 Xtensa ESP32: Co-processor state is code complete but uncompiled and untested. 2016-10-28 13:03:25 -06:00
Gregory Nutt
a90d0bbf2e ESP32: A little more co-processor logic. Still not complete. 2016-10-28 11:19:23 -06:00
Gregory Nutt
1e7f78e5c0 ESP32: Add implementation of up_putc 2016-10-27 18:27:19 -06:00
Gregory Nutt
4b16a64212 sched/Kconfig: Add ranges to START_YEAR, MONTH, and DATE 2016-10-27 18:13:31 -06:00
Gregory Nutt
e6377641a8 sched/Kconfig: Add ranges to START_YEAR, MONTH, and DAY 2016-10-27 18:04:14 -06:00
Gregory Nutt
afcda29646 ESP32: Fix some warnings 2016-10-27 16:46:34 -06:00
Gregory Nutt
6ed5d4b20c ESP32: Fix some compilation errors 2016-10-27 16:36:22 -06:00
Gregory Nutt
c52ee46f5f ESP32: More logic added to serial driver. 2016-10-27 16:02:04 -06:00
Gregory Nutt
6f7c03bd71 ESP32: Add initial serial driver. Taken from SAMV7; not fully converted. Does not yet compile. 2016-10-27 13:55:58 -06:00
Gregory Nutt
bc51fdb96c ESP32: Add GPIO signal mapping file 2016-10-27 11:04:24 -06:00
Gregory Nutt
cf73c9e1d1 EPS32: Add GPIO ROM interface definitions 2016-10-27 10:43:58 -06:00
Gregory Nutt
0967864c92 Correct clock initialization. The correct range for the month is 0-11 but is entered as 1-12 in the .config file 2016-10-27 08:32:23 -06:00
Gregory Nutt
76788040d5 ESP32: Add esp32_config.h 2016-10-26 15:45:03 -06:00
Gregory Nutt
ca7ca0eb57 ESP32: More compilation issues 2016-10-26 12:59:31 -06:00
Gregory Nutt
0a96f3a8c8 ESP32: Fix some compilation issues 2016-10-26 12:50:10 -06:00
Gregory Nutt
650757bbf0 ESP32: Add GPIO support 2016-10-26 12:11:24 -06:00
Gregory Nutt
946045075e ESP32: Remove some long lines in header file 2016-10-26 08:23:09 -06:00
Gregory Nutt
2c09279343 ESP32: Add beginning of GPIO register definition file 2016-10-26 06:27:02 -06:00
Gregory Nutt
b8462d3e04 ESP32: Need to take priority into account when allocating CPU interrupts 2016-10-25 16:27:58 -06:00
Gregory Nutt
fef7b414c5 Add logic to attach peripheral interrupt sources to CPU interrupts 2016-10-25 15:19:29 -06:00
Gregory Nutt
6756b44dc3 ESP32: Add framework to assign a a peripheral to a CPU interrupt 2016-10-25 13:16:05 -06:00
Gregory Nutt
d5fceadacd Xtensa: Fix some compilation issues 2016-10-25 12:34:23 -06:00
Gregory Nutt
2a59205ffa ESP32: Add CPU interrupt managmement logic; improve level interrupt decoding. 2016-10-25 12:02:53 -06:00
Gregory Nutt
c457e26f2a ESP32: Add UART register definition file 2016-10-25 08:35:07 -06:00
Gregory Nutt
1dabbd8489 Costmetic changes 2016-10-24 16:18:30 -06:00
Gregory Nutt
3d4ce55ebd Oops.. a couple of hunks failed in the last patch. Hope I got them fixed correctly. 2016-10-24 15:25:40 -06:00
Gregory Nutt
7b7e352d6e ESP32: Add some peripheral configuration 2016-10-24 14:09:47 -06:00
Gregory Nutt
818b0171d7 ESP32: Clock configuration is not yet implemented. ESP32 will be running a XTAL frequency. 2016-10-24 07:30:11 -06:00
Gregory Nutt
4cf60022ca Xtensa: Correct some compile issues 2016-10-23 16:25:55 -06:00
Gregory Nutt
2514ddec8b Xtensa: Add NMI handler 2016-10-23 16:24:09 -06:00
Gregory Nutt
9a9488ae92 ESP32: Fix heap initialization 2016-10-23 14:20:03 -06:00
Gregory Nutt
1fcced12eb Xtensa: Timer code now compiles okay 2016-10-23 11:31:48 -06:00
Gregory Nutt
c3d76d56bc Xtensa: Fix some compilation issues 2016-10-23 10:06:30 -06:00
Gregory Nutt
9b5fedc81e Xtensa: Add implementation of system timer; Correct CFLAGS 2016-10-23 10:08:38 -06:00
Gregory Nutt
09b462e419 Xtensa: Add region protected; Implement some missing signal handling logic. 2016-10-23 09:02:50 -06:00
Gregory Nutt
112b62a14e Xtensa: Correct variou compilation issues 2016-10-23 08:04:57 -06:00
Gregory Nutt
a9a4f6384d Xtensa: Add interrupt enable/disable controls. Add dummy timer and IRQ initialization. 2016-10-23 08:00:17 -06:00
Gregory Nutt
2c83d79465 Xtensa: Remove 'virtual' interrupt support 2016-10-23 06:24:35 -06:00
Gregory Nutt
53de345f05 Xtensa: Add up_cpu_index() 2016-10-22 09:29:15 -06:00
Gregory Nutt
f07601a067 Xtensa: First cat at context switching functions 2016-10-21 10:43:59 -06:00
Gregory Nutt
363fe19ff6 Xtensa: Fix some compile issues 2016-10-20 16:42:37 -06:00
Gregory Nutt
7a89808deb ESP32: Add interrupt decode logic 2016-10-20 16:22:37 -06:00
Gregory Nutt
520513f456 Xtensa: Add interrupt decode framework 2016-10-20 14:34:51 -06:00
Gregory Nutt
11af1fc24c Xtensa: Separate context save/restore from coprocessor functions. Making to changes to interrupt handling to support NuttX. 2016-10-20 08:51:15 -06:00
Gregory Nutt
d1562a18e6 Add vectors for interrupt levels 2-6 2016-10-19 13:58:51 -06:00
Gregory Nutt
291c49afc3 Xtensa/ESP32: Move some ESP32-specific macros from xtensa_macros.h to chip_macros.h 2016-10-19 11:28:42 -06:00
Gregory Nutt
29c3acdc4e Add xtensa_testset.c 2016-10-19 09:58:12 -06:00
Gregory Nutt
8c606c4878 ESP32: Add more missing infrastructure 2016-10-18 13:18:59 -06:00
Gregory Nutt
503a2472e7 Xtensa: Add assertion logic 2016-10-18 12:42:57 -06:00
Gregory Nutt
ac97a81fb0 ESP32 core: Add linker script 2016-10-18 09:43:56 -06:00
Gregory Nutt
c5d14f9496 Xtensa: A few changes to get esp32_start.c to compile 2016-10-17 10:45:21 -06:00
Gregory Nutt
51fc3de40b Xtensa: Add CPU1 start logic 2016-10-17 09:13:12 -06:00
Gregory Nutt
c1334048c5 Xtensa: Add initial CPU0 start-up logic 2016-10-17 08:15:36 -06:00
Gregory Nutt
e7d791dd95 XTensa: Add an initial implementation of up_initialstate. Need to think through co-processor support. 2016-10-16 10:36:03 -06:00
Gregory Nutt
8c3c78f24a Xtensa: Fix register usage in up_strackframe 2016-10-16 09:26:33 -06:00
Gregory Nutt
8ffbf6d95e XTENSA: Hook xtensa_irq.S into build 2016-10-15 11:46:21 -06:00
Gregory Nutt
852330876b arch/xtensa: A little more ESP32 configuration logic 2016-10-12 14:50:28 -06:00