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Author SHA1 Message Date
Abdelatif Guettouche
9b4e44842e libc/pthread_barrierattr_destory.c: Destroy shouldn't reinitialize the 
attributes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-07-29 14:44:07 -03:00
Alexander Lunev
98e7776714 pic32mz: added support for PIC32MZ2048EFG MCU 2021-07-29 07:46:26 -07:00
Xiang Xiao
545a93301b fs: Don't define UTIME_OMIT if __cplusplus is defined 
to avoid libcxx misdetect NuttX support utimensat(_LIBCPP_USE_UTIMENSAT).
This patch need be reverted after utimensat is supported in NuttX.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-07-29 06:33:49 -03:00
Xiang Xiao
307cc61893 fs: Add fchstat and chstat callback into mountpt_operations 
and implement all status related change function. the individual
file system change will provide in other upcoming patchset.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8fde9db8eba9586e9c8da078b67e020c26623cf4
 2021-07-29 06:33:49 -03:00
raiden00pl
68a345e248 nucleo-g431rb: add CORDIC example 2021-07-28 20:02:40 -03:00
raiden00pl
f9937b28cc stm32g4: add CORDIC driver 2021-07-28 14:23:13 -03:00
raiden00pl
919008c51e add upper-half CORDIC driver 2021-07-28 14:23:13 -03:00
raiden00pl
6128b298ee stm32g4: add CORDIC definitions 2021-07-28 14:23:13 -03:00
Alexander Lunev
ff2dd12c3c bcm43xxx: fixed issues with unaligned buffers for DMA transfers. 
This fixes the following errors:
- "stm32_dmacapable: stm32_dmacapable: burst crosses 1KiB
up_assert: Assertion failed at file:chip/stm32_sdio.c line: 2890 task: init"

- "stm32_dmacapable: stm32_dmacapable: burst crosses 1KiB
up_assert: Assertion failed at file:chip/stm32_sdio.c line: 2808 task: bcmf"

bcm43xxx: replaced all occurrences of "__attribute__((packed))" by
compiler independent "begin_packed_struct / end_packed_struct".
 2021-07-28 13:47:04 -03:00
anjianjun
2866c27c19 drivers/mmcsd:Send cmd0 just once for Increased compatibility 
Signed-off-by: anjianjun <anjianjun@xiaomi.com>
 2021-07-28 08:34:09 -03:00
Jiuzhu Dong
23d87ff9df usrwqueue: implement order work queue 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-27 21:01:38 -07:00
Jiuzhu Dong
00854f0f94 userspace/wqueue: move exclusive access lock to mqueue inside 
Change-Id: I885d5641bc81fedf698c241d4719cb3561700f17
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-27 21:01:38 -07:00
Jiuzhu Dong
855c78bb9d work_queue: schedule the work queue using the timer mechanism 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-27 21:01:38 -07:00
Jiuzhu Dong
a0c3a0923a sched/wqueue: merge kwork_lpthread.c and kwork_hpthread.c to kwork_thread.c 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-27 21:01:38 -07:00
jsun
bb63afde1e Documentation/bl602: Update some imformation; Add partition.toml in tool/bl602 2021-07-27 21:01:15 -07:00
Sara Souza
cdbfacc1fe risc-v/esp32-c3: Adds systimer support and make rt_timer rely on it 2021-07-27 20:43:34 -07:00
anjianjun
3c393d6dfc drivers/mmcsd:fix build error of debug 
Signed-off-by: anjianjun <anjianjun@xiaomi.com>
 2021-07-27 20:12:27 -07:00
Sara Souza
857414e95d xtensa/esp32: expose SPI2 as a char driver 2021-07-27 09:55:49 -07:00
Michal Lenc
9fc806984c adc: add ioctl command to get the number of configured channels 
Number of configured ADC channels is currently only defined in board
level section, typically in xxx_adc.c file. This commit introduces
ioctl command ANIOC_GET_NCHANNELS that returns the number of configured
channels which is determined by the driver code. The change can allow the
applications to be more flexible when it comes to multiple ADC devices
with different number of configured channels.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-07-26 19:45:47 -07:00
Sara Souza
400d927011 xtensa/esp32s2: Disable wdt and wrap it. 2021-07-26 19:44:30 -07:00
Sara Souza
0794991a07 risc-v/esp32-c3: Disable wdt in the start function. 2021-07-26 19:44:30 -07:00
Sara Souza
5baeb7430b xtensa/esp32: Wrap wdt deinitialization in a function 2021-07-26 19:44:30 -07:00
Jiuzhu Dong
7e393762a7 sim/rptun: optimize multi-core startup and don't need to wait each other. 
Change-Id: I6172823c84a96e4082fa5f33bdb05d7bd1d3b056
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-26 19:38:07 -07:00
Xiang Xiao
068353bba7 drivers/rptun: Start/stop remote processor in the background thread 
to avoid blocking the main thread initialization process

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ib8ab2a661ee9540bb03d9d4d851a8d8ee212404e
 2021-07-26 19:38:07 -07:00
Gustavo Henrique Nihei
2d676f5e46 xtensa/esp32: Enable configuration of GPIO pad's drive strength 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-07-26 19:37:06 -07:00
Jiuzhu Dong
e98220c81a sim/cmdline: save boot cmdline to g_argc g_argv 
Change-Id: I989850a09528e3868957284c9f419d0992ae8d1f
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-26 19:35:58 -07:00
Xiang Xiao
5e01fe050a arch/sim: Copy include/nuttx/config.h to the local folder 
so the source code compiled by host environment can include config.h
directly and then avoid pass Kconfig option through Makefile manually

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic9fe6f846082cef2d0808dc717df8ae6ed929edf
 2021-07-27 07:44:33 +09:00
Xiang Xiao
3488a98bd7 sim: Correct the typedef in nuttx/hostfs.h 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I5fbfd519417c5686325822549c068b1d42f83946
 2021-07-27 07:44:33 +09:00
Abdelatif Guettouche
58a5e0744b Documentation/esp32: Remove the rest of the OpenOCD text. 
This information there is outdated and some of its content should be in
the board documentation and not the chip.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-07-26 18:17:53 -03:00
Abdelatif Guettouche
18dd3973f0 Documentation/esp32: Combine some duplicate information was provided in two 
separate sections.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-07-26 18:17:53 -03:00
Abdelatif Guettouche
96d093a545 Documentation/esp32: The linker scripts now is generated to decided 
wether to run from IRAM or Flash based on Kconfig options.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-07-26 18:17:53 -03:00
Abdelatif Guettouche
28b1e35a33 Documentation/esp32: WDT reboot from the 2nd stage bootloader is now 
handled by NuttX startup code, so remove any mentions to that.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-07-26 18:17:53 -03:00
Abdelatif Guettouche
d4483ac808 Documentation/esp32: Use the latest tag when building the toolchain. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-07-26 18:17:53 -03:00
Jiuzhu Dong
5029712283 renesas/rx65n: add long type for all PRI*PTR 
Error: wqueue/kwork_thread.c:202:3: error: format '%x' expects argument of type 'unsigned int',
 but argument 4 has type 'long unsigned int' [-Werror=format=]
    snprintf(args, 16, "0x%" PRIxPTR, (uintptr_t)wqueue);

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-26 08:44:05 -07:00
Masayuki Ishikawa
b63fe511bb drivers: wireless: Fix to set the address family for recvfrom() in gs2200m.c 
Summary:
- I noticed that the ntpclient does not work with gs2200m
- Finally, I found that the address family for recvfrom() is not
  set correctly
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with ntpclient

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2021-07-26 07:32:42 -07:00
Michal Lenc
7354ab187e pwm: add option to break the loops when using multiple PWM channels 
PWM drivers currently use channel number 0 for the channels that are not
used by the application. This commit adds number -1 which indicates that
all following channels are not configured and that the loop can be broken.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-07-26 10:34:16 -03:00
Jiuzhu Dong
7837a21e4e sensor: directly return -ENOTSUP without the set_interval or batch 
implementation for lowerhalf driver.

Change-Id: I7b02e0331e5f8b89b39896049a9e24ce30116f8a
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-25 23:29:55 -07:00
Jiuzhu Dong
19cea67f3e syslog: reslove crash because vmov.i32 instruction is not ready when system boot 
So avoid to use vmov.i32 instruction before FPU is ready.

Before modification:
3c03b35c <nx_vsyslog>:
3c03b35c:	f2c00010 	vmov.i32	d16, #0	; 0x00000000
3c03b360:	f2c02050 	vmov.i32	q9, #0	; 0x00000000
3c03b364:	e92d40f0 	push	{r4, r5, r6, r7, lr}
3c03b368:	e24dd08c 	sub	sp, sp, #140	; 0x8c
3c03b36c:	e28d301c 	add	r3, sp, #28
3c03b370:	e2505000 	subs	r5, r0, #0
3c03b374:	edcd0b0f 	vstr	d16, [sp, #60]	; 0x3c
3c03b378:	edcd0b01 	vstr	d16, [sp, #4]

After modification:
3c03b35c <nx_vsyslog>:
3c03b35c:       e92d40f0        push    {r4, r5, r6, r7, lr}
3c03b360:       e2505000        subs    r5, r0, #0
3c03b364:       e24dd08c        sub     sp, sp, #140    ; 0x8c
3c03b368:       e1a06001        mov     r6, r1
3c03b36c:       e1a07002        mov     r7, r2
3c03b370:       e28d000c        add     r0, sp, #12
3c03b374:       1a00003a        bne     3c03b464 <nx_vsyslog+0x108>

Change-Id: I643c19f5416c94a529764fdaa81f3088fcf95355
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-25 23:02:04 -07:00
Jiuzhu Dong
11faf0cb20 fs/inode: add sanity check for inode to avoid nullpointer 
Change-Id: Ib2c74ba308b8f15756fac4e69632c296243eb4ab
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-07-25 23:01:37 -07:00
Nathan Hartman
b92aeb8209 Fix various typos 
arch/arm/src/eoss3/eoss3_serial.c:
arch/arm/src/imxrt/hardware/imxrt_flexcan.h:
arch/arm/src/imxrt/imxrt_flexcan.c:
arch/arm/src/imxrt/imxrt_flexpwm.c:
arch/arm/src/imxrt/imxrt_lpi2c.c:
arch/arm/src/kinetis/kinetis_flexcan.c:
arch/arm/src/nrf52/hardware/nrf52_rtc.h:
arch/arm/src/nrf52/nrf52_clockconfig.c:
arch/arm/src/nrf52/nrf52_radio.c:
arch/arm/src/nrf52/nrf52_tim.c:
arch/arm/src/rtl8720c/amebaz_depend.c:
arch/arm/src/s32k1xx/Kconfig:
arch/arm/src/s32k1xx/s32k1xx_flexcan.c:
arch/arm/src/s32k1xx/s32k1xx_lpi2c.c:
arch/arm/src/sama5/hardware/sam_sdmmc.h:
arch/arm/src/sama5/sam_gmac.c:
arch/arm/src/samd5e5/sam_wdt.c:
arch/avr/src/avr32/up_exceptions.S:
arch/avr/src/avr32/up_fullcontextrestore.S:
arch/renesas/src/rx65n/rx65n_dtc.c:
arch/renesas/src/rx65n/rx65n_usbhost.c:
arch/risc-v/src/esp32c3/esp32c3_tickless.c:
boards/arm/stm32h7/stm32h747i-disco/include/board.h:
include/nuttx/lcd/ili9225.h:
libs/libc/stdio/lib_fgetpos.c:
libs/libc/stdio/lib_fseek.c:
libs/libc/stdio/lib_fsetpos.c:

    * Fix typos.
 2021-07-25 18:36:53 -07:00
hartmannathan
c475a71d1c Update arch/arm/src/stm32/Kconfig 
Co-authored-by: Gustavo Henrique Nihei <38959758+gustavonihei@users.noreply.github.com>
 2021-07-25 14:16:22 -03:00
hartmannathan
bb5f302361 Update arch/arm/src/stm32l5/stm32l5_serial.c 
Co-authored-by: saramonteiro <saramonteirosouza44@gmail.com>
 2021-07-25 14:16:22 -03:00
Nathan Hartman
f617c27a8c arch: arm: stm32, stm32f0l0g0, stm32h7, stm32l4, stm32l5: Fix typos. 
arch/arm/src/stm32/stm32_foc.c,
arch/arm/src/stm32f0l0g0/hardware/stm32_adc.h,
arch/arm/src/stm32h7/stm32_allocateheap.c,
arch/arm/src/stm32h7/stm32_fmc.c,
arch/arm/src/stm32h7/stm32_pmstandby.c,
arch/arm/src/stm32h7/stm32_spi.h,
arch/arm/src/stm32h7/stm32_spi_slave.c,
arch/arm/src/stm32h7/stm32_wwdg.c,
arch/arm/src/stm32l4/stm32l4_adc.h,
arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h,
arch/arm/src/stm32l5/stm32l5_gpio.c,
arch/arm/src/stm32l5/stm32l5_gpio.h,
arch/arm/src/stm32l5/stm32l5_irq.c,
arch/arm/src/stm32l5/stm32l5_rcc.c,
arch/arm/src/stm32l5/stm32l5_rcc.h,
arch/arm/src/stm32l5/stm32l5_serial.c, and
arch/arm/src/stm32l5/stm32l5_spi.c:

    * Fix typos in comments. No functional changes.
 2021-07-25 14:16:22 -03:00
Nathan Hartman
3346ba304b arch: arm: stm32, stm32h7, stm32l5: Fix typos in KConfig help texts 
arch/arm/src/stm32/Kconfig:
* In configs STM32_ADC_MAX_SAMPLES, STM32_FOC_HAS_PWM_COMPLEMENTARY:
  Fix typos in help text.

arch/arm/src/stm32h7/Kconfig:
* In configs STM32H7_RTC_AUTO_LSECLOCK_START_DRV_CAPABILITY,
  STM32H7_FLASH_CR_PSIZE, STM32H7_RTC_LSECLOCK_START_DRV_CAPABILITY,
  and STM32H7_RTC_LSECLOCK_RUN_DRV_CAPABILITY: Fix typos in help text.

arch/arm/src/stm32l5/Kconfig:
* In configs STM32L5_FLOWCONTROL_BROKEN, STM32L5_SDMMC1_DMAPRIO: Fix
  typos in help text.
 2021-07-25 14:16:22 -03:00
Alan C. Assis
5500dcdf64 Fix typo on HT16K33 name 2021-07-25 09:00:39 -07:00
Alan C. Assis
5b465345c7 Fix typo on esp32-devkitc 2021-07-25 09:00:39 -07:00
Alan C. Assis
6bc07944d5 Add nsh console through telnet over Wi-Fi 2021-07-25 02:45:19 -07:00
Abdelatif Guettouche
de68507f84 sched/*/*spinlock.c: Fix some typos. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-07-24 09:00:41 -07:00
Nathan Hartman
d178ff8a02 arch: arm: stm: Fix STM32_EXTI2_OFFSET 
arch/arm/src/stm32/hardware/stm32_exti.h:
* Change STM32_EXTI2_OFFSET (offset to EXTI2 registers) from 0x18
  to 0x20. This symbol is defined when CONFIG_STM32_STM32F30XX or
  CONFIG_STM32_STM32F33XX. According to the current reference
  manuals for STM32F334xx (RM0364 rev 4) and STM32F302xx (RM0365
  rev 8), EXTI_IMR1 is at offset 0x00 and EXTI_IMR2 is at offset
  0x20, i.e., 0x20 apart. The same offset applies to the rest of
  the registers: EMR1/EMR2, RTSR1/RTSR2, etc.
 2021-07-24 16:53:14 +02:00
Michal Lenc
4985f47155 arch/arm/src/stm32/stm32_qencoder.c: print uint32_t by using standard format PRIx32 
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-07-24 04:22:11 -07:00