Commit Graph

6505 Commits

Author SHA1 Message Date
Gregory Nutt
da7a3d9c9a SAMA5: Add ADC-side of the logic to hook in timer/counter logic needed to drive periodic ADC sampling 2013-10-24 13:56:23 -06:00
Gregory Nutt
aab5b6b2d9 SAMA5: Hook in timer/counter logic so that it can driver periodic ADC sampling 2013-10-24 12:35:42 -06:00
Gregory Nutt
21c59c0aa7 Added support for the Olimex STM32 P207 board. From Martin Lederhilger 2013-10-24 08:48:04 -06:00
Gregory Nutt
ec84f19454 STM32 PWM and ADC: Add some bits that should have been cleared. From Martin Lederhilger 2013-10-24 08:27:09 -06:00
Gregory Nutt
f10069907a Add support for the STM32F207ZE chip. From Martin Lederhilger 2013-10-24 08:25:05 -06:00
Gregory Nutt
d6dee94aa2 apps/examples/can: Fix an error in a debug statement. From Martin Lederhilger 2013-10-24 08:14:33 -06:00
Gregory Nutt
ba5e6669d0 CC3000 driver update from David Sidrane 2013-10-24 08:03:32 -06:00
Gregory Nutt
da5333663f Spark configuration update from David Sidrane 2013-10-24 08:03:07 -06:00
Gregory Nutt
e5b093cd3a Remove carriage returns from SAMA5 TC files just commited 2013-10-23 15:39:00 -06:00
Gregory Nutt
f6f2d2b961 SAMA5 Timer/counter library 2013-10-23 14:53:37 -06:00
Gregory Nutt
fe0f5ce44b STM32 F1 DAM fix from David Sidrane 2013-10-23 14:05:26 -06:00
Gregory Nutt
d2ab68c76e More apps/examples/cc3000 changes from David Sidrane 2013-10-23 11:49:59 -06:00
Gregory Nutt
76764003a5 Add logic to enable DEBUG_NET if NET=n but WL_CC3000=y 2013-10-23 11:48:57 -06:00
Gregory Nutt
69e49938f0 SAMA5 CAN: Update readme on how to configure CAN 2013-10-23 11:32:12 -06:00
Gregory Nutt
9d09dee7ba Part of last changes; file was left in editor 2013-10-23 09:14:31 -06:00
Gregory Nutt
e019782db5 Update Changelog 2013-10-23 09:13:28 -06:00
Gregory Nutt
5053d803e7 CC3000 driver updates from David Sidrane 2013-10-23 09:12:09 -06:00
Gregory Nutt
4cf9540563 CC3000 driver updates from David Sidrane 2013-10-23 09:07:32 -06:00
Gregory Nutt
212b5f504c Changes to the Spark configuration from David Sidrane 2013-10-23 08:37:16 -06:00
Gregory Nutt
e5c2496d6a SAMA5 CAN: Driver is now code complete but still untested 2013-10-22 15:47:52 -06:00
Gregory Nutt
f5674c21fa SAMA5: Beginning of a CAN driver 2013-10-21 15:52:23 -06:00
Gregory Nutt
781119c0e6 SAMA5 CAN: Add register definition file 2013-10-21 12:22:27 -06:00
Gregory Nutt
545cef3223 scanf() fixes from kfrolov: 1) sscanf() function hangs in the following example: sscanf(2, %u,%u,%u,%u, ...), 2) sscanf() returns incorrect number of parsed numbers if some arguments can't be parsed: sscanf(=2, %u,%u,%u,%u,...)==1 instead of 0, and 3) using of char* instead of const char* in vsscanf function leads to warnings from GCC. 2013-10-21 10:41:15 -06:00
Gregory Nutt
ba1ea91e37 SAMA5 TC: Add timer/counter register definition file 2013-10-20 14:47:02 -06:00
Gregory Nutt
06c87638ae SAMA5 demo configuration: TRNG and /dev/random are now enabled 2013-10-20 12:16:17 -06:00
Gregory Nutt
dbeee18171 SAMA5 TRNG: /dev/random appears to be functional 2013-10-20 12:08:39 -06:00
Gregory Nutt
0ebdbfbc88 SAMA5 TRNG: Add a /dev/random driver based on the SAMA5D3 TRNG peripheral 2013-10-20 11:38:31 -06:00
Gregory Nutt
891c463381 SAMA5 WDT driver is now functional 2013-10-20 09:24:30 -06:00
Gregory Nutt
5316b1755f SAMA5 norboot configuration updates 2013-10-20 08:46:52 -06:00
Gregory Nutt
b5a22632d7 SAMA5 norboot configuration updates 2013-10-20 08:44:07 -06:00
Gregory Nutt
cc4c4f4593 SAMA5 WDT: Miss watchdog fixes 2013-10-20 08:24:05 -06:00
Gregory Nutt
13ab1b586d Updated README 2013-10-19 12:37:14 -06:00
Gregory Nutt
6ee8857f9b SAMA5: Initial WDT timer (untested) 2013-10-19 12:26:47 -06:00
Gregory Nutt
8954161288 SAMA5: Hook RTC into build system; Finish RTC alarm logic; Verify correct behavior of the basic RTC functionality 2013-10-19 10:41:20 -06:00
Gregory Nutt
9e8bc003e5 Add instructions to enable RTC in the nsh/ configuration; RTC enabled by default in the demo configuration 2013-10-19 10:38:23 -06:00
Gregory Nutt
fc3889b154 Add CONFIG_DEBUG_RTC 2013-10-19 10:35:01 -06:00
Gregory Nutt
a1df31266c SAMA5: Add GPBR register definitions 2013-10-19 10:22:21 -06:00
Gregory Nutt
6fda497bc1 Updated Spark/cc3000 files from David Sidrane 2013-10-18 17:14:58 -06:00
Gregory Nutt
b05bf917b8 SAMA5 RTC: Beginning of an RTC driver for the SAMA5 2013-10-18 16:56:46 -06:00
Gregory Nutt
2137ef96c0 SAMA5: Add RTC and WDT register definition header files 2013-10-18 14:47:50 -06:00
Gregory Nutt
aa51df493a STM32 DMA Priority: Select the correct default for F1 and other family members 2013-10-18 14:13:53 -06:00
Gregory Nutt
d72a99bc64 SAMA5 LCD: Move framebuffers to center of free memory region. That creates a guard band around the framebuffers that gives a little protection from any bad writes into the framebuffer 2013-10-18 10:11:20 -06:00
Gregory Nutt
0e53acfb24 Make sure that CONFIG_SDIO_PEFLIGHT=y is set in all STM32 configurations that have SDIO DMA enabled 2013-10-18 08:57:59 -06:00
Gregory Nutt
f479f5d698 Enhanced the FAT32 filesystem code to understand DMA preflight failures, and to use the file sector buffer as a bounce buffer when a user-supplied buffer is not suitable for DMA. From Mike Smith 2013-10-18 08:38:44 -06:00
Gregory Nutt
6a524b5734 Enhanced the mmcdd_sdio driver to perform DMA preflight operations and fail DMA read/write requests that fail preflighting. From Mike Smith 2013-10-18 08:24:18 -06:00
Gregory Nutt
46bf97abfc Add SDIO preflight method 2013-10-18 08:15:09 -06:00
Gregory Nutt
944e0fe81d Changes to stm32_dmacapable interfaces from Mike Smith 2013-10-18 08:06:23 -06:00
Gregory Nutt
973d11f625 STM32 DMA priority corrections from Mike Smith 2013-10-18 07:37:24 -06:00
Gregory Nutt
2b70abad0d Typo fixes for UART7 and UART8 DMA configs. From Mike Smith 2013-10-18 07:17:55 -06:00
Gregory Nutt
1143b537c2 SAMA5 TSD: Fix to prohibit reading samples when not valid 2013-10-17 17:26:06 -06:00