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Author SHA1 Message Date
YAMAMOTO Takashi
ded4fd33c1 Implement preadv and pwritev 2022-04-28 13:40:25 +08:00
YAMAMOTO Takashi
d832df88a5 libc.csv: sort 2022-04-28 13:40:25 +08:00
anjiahao
2b938ed8f8 tools:minidumpserver.py support xtensa 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-04-28 13:29:25 +08:00
Xiang Xiao
2dbf826c19 config: It's enough to let LTO_FULL depend on ARCH_TOOLCHAIN_GNU only 
since ARCH_TOOLCHAIN_CLANG automatically select ARCH_TOOLCHAIN_GNU

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-28 11:25:00 +09:00
Xiang Xiao
7539d75bb4 config: DEBUG_LINK_MAP don't need depend on ARCH_TOOLCHAIN_GNU 
since all toolchain could generate the map file

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-28 11:25:00 +09:00
Takayoshi Koizumi
afc09fb442 drivers/audio/cxd56: Workaround for HW issue of CXD56 
Because of HW issue, Audio output volume is limited until -30db as maximum.
This commit fix it. And fix the bug of voulme control.
 2022-04-28 08:12:47 +09:00
Gustavo Henrique Nihei
ffab2dc628 risc-v: Restrict Fence instruction for chips that support S-mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-04-28 01:18:46 +08:00
Gustavo Henrique Nihei
1967805b91 risc-v: Fix format specifier in debug log 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-04-28 01:18:46 +08:00
田昕
670ea1e5fb net/tcp:make initial tcp port more random 
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
 2022-04-27 19:46:23 +03:00
chao.an
042640abbf arch/arm: add support for GCC LTO 
1. Enable GCC link-time optimizer
2. Enable use of a linker plugin during link-time optimization

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-27 23:42:54 +08:00
chao.an
cbef8681fe arch/risc-v: add support for GCC LTO 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-27 23:42:37 +08:00
Lingao Meng
daccde3605 drivers: mtd: fix null buffer reference 
When device not support byte read or readlen less than
device block size, will use `dev->buffer` as dst address.

`CFGDIOC_FIRSTCONFIG` and `CFGDIOC_NEXTCONFIG` should also
malloc buffer before call `mtdconfig_readbytes`.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
 2022-04-27 23:38:40 +08:00
wangbowen6
cbab540169 arm/arch_setjmp.S: armv6m support setjmp, longjmp 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-04-27 23:21:03 +08:00
Ville Juven
216574bba8 OpenSBI: Add riscv_hardfp.S to compilation 
It will just become an empty object if FPU support is not included.
 2022-04-27 23:20:51 +08:00
Ville Juven
d495007943 MPFS: Remove # CONFIG_ARCH_FPU is not set from defconfigs 
For some reason # CONFIG_ARCH_FPU is not set also unsets ARCH_FPU
for the .config file, meaning FPU support is not built.
 2022-04-27 23:20:51 +08:00
dytang
d7cc3f9275 RISC-V: workaround for the RV64 SoC which does not has mem mapped MTIMER currten value regs. 2022-04-27 22:48:54 +08:00
Abdelatif Guettouche
98d8d2a1ff arch/xtensa: Group all the macros in one file. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-27 08:57:53 -03:00
Abdelatif Guettouche
541eabb535 xtensa_int_handlers.S: Refactor the calls to ps_setup. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-27 08:57:53 -03:00
Jiuzhu Dong
54b770d46a driver/ioexpander: remove response about irq_handler 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-04-27 17:27:24 +08:00
chao.an
db54b0b836 arm/assert: fix build warning on clang 
common/arm_assert.c:80:14: warning: format specifies type 'unsigned int' but the argument has type 'uint32_t' (aka 'unsigned long') [-Wformat]
             stack, ptr[0], ptr[1], ptr[2], ptr[3],
             ^~~~~
include/debug.h:119:59: note: expanded from macro '_alert'
   __arch_syslog(LOG_EMERG, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
                                      ~~~~~~              ^~~~~~~~~~~

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-27 14:18:42 +08:00
Abdelatif Guettouche
587145a881 riscv/Makefile: Delete old target used for debugging. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-27 12:58:57 +08:00
anjiahao
3dc07ac6b4 sched:fix mq_timedsend describe 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-04-27 02:09:18 +08:00
Xiang Xiao
fc16cfaefe Correct the code alignment found in review 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-26 11:34:28 +03:00
anjiahao
09c6b02017 Documentation:fix error describe on message queue 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-04-26 16:09:37 +08:00
Abdelatif Guettouche
aaa5316235 arch/xtensa: Simply use xtensa_createstack for CPU1 idle task. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-26 01:36:54 +08:00
Ville Juven
6546789b7e RISC-V: Add syscall support for vfork 
If vfork is called via syscall (PROTECTED/KERNEL build) need to set up
return parameters for syscall. Otherwise the SW will get lost.
 2022-04-25 16:23:17 +03:00
Xiang Xiao
8f8ee25a9c boards: Move -g from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-25 16:23:03 +03:00
Xiang Xiao
e9f5eb0823 boards: Move "-fno-exceptions -fcheck-new" from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-25 16:22:46 +03:00
Ville Juven
a014daf44f RISC-V: Add implementation for vfork 2022-04-25 15:44:32 +08:00
Ville Juven
2580520828 RISC-V: Fix system crash when FPU is in use 
FPU registers need to be written prior to updating CSR_STATUS
 2022-04-25 15:44:06 +08:00
Xiang Xiao
25d819253b boards/risc-v: Remove "MAXOPTIMIZATION = -Os" from Make.defs 
since it is already defined in Toolchain.defs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-25 07:58:00 +03:00
Xiang Xiao
75326e563d boards: Move -fno-common from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-25 07:57:29 +03:00
Xiang Xiao
547c85b0ae boards: Switch the elf link script to binfmt/libelf/gnu-elf.ld 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-24 17:02:37 +02:00
Xiang Xiao
f4d5a23571 libc/fixedmatch: Avoid "divide by zero" error 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-23 20:15:31 +03:00
anjiahao
cbdd39b6c9 tools:fix parsememdump.py match error 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2022-04-23 23:59:36 +08:00
Petro Karashchenko
8f7af29d74 libs/libc/string: unify implementation across the functions 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-04-23 23:58:54 +08:00
wangbowen6
b9827f7ede compiler.h: optimization option is not supported before GCC 4.6 
-fno-tree-loop-distribute-patterns is not supported before
GCC 4.6

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-04-23 22:14:26 +08:00
Oki Minabe
185b1cb1b7 libc/string: strcmp/strncmp cast unsigned char 
Summary:
- Cast to unsigned char for strcmp and strncmp
- strcmp and strncmp are described following by opengroup.org

  The sign of a non-zero return value shall be determined by the sign
  of the difference between the values of the first pair of bytes
  (both interpreted as type unsigned char) that differ in the strings
  being compared.

  https://pubs.opengroup.org/onlinepubs/9699919799/functions/strcmp.html
  https://pubs.opengroup.org/onlinepubs/9699919799/functions/strncmp.html

Impact:
- strcmp and strncmp return value

Testing:
- ostest on sabre-6quad:smp w/ qemu

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
 2022-04-23 16:11:00 +03:00
Oki Minabe
54508a3798 boards/boardctl: correct boarctl return value 
Summary:
- Correct boardctl function's return value
- In case of BOARDIOC_TESTSET, `ret' has 0 or 1 or an error,
  but `ret' is ignored except error.

Impact:
- boardctl return value except errors

Testing:
- custom Cortex-A9 board

Signed-off-by: Oki Minabe <minabe.oki@gmail.com>
 2022-04-23 16:25:53 +08:00
Abdelatif Guettouche
3942f4d133 arch/xtensa: No need to save SP in EXCSAVE_1 when linking the interrupt 
frame with the previous frame.  The SP is already saved in A12.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-23 10:19:23 +08:00
Abdelatif Guettouche
f130d8c143 xtensa_user_handler.S: Fix backtrace. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-23 10:19:23 +08:00
Abdelatif Guettouche
7a3ad4b224 xtensa_user_handler.S: Use the ps_setup macro when dealing with an 
exception.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-23 10:19:23 +08:00
Petro Karashchenko
1b4d8b3734 sched: remove DEBUGASSERT from nx_waitpid 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-04-22 15:06:26 -03:00
Xiang Xiao
5a565e753c pm: Move pm_initialize call from driver_initialize to xxx_pminitialize 
since it's too late with the below commit:
ommit a594a5d7a8
Author: chao.an <anchao@xiaomi.com>
Date:   Mon Apr 11 19:44:26 2022 +0800

    sched/init: drivers_initialize() should be late than up_initialize()

    up_initialize
    |
     ->up_serialinit
       |
        ->uart_register  /* ("/dev/console", &CONSOLE_DEV); */

    drivers_initialize
    |
     ->syslog_console_init
       |
        ->register_driver /* ("/dev/console", &g_consoleops, 0666, NULL); */

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-22 14:36:27 +03:00
Ville Juven
cf90e3f66b syscall: Fix prototype of exec() to syscall.csv 2022-04-22 14:34:42 +03:00
Xiang Xiao
69b5799b74 libc: Fix typo error in execle 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-22 12:23:09 +03:00
Xiang Xiao
49eb2bd415 libc: Implement execvp, execlp and execvpe as macro 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-22 10:40:31 +03:00
Xiang Xiao
55b5561fdb sched/task: Implement execle and execve 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-22 10:40:31 +03:00
Masayuki Ishikawa
04f81ecddb arch: risc-v: Do not enable FPU for K210 with QEMU 
Summary:
- I noticed that maix-bit:smp does not work with QEMU.
- Actually, QEMU supports sifive_u (not K210) but it works
  if FPU is disabled.
- This commit fixes this issue.

Impact:
- K210 with QEMU only

Testing:
- Tested with qemu-5.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
 2022-04-22 14:52:04 +08:00
Huang Qi
06c7a3ca59 arch/risc-v/riscv_misaligned: Implement float load/store support 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-22 12:23:10 +08:00