Commit Graph

25 Commits

Author SHA1 Message Date
Matias N
a806ca9577 nrf52 SPI: rework support for undefined MOSI/MISO; add support for list DMA mode 2020-11-12 08:01:25 +01:00
Matias N
18be4198e1 Revert "nrf52_spi: support not defining MISO/MOSI pins"
This reverts commit e91a806ab6.
2020-11-12 08:01:25 +01:00
Matias N
f55a2879ca nrf52 GPIO/GPIOTE: better expose pin interrupt capability
This change improves upon current support for pin interrupts. Before,
a pin interrupt was handled (with nrf52_gpiote_setevent) using one
of the eight available GPIOTE channels. Moreover, it didn't event let
the user specify which channel to use (simply tried to get a free one).
Also, it was buggy since it did not consider unsetting the callback.

Besides GPIOTE channels, there is another way to deal with pin interrupts.
The GPIO peripheral is capable of generating a PORT event
(for the whole GPIO port) depending on the pin SENSE configuration
(HIGH or LOW, or NONE) and GPIO DETECTMODE register
(latching or non-latching).

This change then renames nrf52_gpiote_setevent into nrf52_gpiote_set_ch_event,
maintaining functionality of original function, but now allows specifying
channel (and correctly handles unsetting the callback). Then, a
new nrf52_gpiote_set_pin_event is added, which allows to set a callback
for a given pin. During initialization, interrupt for the PORT event is
enabled and handled in such way that for each pin whose corresponding
bit in LATCH register (indicates the result of pin SENSEing) the
callback for this pin will be invoked. This mechanism means that
every pin can get an ISR. It also avoids using GPIOTE channels for this
purpose which carry higher current consumption.

This new per-pin callback mechanism has some added memory requirement
so it can be disabled and its default is dependant on DEFAULT_SMALL.
When disabled, a callback for the PORT event can be set directly
with nrf52_gpiote_set_port_event

There was only one use of nrf52_gpio_setevent() which was migrated
into nrf52_gpio_set_ch_event() passing channel zero.
2020-11-09 20:23:29 +01:00
Matias N
2395258486 nrf52: add POWER register definitions; support enabling DC/DC regulator 2020-11-03 08:43:43 -08:00
Matias N
e91a806ab6 nrf52_spi: support not defining MISO/MOSI pins 2020-11-01 11:04:27 -08:00
Brennan Ashton
8602e46d4a nRF: Add missing Kconfig entry for SPI2_MASTER
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-09-16 07:26:29 +02:00
raiden00pl
e7f3028aa6 nrf52: add ADC support 2020-09-13 10:57:11 -03:00
raiden00pl
a2b00fd348 nrf52: add PWM support 2020-09-13 10:57:11 -03:00
Matias N
459ad29799 nrf52: extend systimer support; support WFI/WFE again
This commit exends systimer options for nRF52 arch. It is possible
to use ARM SysTick either for tickless or non-tickless mode. Also,
it is possible to use the RTC peripheral for tickless mode. This
also re-enables support for WFI/WFE sleep if RTC is used, since
this counter continues to run in this mode (in contrast to SysTick).
2020-09-10 12:10:20 +02:00
raiden00pl
3241ebf811 arch/nrf52: remove redundant chip definitions from Kconfig 2020-08-31 11:49:49 -03:00
raiden00pl
45f3aa4ca9 arch/nrf52: replace all chip-specific conditions with chip-features conditions in all hardware definitions. This gives us a more modular code. 2020-08-31 11:49:49 -03:00
Matias N
3176f2c3f0 nrf52_clockconfig: support HFCLK via XTAL and LFCLK 2020-08-31 08:01:37 +02:00
Matias N
c51e383e08 nrf52: add PPI peripheral support 2020-08-25 07:22:24 +02:00
raiden00pl
774ea6eae7 arch/arm/src/nrf52: add a low-level RTC interface 2020-07-18 20:00:52 +01:00
raiden00pl
7db61992f9 arch/arm/src/nrf52: add a low-level TIMER interface 2020-07-18 20:00:52 +01:00
raiden00pl
d66cb505a5 nrf52: add workaround to SPI Master 1 Byte transfer anomaly 2020-05-25 08:12:14 -06:00
raiden00pl
df1eeb8e3f arch/arm/src/nrf52: add initial interface to work with on-chip radio 2020-04-03 18:22:55 -06:00
raiden00pl
f51e478ad8 nrf52: add support for SPI
nrf52: add support for GPIO interrupts

nrf52: add macros to decode GPIO PIN and GPIO PORT

nrf52: various cosmetic changes

nrf52: fix GPIO P1 memory address

boards/nrf52840-dk: add support for SPI

boards/nrf52840-dk: add support for LSM6DSL sensor

boards/nrf52840-dk: add support for SX127X radio
2020-01-08 09:05:03 -06:00
raiden00pl
d80d6b8774 Merged in raiden00/nuttx_nrf52 (pull request #1098)
nrf52 updates

arch/arm/nrf52: add more options to Kconfig

arch/arm/nrf52: cosmetics changes to some files

arch/arm/nrf52: nfct, radio, twi, spi registers definitions

arch/arm/nrf52: fix warnings in nrf52_gpio.c

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-12-19 15:40:56 +00:00
raiden00pl
a0429bcb20 Merged in raiden00/nuttx_nrf52 (pull request #1096)
nrf52 updates

board/arm/nrf52/nrf52832-dk: use the on-board virtual COM pins as default UART0 configuration

board/arm/nrf52: initial support for the nrf52840-dk board

board/arm/nrf52: initial support for the nrf52840-dk dongle board

arch/arm/src/nrf52: add support for port 1 GPIO

arch/arm/src/nrf52: initial support for UART1

arch/arm/src/nrf52: add UICR definitions

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-12-16 18:35:45 +00:00
Levin Li
1389d90a70 arch/arm/src/nrf52: 1. added RNG device driver 2. added errdata to correct temp which will be used by RNG module 3. use general task_trigger / event_clear inline api for all driver. 2019-03-13 07:21:29 -06:00
Levin Li
043df95d8d arch/arm/include/nrf52/ and arch/arm/src/nrf52: 1. Added 52840 family support 2. Use common irq and memory layout header file for 52832 & 52840. 2019-03-12 09:43:49 -06:00
Alan Carvalho de Assis
e4e4e63164 arch/arm/src/nrf52: Add nRF52 Flash PROGMEM support 2018-05-04 18:19:36 -06:00
Levin Li
e4c48e0f23 arch/arm/src/nrf52: Add watchdog timer drivers. Includes significant updates from Alan Carvalho de Assis <acassis@gmail.com> 2018-04-20 07:13:22 -06:00
Janne Rosberg
d608f6943b arch/arm/src/nrf52: Initial support for the NRF52 2018-03-26 10:37:32 -06:00