Commit Graph

21963 Commits

Author SHA1 Message Date
David Sidrane
e0396327a2 armv7-r:MPU fix CONFIG naming to include ARM 2024-05-25 12:06:52 +08:00
David Sidrane
602e69a810 armv8-m:MPU fix CONFIG naming to include ARM 2024-05-25 12:06:52 +08:00
David Sidrane
53307ea9b2 armv7-m:MPU fix CONFIG naming to include ARM 2024-05-25 12:06:52 +08:00
Jani Paalijarvi
cfa544357e mpfs_mpu: Check that size is valid for MPUCFG
The size must be power-of-two for NAPOT according to the the PMP spec.

Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
2024-05-24 21:32:55 +08:00
Jani Paalijarvi
9d4bd915eb riscv_pmp.c: Check that size is power of two for NAPOT
The size must be power-of-two according to the the PMP spec.

Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
2024-05-24 21:32:55 +08:00
YAMAMOTO Takashi
b3513c0811 esp32s2/esp32s3 textheap: do not require RTC heap
Unlike esp32, kmm memory is executable.
2024-05-24 21:31:42 +08:00
dongjiuzhu1
00cf0ada4f Revert "arch/sim: temporary remove vfork test to fix cibreak on arch sim"
This reverts commit 8e9f24e02e.
2024-05-24 15:41:20 +08:00
Eren Terzioglu
ea9eea4096 esp32[c3|c6|h2]: Add MWDT1 support 2024-05-24 13:59:03 +08:00
Eren Terzioglu
aa0bb55529 esp32[c3|c6|h2]: Add RWDT support 2024-05-24 13:59:03 +08:00
Eren Terzioglu
44e118eaf2 esp32[c3]: Add RTC IRQ support 2024-05-24 13:59:03 +08:00
Petro Karashchenko
d144a2a80b arch/arm/samv7: enforce compilation error for incompatible configuration options
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:16:00 +08:00
Petro Karashchenko
357f8093ac arch/arm/samv7: fix U(S)ART clock enable for 1-wire
By default U(S)ART clocks are enabled in sam_lowput.c but
configuration check from sam_config.h may override USART configuration
and prevent clocks from been enabled.

This commit fix inconsistency in U(S)ART pinmux and clock configuration

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:15:46 +08:00
Petro Karashchenko
59a23768c5 arch/arm/samv7: remove duplicated prototypes
sam_lowputc.h is almost identical to sam_start.h so remove
one of the headers

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-05-23 15:15:21 +08:00
Yanfeng Liu
f8749ef0e0 arch/risc-v: guard tcb->name usage
Add guard for tcb->name field usage as it is not always available.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-22 19:06:07 +08:00
Yanfeng Liu
7db71c8ee4 ci/riscv: fix unused var in esp_twai.c
This is to fix issue in [this log](https://github.com/apache/nuttx/actions/runs/9173629303/job/25222879619):

```
Configuration/Tool: esp32c3-generic/twai esp32c6-devkitm/twai esp32c6-devkitc/twai  esp32h2-devkit/twai
Error: common/espressif/esp_twai.c:242:7: error: variable 'ret' set but not used [-Werror=unused-but-set-variable]
```

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-05-22 16:40:13 +08:00
Eero Nurkkala
2f753a48c7 arm64: s/ARCH_BOOT_EL3/ARCH_ARM64_EXCEPTION_LEVEL/g
Search and replace ARCH_BOOT_EL3 with more generic
ARCH_ARM64_EXCEPTION_LEVEL that holds the EL level
in an integer variable.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
1d3ce6b527 arm64/imx9: provide EL3 bootloader support for iMX9
This provides a capable bootloader that may be run from OCRAM.
The OCRAM contains regions that are always zero, so the linker
file avoids those with best effort.

iMX9 infrastructure expects:
  - 0x20480000 (Start of OCRAM, AHAB)
  - 0x2049a000 (NuttX or SPL)
  - 0x204e0000 (ARM Trustzone, not used)

When started from SD-card, the offsets are:
  - 0x1f000 with AHAB
  - 0xa000  without AHAB

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
1c308296a1 arm64: provide EL3 interrupt support via FIQs
Value 1021, when read from ICC_IAR0_EL1 means:

"The GIC returns this value in response to a read of ICC_IAR0_EL1 or ICC_HPPIR0_EL1 at EL3,
to indicate that the interrupt being acknowledged is one which is expected to be handled at
Non-secure EL1 or EL2. This INTID is only returned when the PE is executing at EL3 using
AArch64 state, or when the PE is executing in AArch32 state in Monitor mode."

When this happens:
  - FIQ is fired on group0
  - IRQ is pending at group1

So simply check and handle the interrupt. In short, this provides interrupt support for
EL3.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
505f57dd00 arm64: introduce MMU support for EL3
Currently MMU supports only EL1.  Introduce EL3 support as well.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
0f9a262311 arm64: provide EL3 support
This provides means to run NuttX completely in EL3.  This may
be useful with NuttX based bootloaders that are executed from
OCRAM.  Instead of SPL/U-boot combo, NuttX may replace SPL
completely.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
Eero Nurkkala
ae00569ef9 imx9_clockconfig: fix a thinko
putreg32() arguments were swapped.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-05-21 09:02:35 +08:00
YAMAMOTO Takashi
1ee279c292 nuttx kconfig: rename a few recently-added options
from:
ARCH_TEXT_HEAP_SEPARATE_DATA_ADDRESS
ARCH_TEXT_HEAP_WORD_ALIGNED_READ

to:
ARCH_HAVE_TEXT_HEAP_SEPARATE_DATA_ADDRESS
ARCH_HAVE_TEXT_HEAP_WORD_ALIGNED_READ
2024-05-21 01:11:44 +08:00
YAMAMOTO Takashi
d196f800b0 Add a few optional text heap APIs to support esp32s3
esp32s3's Internal SRAM 1 and External Memory have two separate mappings
for instructions and data.
2024-05-21 01:11:44 +08:00
dongjiuzhu1
8e9f24e02e arch/sim: temporary remove vfork test to fix cibreak on arch sim
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-05-20 12:00:39 +08:00
yinshengkai
20ebe0e64c Replace all asserts in kernel code with ASSERT
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-05-17 10:18:16 -03:00
jfbblue0922
72c1f779d1 add stm32h755II chip 2024-05-17 10:16:39 -03:00
Tiago Medicci Serrano
a00fbbeb9f espressif: Add option to disable the GIT_DEPTH to pull submodules
By default, submodules are cloned with `--depth=1`. This continues
to be true if `DISABLE_GIT_DEPTH` environment variable is not
defined (and it is not defined by default). But, if defined the
submodules will be fully cloned (without the `--depth` parameter).
2024-05-17 19:10:46 +08:00
Peter van der Perk
015e7cd607 imxrt: 1170 MPU config ensure no lockups can occur 2024-05-17 19:09:09 +08:00
simbit18
fb31f06a2f Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
Replace help => ---help---
Add comments
2024-05-17 19:06:11 +08:00
Jukka Laitinen
9257af55f1 risc-v/mpfs: Change linker symbols _ssbi_ddr and _esbi_ddr into _ssbi_ram and _esbi_ram
The original names are confusing; the symbols' addresses point to the start and end of the
sbi executable ram area. This may also reside in l2lim and not in ddr, depending on the
configuration, and this is defined in the linker script.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-05-16 17:14:43 -03:00
Rdk-T
63294c5da2 add Port selection on xmc4800
Base ecat option on chip instead of board (allow custom boards to use the ecat)

add GPIO_ECAT alternative configs
2024-05-15 11:57:57 -03:00
yangsen5
33b5e1414c arch/sim_encoder: g_bufsize initialization error in g_sim_encoder_ops structure
Signed-off-by: yangsen5 <yangsen5@xiaomi.com>
2024-05-15 22:03:18 +08:00
yangsen5
d6b7d782eb arch/sim_hostencoder: To avoid system calls being interrupted when use host api
Signed-off-by: yangsen5 <yangsen5@xiaomi.com>
2024-05-15 22:03:18 +08:00
shizhenghui
932cdf228b Add v4l2m2m sim encoder
Signed-off-by: shizhenghui <shizhenghui@xiaomi.com>
2024-05-15 22:03:18 +08:00
shizhenghui
ed1ad1be65 Add v4l2m2m & sim decoder
Signed-off-by: shizhenghui <shizhenghui@xiaomi.com>
2024-05-15 22:03:18 +08:00
YAMAMOTO Takashi
5df4925672 esp32s3_textheap.c: fix range checks
While there constants are commented as "First and last words of the
D/IRAM region", the _HIGH addresses are actually not in the corresponding
region.
2024-05-15 10:45:10 -03:00
Gao Feng
10c8c39426 xtensa/esp32s3: pending interrupt should be clear while disable GPIO IRQ 2024-05-15 10:36:04 -03:00
hujun5
6c1b900e82 arm64: optimise for arm64_switchcontext
We can save execution time by
       inline arm64_fullcontextrestore and arm64_switchcontext

test:
We can use qemu for testing.

compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-05-14 16:03:08 -03:00
Tiago Medicci Serrano
8a37d1ff1c espressif: Minor changes to keep consistency between sources
This commits replicates some changes on files that were originally
written for other Espressif SoCs and inspired new implementations.
Eventually, these new implementations were improved and this commit
replicates these changes on the original sources.
2024-05-14 22:10:45 +08:00
Tiago Medicci Serrano
c412dadcb9 esp32c3/wifi: Add support for the Wi-Fi in ESP32-C3
This commit introduces support for both station and softAP modes.
2024-05-14 22:10:45 +08:00
Tiago Medicci Serrano
7ed64e7234 esp32c3: Substitute / to $(DELIM)
Substitute `/` to `$(DELIM)` to make it compatible with other
implementations.
2024-05-14 22:10:45 +08:00
Tiago Medicci Serrano
2c4963dcd6 esp32c6/wifi: Add support for the Wi-Fi in ESP32-C6
This commit introduces support for both station and softAP modes.
2024-05-14 22:10:45 +08:00
Tiago Medicci Serrano
9e8c9ea47f esp: Update libc stubs to properly acquire/release locks.
Avoid using static mutex and recursive mutex as the resource to be
acquired/release. Instead, create a specific lock for each call if
it does not exist.
2024-05-14 22:10:45 +08:00
Tiago Medicci Serrano
47b0cae778 esp/hr_timer: Fix issue with timed-out timers 2024-05-14 22:10:45 +08:00
simbit18
d1789d84e8 fix nxstyle
fix Relative file path does not match actual file.
2024-05-13 22:24:36 +02:00
YAMAMOTO Takashi
3a4560ed40 esp32s3: make textheap return i-bus address consistently
Perform I-D translation for extram as well.

Also, use macros from soc.h.
2024-05-14 00:30:21 +08:00
YAMAMOTO Takashi
ab7805062d esp32s3/esp32s2: Fix D_I_BUS_OFFSET
It seems like a wrong copy-and-paste from esp32c3.
Actually, internal memory mapping varies among processors.

esp32s3: lightly tested with wamr aot
esp32s2: not tested (i have no hardware access)
2024-05-13 18:12:21 +08:00
Inochi Amaoto
4d2d9ecf39 arch/risc-v: fix idle stack assign order
The bc022f8cd8 introduces a static way to calculate idle stack
address for risc-v platform. However, it uses the reverse order
to access idle stack, which breaks boards with smp configuration.

Correct the idle stack order of g_cpux_idlestack.

Fixes: bc022f8cd8 ("arch/risc-v: unify idle stack calculation")
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-05-12 15:22:50 +09:00
Inochi Amaoto
bc022f8cd8 arch/risc-v: remove g_cpux_idlestack
As all the board allocate idle stack from _ebss. The idle stack
layout is fix and can be computed directly by using _ebss. There
is no need to use g_cpux_idlestack array anymore, remove it.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-05-11 17:57:59 +02:00
Inochi Amaoto
afb5a66847 arch/risc-v: unify idle stack calculation
As the stack layout is unified, it is possible to
use a unify formula to calculate the top of idle
stack.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-05-11 17:57:59 +02:00