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5526 Commits

Author SHA1 Message Date
Gregory Nutt
7a2428819f Minor style: # if pre-processor command should be in columnn 1 2015-09-18 12:47:24 -06:00
Gregory Nutt
39859a9645 All ARMV7-M: Force 8-byte stack alignment when calling from assembly to C to interrupt handling 2015-09-15 07:37:09 -06:00
Gregory Nutt
f7ca98c5ae Fix error in almost all ARMv7-M interrupt stack handling 2015-09-14 07:07:13 -06:00
Gregory Nutt
f5d015d8a2 Clean up some kruft left in the SAMA5D2 PIO driver 2015-09-13 07:25:45 -06:00
Gregory Nutt
a27e673967 SAMA5D2: Finish implementtion of the PIO driver 2015-09-12 11:36:06 -06:00
Gregory Nutt
ac986987de SAMA5D2: Add PIO driver. Still a work in progress 2015-09-12 09:58:18 -06:00
Gregory Nutt
7c62fcbe96 Rename sam_pio.c to sama5d53x4x_pio.c 2015-09-12 09:14:34 -06:00
Gregory Nutt
114f353224 SAMA5D2: Update matrix header file for the SAMA5D2 2015-09-12 09:02:42 -06:00
Gregory Nutt
94bdeda28e SAMA5D2: Add PIO register definition header file 2015-09-12 08:24:48 -06:00
Gregory Nutt
b8c1f0bfeb SAMA5: Rename chip/sam_pio.h to chip/sama5d3s4x_pio.h 2015-09-12 06:49:37 -06:00
Gregory Nutt
1f745e534b SAMA5D2: Make sure that USART mode is selected for each Flexcom used as a serial device 2015-09-11 18:42:49 -06:00
Gregory Nutt
36eba6ef99 Fix some errors in comments 2015-09-11 18:03:40 -06:00
Gregory Nutt
cc0f1d1f04 SAMA5D: Ooops. Committed wrong version of RXLP header file 2015-09-11 18:01:38 -06:00
Gregory Nutt
7c4428b67e SAMA5D2: Add RXLP register definition header file 2015-09-11 16:11:00 -06:00
Gregory Nutt
972ae84d95 SAMA5D2: Add logic to enable Flexcom clocking and to configure Flexcom pins 2015-09-11 14:54:30 -06:00
Gregory Nutt
b19c3d7cbe SAMA5D2: Add Flexcom UART serial driver 2015-09-11 14:30:19 -06:00
Gregory Nutt
9385a98588 SAMA5D: Move common configuration logic from sam_lowputc.c and sam_serial.c to new sam_config.h. Make room in the architecture for forthcoming Flexcom USARTs 2015-09-11 12:00:30 -06:00
Gregory Nutt
a39b2351f0 SAMA5D2: Add Flexcom register definition header files 2015-09-11 10:40:12 -06:00
Gregory Nutt
f51541dfd6 SAMA5Dx UART: SAMAD4 also has BRSRCCK bit in the MR register 2015-09-11 08:27:18 -06:00
Paul A. Patience
260778feb1 Fix typo 2015-09-10 21:07:03 -04:00
Gregory Nutt
cf7ea3bc3e Updates for SAMA5D2: It has no USARTS 2015-09-10 17:15:52 -06:00
Gregory Nutt
2cdbc17a63 SAMA5: Fix support for varying number of PIO ports 2015-09-10 13:46:57 -06:00
Gregory Nutt
c1b83cfbc8 SAMA5D2: Add pin multiplexing definition file and other necessary changes for the SAMA5D2 2015-09-10 13:07:04 -06:00
Gregory Nutt
7ad8c32adf Trivial spacing change 2015-09-10 12:11:10 -06:00
Ilya Averyanov
0fea56cd8b LPC43xx: Add ehci driver. 2015-09-10 07:23:03 -06:00
Gregory Nutt
87aa1cb83b SAMA5D2: Update PMC definitions; has UART2-4, but not USART0-4 2015-09-09 12:11:45 -06:00
Gregory Nutt
c391ada5e7 SAMA5D2: Update boot logic, AXIMX, SFR, and WDT register definition files for SAMA5D2 2015-09-09 10:00:29 -06:00
Ilya Averyanov
76ab22debf LPC43xx: Fix IRQ Ethernet name 2015-09-09 07:22:02 -06:00
Gregory Nutt
5f54db8c17 Separate memory mapping tables for SAMA5D2, 3, and 4 2015-09-08 16:40:13 -06:00
Gregory Nutt
6e900bc88a Eliminate warning 2015-09-08 13:26:51 -06:00
Gregory Nutt
36f1d84374 Remove some nonfunctional logic that also generates warnings 2015-09-08 13:02:33 -06:00
Gregory Nutt
0f8a416b20 More fixes for warning removal typos 2015-09-08 12:15:29 -06:00
Gregory Nutt
35866ede44 Eliminate warnings 2015-09-08 12:02:35 -06:00
Gregory Nutt
e7c149e545 Yet another rething of the SAMA5 memory mapping definitions 2015-09-08 11:50:30 -06:00
Gregory Nutt
e6aba39805 SAMA5: Correct some memory map logic 2015-09-08 11:35:11 -06:00
Gregory Nutt
2138e16199 Eliminate warnings 2015-09-08 11:08:44 -06:00
Gregory Nutt
2913aac866 Eliminate warnings 2015-09-08 10:20:41 -06:00
Gregory Nutt
e354853776 Elminiate some warnings 2015-09-08 09:18:59 -06:00
Gregory Nutt
d8c83218fe Eliminate warnings 2015-09-08 08:27:34 -06:00
Gregory Nutt
7065f78b92 Eliminate a warning 2015-09-08 08:18:01 -06:00
Gregory Nutt
cfd41bdb30 STM32: Eliminate some warnings 2015-09-07 16:25:54 -06:00
Ilya Averyanov
560613622d EHCI: We not need disable and enable async scheduler when 2015-09-07 13:44:56 -06:00
Ilya Averyanov
8cc83fa6dc EHCI: Fix qh_ioccheck to move bp to next QH 2015-09-07 13:42:39 -06:00
Ilya Averyanov
6799bba3c1 EHCI: Rename asynch_setup to ioc_async_setup 2015-09-07 13:36:52 -06:00
Gregory Nutt
f3af146d44 SAMV7 QSPI: Back out part of last change; byte access are necessary. Correct write to the IAR register 2015-09-06 11:24:43 -06:00
Gregory Nutt
26eada3446 In all up_initialize() functions, automatically initialize TUN driver is so configureded 2015-09-06 09:35:29 -06:00
Gregory Nutt
b30e6a696e SAMV71 QSPI: Add methods to allocate properly aligned memory. 2015-09-06 09:34:51 -06:00
Gregory Nutt
da3c05a898 Minor changes from review of merge 2015-09-06 07:10:21 -06:00
pnb
55dcbb4ca2 efm32 addons missing file 2015-09-06 13:10:41 +02:00
Gregory Nutt
9d5f04cd45 Remove some crap from the SAMA5D2 memory map header file 2015-09-05 12:43:34 -06:00
Gregory Nutt
6488fe469d SAMA5D Kconfig: SAMA5D2 has P310 L2 cache 2015-09-05 12:15:50 -06:00
Gregory Nutt
975d912b40 Cosmetic: Move # of pre-processior command to column 1 2015-09-05 09:07:37 -06:00
Gregory Nutt
2ed09233d3 Changes to conform to coding standard. 2015-09-05 07:50:02 -06:00
Gregory Nutt
60d444cd69 Changes to conform to coding standard. Also, I assume references to STM32 should be EFM32? 2015-09-05 07:33:50 -06:00
Gregory Nutt
e714cd748c Changes to conform to coding standard. Also, I assume references to STM32 should be EFM32? 2015-09-05 07:31:16 -06:00
pnb
1314f60caf start of adc for efm32 2015-09-05 10:51:33 +02:00
Pierre-noel Bouteville
85b1638171 Merged nuttx/arch into master 2015-09-05 10:42:12 +02:00
pnb
c327cce0b8 add bitband support 2015-09-05 10:40:34 +02:00
pnb
c83d533d90 add flash read/write support 2015-09-05 10:37:53 +02:00
pnb
3c35458ac2 fix some I2C problem 2015-09-05 10:22:08 +02:00
pnb
ea596e45d3 add efm32_gpioirqclear 2015-09-05 10:20:24 +02:00
pnb
ed8531a53b GPIO fix bug GPIO_DRIVE_... definition 2015-09-05 10:17:05 +02:00
pnb
9564f878a9 set Gpio drive only if not standard 2015-09-05 10:15:42 +02:00
pnb
fa65bef573 commetic 2015-09-05 10:11:06 +02:00
Gregory Nutt
544ed7cdbd Purely cosmetic changes from code review 2015-09-04 16:36:43 -06:00
Gregory Nutt
804570f831 Merged in david_s5/arch/upstream_stm32_flash (pull request #11) 
Added suport for overriding the STM32 flash size. To allow the use of  STM32F2 and STM32F4 devices with F, G, I flash designations
 2015-09-04 16:25:03 -06:00
David Sidrane
9c13fa3f67 Added suport for overriding the STM32 flash size. To allow the use of STM32F2 and STM32F4 devices with F, G, I flash designations 2015-09-04 10:26:09 -10:00
Gregory Nutt
831272cd35 SAMA5D2: Add memory map file 2015-09-02 13:04:01 -06:00
Gregory Nutt
aff3dbda88 Remove one more unused reference to PCLKSEL 2015-09-02 09:16:04 -06:00
Gregory Nutt
cace0003f2 LPC43: Removed references to non-existent PCOMP and PCLKSEL registers in comments 2015-09-02 09:07:38 -06:00
Ilya Averyanov
f2e1fb7ea2 LPC43xx: Fix build with FPU enabled 2015-09-02 09:03:10 -06:00
Ilya Averyanov
a3bc46f629 LPC43xx: Add Ethernet support. From Ilya Averyanov 2015-09-02 09:01:41 -06:00
Ilya Averyanov
fdfaf9aa09 lpc43xx: Spi make work 2015-09-02 08:31:08 -06:00
Ilya Averyanov
f2b5f05124 STM32 Ethernet: stm32_ifdown() prototyped twice 2015-09-02 08:23:45 -06:00
Gregory Nutt
5a9f1fa3ab Extension memory map inclusion for SAMA5D2 2015-09-02 08:23:44 -06:00
Gregory Nutt
075b66d4bb Eliminate a warning 2015-09-01 13:35:38 -06:00
Gregory Nutt
8c9f7e5ab6 Add peripheral clock macros for the SAMA5D2 2015-09-01 13:08:48 -06:00
Gregory Nutt
f6d8a03b55 Merged in paulpatience/nuttx-arch (pull request #10) 
Correct #if to #ifdef when the macro can be undefined.  Fix bug in AT32UC3 clock initialization:  AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1.
 2015-09-01 12:31:05 -06:00
Paul A. Patience
a0dc724a5d Correct #if to #ifdef when the macro can be undefined. Fix bug in AT32UC3 clock initialization: AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1. 2015-09-01 13:47:06 -04:00
Ilya Averyanov
98788063f1 Fix warning in Kconfig file introduced with first SAMA5D2 commit. From Ilya Averyanov. 2015-09-01 11:23:08 -06:00
Gregory Nutt
ed3d6fc7a0 SAMV7 QSPI: Delays need to be in units of nsec, not usec. Default delays should be 0 nsec 2015-09-01 11:16:09 -06:00
Ilya Averyanov
8c52786395 LPC43xx: Fix missing #define in eeprom. From Ilya Averyanov 2015-09-01 08:08:09 -06:00
Ilya Averyanov
675878b360 PC43xx: Fix NVIC_SYSH_PRIORITY_STEP define 2015-09-01 08:06:34 -06:00
Gregory Nutt
c33efa0a60 SAMA5D2: Add chip definitions, PIDs, and IRQ definitions 2015-08-31 15:19:01 -06:00
Gregory Nutt
9ba349f2b8 SAMV71 QSPI: Fix frequency calculation. Need to use ceil() type logic so that requested frequency is not exceeded 2015-08-31 10:18:17 -06:00
Gregory Nutt
4f87a71e6d SAMV7 QSPI: Use of CPHA in mode settings was inverted 2015-08-31 10:05:41 -06:00
Gregory Nutt
4b738ba7cc SAMV7 QSPI: Fix some compiler problems when SPI debug is enabled 2015-08-31 08:57:30 -06:00
Gregory Nutt
70f1a49fbe arch/arm/src/up_iternal.h and several ARM Make.defs files: In the original implementation, NOT defined(CONFIG_ARMV7M_CMNVECTOR) was a sufficient test to determine if lazy floating point register saving was being used. But recents changes added common lazy register as well so now that test must be (NOT defined(CONFIG_ARMV7M_CMNVECTOR) || defined(CONFIG_ARMV7M_LAZYFPU)). 2015-08-31 08:40:02 -06:00
Gregory Nutt
b6515bbd4d SAMV71 QSPI: Changes resulting removing of clocking 2015-08-29 18:53:27 -06:00
Gregory Nutt
b94eef2f19 SAMV71 QSPI: Driver is code complete 2015-08-29 15:57:20 -06:00
Gregory Nutt
3877cb09d9 Trivial renaming 2015-08-29 10:04:36 -06:00
Gregory Nutt
b887d39d2e SAMV7 QSPI: Add DMA transfer support 2015-08-29 10:02:59 -06:00
Gregory Nutt
0b1bd46e24 SAMV71 QSPI: Add support for dual and quad data transfers and dummy read cycles 2015-08-28 11:58:19 -06:00
Gregory Nutt
3e0affba86 SAMV71 QSPI: Add support for non-DMA memory transfers 2015-08-28 10:13:46 -06:00
Gregory Nutt
8aefb9d139 SAMV71 QSPI: Redesign some functions to better matched new interface definition 2015-08-27 14:15:23 -06:00
Gregory Nutt
71bbe5b48d Merge remote-tracking branch 'origin/master' into st25fl1 2015-08-27 12:08:04 -06:00
Gregory Nutt
926f3aa9af Update some comments 2015-08-27 08:19:26 -06:00
Gregory Nutt
45a6f79eeb SAMV71 QSPI: Flesh out most of the initialization logic 2015-08-26 14:15:40 -06:00
Gregory Nutt
768aba20ad SAMV71 QSPI: Use new QSPI interface. Can't use SPI interface as planned; the hardware architectue is too different 2015-08-25 15:23:59 -06:00
Gregory Nutt
fa9522da41 Missed one file in last commit 2015-08-24 14:30:58 -06:00
Gregory Nutt
01cfe8c315 Networking: Move where the local loopback device is initialized from board_app_intiialize() to up_intiialize() so that it will happen automatically 2015-08-24 14:25:49 -06:00
Gregory Nutt
0732914d09 Merged in david_s5/arch/upstream_446_clock (pull request #9) 
Upstream_446_clock
 2015-08-24 14:13:51 -06:00
Gregory Nutt
706d50d97a Merge branch 'master' of bitbucket.org:nuttx/arch 2015-08-24 13:46:19 -06:00
Gregory Nutt
c9603b27c0 sim: Add logic to initialize the local loopback device is so configured 2015-08-24 13:46:05 -06:00
David Sidrane
98ce2b2912 Fixed Mask and made configuration macros consistant 2015-08-24 08:56:24 -10:00
David Sidrane
b95c642a88 Added Kconfig Enable Support for SAI and I2S PLL 2015-08-24 08:55:45 -10:00
Gregory Nutt
bddc4dbd6a LPC17: Fix RAM vector table alignment for the LPC17 family. The ARMv7-M TRM only requires 128-byte alignment for vector tables; the LPC17, however, requires 256 byte alignment 2015-08-23 17:17:14 -06:00
Gregory Nutt
065f2d6057 SAMV7 USBHS DCD: Add logic to detect high speed mode; use DEBUGASSERT to check input parameters 2015-08-22 08:58:38 -06:00
David Sidrane
6559c8994a Remove the word NOT - that was used to test the fix. 2015-08-21 18:51:28 -06:00
David Sidrane
390c777a2a Removed the word NOT - that was used to test the fix. 2015-08-21 18:40:20 -06:00
Pavel Pisa
2fafe1c817 arch/arm/src/lpc17: Actually implement options to use external SDRAM and or SRAM for the heap. From Pavel Pisa 2015-08-21 18:28:59 -06:00
Gregory Nutt
4c0d36740d Some of the last review chnages were still in the editor 2015-08-21 18:25:10 -06:00
Gregory Nutt
9a32e907df Trivial, cosmetic changes from review of merge 2015-08-21 18:22:57 -06:00
Gregory Nutt
4e347080e6 Update comments in Kconfig file 2015-08-21 18:15:09 -06:00
Gregory Nutt
16c5be9767 Merged in david_s5/arch/upstream_446 (pull request #7) 
Upstream_446
 2015-08-21 18:11:05 -06:00
David Sidrane
9d64050d68 Added Changes to support for the new USB OTG controller for F446 register map 2015-08-21 13:57:08 -10:00
David Sidrane
7c96342c63 Break the stm32_otg.h into an stm32fxxxxx and stm32f44xx (should work on F7) versions 2015-08-21 13:55:06 -10:00
David Sidrane
5d1ff3f7e1 Use read modify write on PLL and CFG registers 2015-08-21 13:22:09 -10:00
David Sidrane
1c746edceb Added PLL P constants 2015-08-21 13:20:16 -10:00
Gregory Nutt
972f67ce42 SAMV7 QSPI: Add framework for a QSPI driver. Initial commit is just the SPI driver with some name changes 2015-08-21 14:22:47 -06:00
Gregory Nutt
f6c6723d88 SAMV7 USBHS Device: After aligning DMA buffers and disabling write-back data cache, the DCD driver is fully functional using the CDC/ACM device 2015-08-21 12:30:29 -06:00
Gregory Nutt
da6c5aabdf All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa 2015-08-21 08:42:24 -06:00
Gregory Nutt
0b3b104b74 Remove unnecessary step in previous commit 2015-08-20 16:21:45 -06:00
Pavel Pisa
387f76d455 This fix allows to run NuttX from SRAM or to place it after bootloader when run from Flash. From Pavel Pisa 2015-08-20 07:46:18 -06:00
Gregory Nutt
5196a4183c SAMV7 USBHS device: Fix how we send data on control endpoints; fix how we select USB address 2015-08-19 11:36:38 -06:00
Gregory Nutt
0db7ac92d9 Minor coding style fixes in last commit; remove some unneeded debug output 2015-08-19 07:54:46 -06:00
SaeHie Park
75626fb071 STM32: Fix eth mem leak in recvframe 2015-08-19 15:40:04 +09:00
Gregory Nutt
cfd4f943da SAMV7 MCAN: When bitrate is changed, the MCAN has to be reset and there are lots of issues related to getting back to a healthy state if there is multithreaded access to the MCAN device. This commit handles a few of those issues, but there are more 2015-08-18 11:56:07 -06:00
Gregory Nutt
4b96605f93 SAMV7 MAN: Add support for bit timing IOCTL commands 2015-08-18 11:20:22 -06:00
Gregory Nutt
ff84e67e59 SAMV7 MCAN: Add logic to report CAN errors 2015-08-18 08:48:13 -06:00
Gregory Nutt
b7d6720a23 All CAN drivers: Set the new error indication to zero in the CAN message report 2015-08-18 07:24:12 -06:00
Gregory Nutt
c01d3298e5 Merged in paulpatience/nuttx-arch (pull request #5) 
Added definitions for STM32F303K6, STM32F303K8, STM32F303C6, STM32F303C8, STM32F303RD, and STM32F303RE devices.
 2015-08-17 12:55:32 -06:00
Paul A. Patience
c800841632 Added definitions for STM32F303K6, STM32F303K8, STM32F303C6, 
STM32F303C8, STM32F303RD, and STM32F303RE devices.
 2015-08-17 14:00:49 -04:00
Gregory Nutt
531456d20c Fix deadlock when closing the MCAN device driver 2015-08-17 11:49:20 -06:00
Gregory Nutt
4f122d5290 SAMV71 MCAN: Default clock source should be MCK, not MAIN 2015-08-17 11:03:15 -06:00
Gregory Nutt
ff38abf580 SAMV7 MCAN: Should support standard CAN IDs in extended ID mode 2015-08-17 10:52:58 -06:00
Gregory Nutt
ba6c0b3fa3 Fix more common typos 2015-08-16 11:06:29 -06:00
Gregory Nutt
e29220183a Fix some common typos 2015-08-16 10:59:10 -06:00
Gregory Nutt
9e5e91c204 SAMV7 USBHS device: Fix backward test of TXINIT. Driver now appears to be functional 2015-08-16 08:55:44 -06:00
Gregory Nutt
b503bf6ca1 SAMV7 USB device: Fix base address of USBHS RAM; remove a bad assertion; fix clearing of endpoint interrupts 2015-08-15 13:00:32 -06:00
Gregory Nutt
9d7301f474 SAMV7 USBHS device: Need to enable endpoint before configuring it; Check for USB suspended backward 2015-08-15 10:41:15 -06:00
Gregory Nutt
651317ee49 SAML21: Various SERCOM fixes 2015-08-14 18:11:02 -06:00
Gregory Nutt
348060f5d2 SAMV7: Add QSPI Register Definition Header File 2015-08-14 18:11:01 -06:00
Gregory Nutt
150f79a198 Backout commit e03b47b6e28ca98a6cc8497ad822309de5153eb3 2015-08-14 10:24:56 -06:00
Gregory Nutt
a44a208ff6 SAMV71 MCAN: Change Kconfig so that zero is no longer the default value for the size of RXFIFO0, RXFIFO1, and TXFIFIQ. In fact, zero is not an illegal value 2015-08-13 08:13:49 -06:00
Gregory Nutt
bef5eb0bc9 Fix a typo in a preprocessor warning 2015-08-12 15:32:46 -06:00
Gregory Nutt
b9d4ead73f SAMV7 MCAN: Correct usage of PCLK prescaler. From Frank Benkert 2015-08-12 11:17:03 -06:00
Gregory Nutt
53638b10dc SAMV7 USBHS device: Modify how ATTACH is performed if the use host has already reset 2015-08-12 11:13:18 -06:00
Gregory Nutt
68932c02d3 Fix typos in SAMV7 MCAN. From Frank Benkert 2015-08-12 08:17:50 -06:00
Gregory Nutt
2264c1fa64 SAMV7 USB: USB must be enabled before PMC 480MHz clock is enabled 2015-08-11 15:48:26 -06:00
Gregory Nutt
f3d1c19965 SAMV7 SPI slave: Loop in the interrupt handler; RDRF and TXNE events should occur very closely in time 2015-08-11 09:30:24 -06:00
Gregory Nutt
27733a6731 Trivial spacing change 2015-08-11 07:51:31 -06:00
Gregory Nutt
9f4e033f4c MoxART: Trivial changes from code review 2015-08-10 11:05:09 -06:00
Gregory Nutt
8de9d3f014 Merged in rnouse/nuttx-arch (pull request #4) 
Add Shared IRQ support for UART w/multi port.
 2015-08-10 10:11:43 -06:00
Gregory Nutt
c8c470271f SAMV7 SPI Slave: Completes implementation basic, no-DMA driver 2015-08-10 10:05:00 -06:00
Anton D. Kachalov
f10b7ff09a Merge branch 'master' of https://bitbucket.org/nuttx/arch 2015-08-10 18:14:49 +03:00
Anton D. Kachalov
46444388fa Add Shared IRQ support for UART w/multi port. 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-08-10 18:13:35 +03:00
Gregory Nutt
c7b0a35e85 Rename sam_spi_slave_initialize to up_spi_slave_initialize for better symmety with the Master SPI interface definition 2015-08-09 17:41:55 -06:00
Gregory Nutt
ec68d00ed8 A few more cosmetic changes to the SAMV7 SPI slave driver-in-progress 2015-08-09 16:21:49 -06:00
Gregory Nutt
1fbd5351ff Fix typo in a Kconfig file 2015-08-09 15:50:04 -06:00
Gregory Nutt
c7eaa00ed4 SAMV7 SPI slave: Add output queuing and interrupt handling 2015-08-09 15:42:32 -06:00
Gregory Nutt
5f4224115a SAMV7 SPI Slave: Add a basic driver framework for SPI slave. Still a lot of missing logic 2015-08-09 12:04:43 -06:00
Gregory Nutt
7e7150899a SAMV7: Add configuration options to select SPI slave (slave driver not yet committed) 2015-08-09 09:47:06 -06:00
Gregory Nutt
05aae51c89 SAMV7 MCAN: Lock the scheduler at one critical point to avoid a possible race condition 2015-08-09 08:41:57 -06:00
Gregory Nutt
7a6bdf286e SAMV7 MCAN: Add some precautions to assue that a counting semaphore does not get out of synch 2015-08-08 08:38:52 -06:00
Gregory Nutt
a7a52252a8 SAMV7 MCAN: Fix DCACHE configuration dependency; Mkae sure DMA buffers are aligned to the cache line size at the end, Make RX FIFO1 the high priority FIFO and it it preference for RX input 2015-08-07 12:31:01 -06:00
Gregory Nutt
75ce247ed1 Use message sized defined in can.h 2015-08-07 09:01:30 -06:00
Gregory Nutt
aea94d9525 SAMV7 MCAN: Add support for all filter modes 2015-08-07 08:23:21 -06:00
Gregory Nutt
955202b895 Grr.. typos crept in during the last minute clean-up of the previous fix 8( 2015-08-06 12:50:11 -06:00
Gregory Nutt
32900bdb0b SAMV71 MCAN: Fix standard ID mask 2015-08-06 12:47:14 -06:00
Gregory Nutt
f7bcff3d12 SAMV7 MCAN: Fix filter configuration when now filters are defined. We need to accept all messages in this case 2015-08-06 11:50:41 -06:00
Gregory Nutt
86f7a58954 SAMV7 MCAN: some fixes from early testing 2015-08-06 10:24:31 -06:00
Gregory Nutt
73a96ab078 Update some function headers 2015-08-05 16:22:10 -06:00
Gregory Nutt
983df071c3 STM32V7 MCAN: CAN FD mode depends on support from the upper half driver, so it is now global CAN configuration 2015-08-05 13:55:20 -06:00
Gregory Nutt
bb47c7f80e SAMV7 MCAH: Add support for IOCTL commands that manage filters 2015-08-05 12:59:29 -06:00
Gregory Nutt
d824223736 SAMV7 MCAN: Fix uninialize configuration value 2015-08-05 09:16:16 -06:00
Gregory Nutt
ba23314cbf Merge remote-tracking branch 'origin/master' into mcan 2015-08-05 08:57:29 -06:00
Gregory Nutt
f986d08515 SAMV71: Fix error in GPIO interrupt numbering 2015-08-05 08:57:05 -06:00
Gregory Nutt
4db9f276e6 SAMV7 MCAN: Fix some compilation errors when CAN debug is enabled 2015-08-05 08:21:32 -06:00
Gregory Nutt
92f5bf01c3 SAMV7 MCAN: Correct some compile errors when only MCAN1 is enabled 2015-08-05 08:07:25 -06:00
Gregory Nutt
1a93dadf26 SAMV7 MCAN: Fix some compilation warnings (some of which are real coding errors). 2015-08-05 07:29:20 -06:00
Gregory Nutt
c30cfe2025 SAMV7 MCAN driver is code complete (with some missing functionality) 2015-08-05 07:09:29 -06:00
Gregory Nutt
c8923bb6fc SAMV7 MCAN: Finish some TX FIFO status methods; Correct interpretation of DLC in CAN_FD mode 2015-08-04 17:19:47 -06:00
Gregory Nutt
a64398c86b SAMV7 MCAN: Minor correcting to message size calculation 2015-08-04 14:05:07 -06:00
Gregory Nutt
bb32aa8d24 SAMV7 MAN: Flesh out interrupt logic; add RX message handling logic 2015-08-04 13:51:34 -06:00
Gregory Nutt
62a9aed53a SAMV7 MCAN: Add logic to send messages usign the TX FIFOQ 2015-08-04 11:41:38 -06:00
Anton D. Kachalov
a8fc587d87 Fixup operation mode set 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-08-04 20:28:43 +03:00
Gregory Nutt
f7350568f3 STM32 ADC changes suggested by Max Kriegleder 2015-08-04 06:29:40 -06:00
Gregory Nutt
4e2a95c71e SAMV7 MCAN: Add some default values of configuration settings 2015-08-03 19:21:43 -06:00
Gregory Nutt
949cea035c Fix a spelling error 2015-08-03 13:53:53 -06:00
Gregory Nutt
e89d8c4a5f SAMV7 MCAN: Remove SAMA5 kruft; beginning of some interrupt logic 2015-08-03 13:50:02 -06:00
Gregory Nutt
bf8230d7b4 SAMV7 MCAN: Update some register debug output 2015-08-03 10:02:18 -06:00
Gregory Nutt
d53f6b9353 SAMV7 MCAN: Finishes most of the initalization logic 2015-08-03 09:10:38 -06:00
Gregory Nutt
2b76d57c30 Merged in rnouse/nuttx-arch (pull request #3) 
Add custom IOCTL for UART port
 2015-08-03 06:48:04 -06:00
Anton D. Kachalov
19d8b4c46e Add custom IOCTL for UART port 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-08-03 15:34:29 +03:00
Gregory Nutt
cabe75a51d SAMV71 MCAN: Add some mode-related initialization logic 2015-08-02 14:51:01 -06:00
Gregory Nutt
f5e7dd777e SAMV7 MCAN: Add logic to configure clocking and message RAM addresses 2015-08-02 13:25:14 -06:00
Gregory Nutt
fe211d1b88 SAMV7 MCAN: remove old AUTOBAUD option; add a local LOOPBACK option 2015-08-02 11:18:51 -06:00
Gregory Nutt
d97c0db228 SAMV7 MCAN: Correct name of pin configurations 2015-08-02 10:58:04 -06:00
Gregory Nutt
269180e19d SAMV71 MCAN: message RAM configuration 2015-08-02 10:37:54 -06:00
Gregory Nutt
1aac62cce3 SAMV71 MCAN: Fix base address 2015-08-02 10:09:24 -06:00
Gregory Nutt
34c3c780e1 SAMV71 MAN configuration data 2015-08-02 10:08:18 -06:00
Gregory Nutt
a5755cb378 SAMV71 MCAN: Add range checking of configuration setting 2015-08-01 15:57:06 -06:00
Gregory Nutt
a3ec0a1414 SAMV7: Complete MCAN configuration options 2015-08-01 12:40:18 -06:00
Gregory Nutt
6c9e8b5092 SAMV7 MCAN: Add some definitions for the PCK5 clock source and prescaler 2015-07-31 11:24:29 -06:00
Gregory Nutt
70f6e1e8bb Merge remote-tracking branch 'origin/master' into mcan 2015-07-31 10:14:42 -06:00
Gregory Nutt
d9830da295 Fix naming of idempotency variable 2015-07-31 10:14:06 -06:00
Gregory Nutt
1638d61389 SAMV7 MCAN Driver. Initial commit is just the SAMA5 CAN driver with naming changes. It should not even compile yet 2015-07-31 10:11:01 -06:00
Gregory Nutt
ee72304b25 Newer 4.9 GCC does not permit both -mcpu= and -march= on the command line; either -mcpu= or -march= with -mtune. The latter gives me linking errors so all of the arguments committed to the former. Untested on more tools 2015-07-31 08:39:26 -06:00
Gregory Nutt
3139ce7808 Merged in rnouse/nuttx-arch (pull request #2) 
Fixup up_{enable,disable}_irq
 2015-07-31 06:15:56 -06:00
Anton D. Kachalov
a191fd661e Do not touch Mode/Level in irq_enable/disable 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-07-31 14:11:07 +03:00
Anton D. Kachalov
900ea68c41 Set Timer's IRQ Level/Mode during init 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-07-31 14:10:29 +03:00
Gregory Nutt
095d2d3eee Fix a typo in the STM32 F2 DMA header file 2015-07-30 16:03:52 -06:00
Gregory Nutt
2c5a6831cd ADC DMA should work on the F2 as well because the DMA is equivalent on the F2 and F4 2015-07-30 15:49:33 -06:00
Max Kriegler
9ed14b0924 STM32 ADC: Add DMA support for the STM32 F4 family. From Max Kriegler 2015-07-30 08:47:45 -06:00
Juha Niskanen
7407e41569 Add CONFIG_ADC_NO_STARTUP support for STM32 F1 (untested) 2015-07-30 07:42:31 -06:00
Gregory Nutt
f795e386d7 moxART needs to select some architecture. Is ARM7TDMI close? 2015-07-29 20:41:05 -06:00
Gregory Nutt
5b46df9c49 Fix compile error from last ADC change 2015-07-29 17:37:35 -06:00
Gregory Nutt
0843af5367 Fixes that call sched_resume_scheduler and sched_suspend_scheduler must include nuttx/sched.h 2015-07-29 16:51:26 -06:00
Gregory Nutt
23ed19c514 Clean-up from last commit to make sure that all files have BSD licensed header with the correct authors and that the code conforms to the NuttX coding style 2015-07-29 13:52:23 -06:00
Anton D. Kachalov
b10095ed59 [arm/src/moxart/irq] irq_decode: process one irq at once 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-07-29 19:13:47 +03:00
Anton D. Kachalov
ab27747484 [arm/src/moxart/irq] irq_decode: process several interrupts at once 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-07-29 19:13:47 +03:00
Anton D. Kachalov
ea6c65d813 [moxart/moxart_timer] Correct compare value for T1 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-07-29 19:13:47 +03:00
Anton D. Kachalov
309ee5d348 [moxart/moxart_irq] Cleanup includes 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-07-29 19:13:47 +03:00
Anton D. Kachalov
7f28335f81 [moxart/moxart_timer] Div clock by 8 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-07-29 19:13:47 +03:00
Anton D. Kachalov
46c8885814 [arm/moxart/moxart_irq] Typo fix 2015-07-29 19:13:47 +03:00
Anton D. Kachalov
75762f1519 Add support for MoxaRT 2015-07-29 19:13:47 +03:00
Juha Niskanen
3d32eb9465 tm32_adc: Add STM32L152XX ADC support 
Porting from Thingsee OS.

Credits: Dmitry Nikolaev wrote most of the code, Teemu Pirinen from Offcode Ltd.
contributed support for changing single shot adc channel, minor tweeks by
Jussi Kivilinna and Juha Niskanen

Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>

Includes additional changes from review.
 2015-07-29 08:34:27 -06:00
Gregory Nutt
032c237865 Minor modifications from review of previous commits 2015-07-29 08:34:01 -06:00
Gregory Nutt
90ac233e09 Minor modifications from review of previous changes 2015-07-29 08:32:23 -06:00
Juha Niskanen
ddc93995a0 chip/stm32_adc.h: Add defines for STM32L152XX ADC support 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2015-07-29 07:38:29 -06:00
Juha Niskanen
f4812bfbf9 stm32/chip: Add some STM32L15XX support bits (from Thingsee) 
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
 2015-07-29 07:36:21 -06:00
Gregory Nutt
eddf8161a5 Add scheduler resume/suspend calls to all implementations of up_release_pending() 2015-07-26 10:13:29 -06:00
Gregory Nutt
37969b8279 Add scheduler resume/suspend calls to all implementations of up_reprioritize_rtr() 2015-07-26 09:46:28 -06:00
Gregory Nutt
838c5355eb Correct resume scheduler hooks and add suspend scheduler hooks to all implementations of up_unblock_task 2015-07-26 09:07:47 -06:00
Gregory Nutt
a92c0a10ab Add scheduler resume/suspend calls in all implementations of up_block_task() 2015-07-26 08:31:23 -06:00
Gregory Nutt
9d98177daa Add logic to reset the replenish the sporadic scheduler when a task is resumed 2015-07-24 09:54:28 -06:00
Gregory Nutt
39192c3537 Fix a compile error found by tools/tesbuild.sh 2015-07-22 15:45:47 -06:00
Gregory Nutt
999452c3ae Eliminate a warning detected by nuttx/tools/testbuild.sh 2015-07-22 14:11:10 -06:00
Gregory Nutt
ca203f6a4f Fix warnings from the STM32F7 pinmap.h header file; add a .gitignore file 2015-07-22 11:00:41 -06:00
David Sidrane
778c630c6b Add support for the STM32446. From David Sidrane 2015-07-22 07:26:53 -06:00
David Sidrane
092488cbd0 Make some STM32F7 pin naming more consistent 2015-07-21 15:33:56 -06:00
David Sidrane
e36ca25c5c STM32: Fix incorrect naming of inclusion guard in IRQ header files 2015-07-21 12:25:15 -06:00
David Sidrane
e7d039ac2b STM32: Fix incorrect naming of inclusion guard in IRQ header files 2015-07-21 11:30:45 -06:00
David Sidrane
5c5df7aefe STM32 F229: Fix bad inclusion guard in a header file 2015-07-21 11:25:29 -06:00
Gregory Nutt
9c284bb05f Syscall fixes: Add support for Cortex-M7; mount syscall has to be suppressed if there are no mountable file systems 2015-07-21 11:20:46 -06:00
Gregory Nutt
d2c8d4a495 Review/updated Cortex-M7 MPU definitions 2015-07-21 11:19:14 -06:00
Gregory Nutt
ba2046d0cd STM32 F7: Port some F4 protected mode files to the F7 2015-07-21 07:59:20 -06:00
Max Neklyudov
b13e182099 Correct some problems with SAM3/4 watchdog driver. Includes some small improvements. From Max Neklyudov. 2015-07-21 07:15:39 -06:00
David Sidrane
e6216a9175 Correct some typos in the STM32 F7 RCC register definition header file. From David Sidrane. 2015-07-21 06:51:33 -06:00