Young
e35406f7d6
Support PWM_PULSECOUNT feature for TI tiva
2016-12-20 13:20:04 +08:00
Gregory Nutt
e5182acbe3
Xtensa ESP32: Make sure that SMP configuratin still builds without errors.
2016-12-19 14:12:19 -06:00
Gregory Nutt
e61549d8b9
Xtensa ESP32: Clean-up and fixes from last commits
2016-12-19 13:57:37 -06:00
Gregory Nutt
097f09cb02
Xtensa ESP32: Corrects timer initialization and timer input frequency.
2016-12-19 11:50:28 -06:00
Gregory Nutt
a9a39800a4
Xtensa ESP32: Fixes some double faults and user errors, but I do not fully understand why.
2016-12-19 11:14:08 -06:00
Gregory Nutt
886ce88b4f
Xtensa ESP32: Automatically mount /proc at start-up.
2016-12-19 09:43:16 -06:00
Gregory Nutt
2b0b698d72
ESP32 Serial: Add logic to prevent infinite loops in interrupt handler.
2016-12-18 16:04:25 -06:00
Gregory Nutt
71bb79a6c7
ESP32 Serial: Fix some register bit definitions.
2016-12-18 15:11:34 -06:00
Gregory Nutt
4bd530d026
Xtensa ESP32: Last change should be conditioned on the window ABI.
2016-12-18 13:17:31 -06:00
Gregory Nutt
665c1647b5
Xtensa ESP32: Need to spill registers to memory as the last dying action before switching to a new thread.
2016-12-18 12:54:47 -06:00
Gregory Nutt
586f0aab50
Fix context save logic when called in window ABI configuration. Add an IDLE stack. Don't depend on the mystery stack received from the bootloader.
2016-12-18 10:08:08 -06:00
Gregory Nutt
93e6d16f75
Xtensa ESP32: wsr, not rsr.
2016-12-17 11:23:10 -06:00
Gregory Nutt
a88c50d366
Xtensa ESP32: Need to clone some logic for syncrhonous context switch. Window spill logic in the conmon restores logic is inappropriate in this context
2016-12-17 11:00:12 -06:00
Gregory Nutt
6b80e5f15f
Xtensa ESP32: Fix clobbered a9 in co-processor context save/restore
2016-12-17 11:00:12 -06:00
Gregory Nutt
8de1127899
Xtensa ESP32: Using wrong register to disable interrupts.
2016-12-17 11:00:12 -06:00
David Sidrane
ec85425041
STM32: Fix some STM32F7 copy paste errors
2016-12-17 08:31:12 -06:00
Gregory Nutt
38ebe6c13f
Xtensa ESP32: Change that should have been included in a previous commit was not.
2016-12-17 08:11:32 -06:00
Gregory Nutt
05e798488b
One register getting clobber on context save
2016-12-17 08:10:10 -06:00
Gregory Nutt
adbacfc42c
Xtensa ESP32: Fix a duplicate in Kconfig files. Level 1 should return via RFE.
2016-12-17 07:07:33 -06:00
Gregory Nutt
6599feb310
Xtensa ESP32: Fixes a few issue with restoring registers on interrupt return, but there is still a problem
2016-12-16 17:56:22 -06:00
Gregory Nutt
cdd8dc72a5
Xtensa ESP32: Basically a redesign of the interrupt dispatch logic.
2016-12-16 15:36:52 -06:00
Gregory Nutt
d4ad5f04d3
Xtensa ESP32: Minor rearchitecting of how CPU interrupts are enabled. MOre to come.
2016-12-16 14:13:09 -06:00
Gregory Nutt
cd3d414ba2
Xtensa: Fix some missing SMP logic
2016-12-16 13:37:28 -06:00
Gregory Nutt
34a994b0f6
Correct a logic problem the prevented dumping the IDLE thread's stack on an assertion
2016-12-16 13:21:01 -06:00
Gregory Nutt
6337fadd8c
Missing escape character on CR of CR-LF expansion.
2016-12-16 10:49:42 -06:00
Gregory Nutt
935e49f5bb
Update some comments
2016-12-16 09:38:08 -06:00
Gregory Nutt
f1a5b91cd8
Use r6, not r2 when passing paramters with call4
2016-12-16 09:21:44 -06:00
Gregory Nutt
41cf32a20e
Fix windowspill register handling + Use r6, not r2 when passing paramters with call4
2016-12-16 09:20:36 -06:00
Gregory Nutt
aa5a8b0ca2
Xtensa: Make sure that all C callable assembly functions includes ENTRY prologue and RET epilogue.
2016-12-15 14:02:19 -06:00
Gregory Nutt
c56268b416
Fix missing CALL0 ABI condition.
2016-12-15 11:06:41 -06:00
Gregory Nutt
ea9e6c48e4
Cosmetic update to comments.
2016-12-15 10:43:34 -06:00
Gregory Nutt
10b9a10d2f
Xtensa ESP32: Fix several build-related issues associated with vector section
2016-12-15 10:08:26 -06:00
Gregory Nutt
4795d58e03
Back out most of 46dbbe837e. The order is correct -- or, rather, the order is the same as the order that response data is provided. Change the order will break all other drivers.
2016-12-15 07:16:24 -06:00
Gregory Nutt
b5e979d58f
ESP32: Fix a couple of bugs associated with handling of CPU interrupts.
2016-12-14 13:31:44 -06:00
Gregory Nutt
4052ec2d90
Add missing ENTRY() and RET() macros in C callable assembly language. At one time I though the that the ESP32 support the CALL0 ABI. I was mistaken so there may be a few more like this.
2016-12-14 12:14:51 -06:00
Gregory Nutt
730ca4ce41
Fix missing semicolons in DEBUGASSERT statements
2016-12-14 09:06:09 -06:00
Angus Gratton
dd5e47a418
ESP32 core v2: Two changes (1) flushes the UART TX buffer in the esp32 serial shutdown routine. The ROM bootloader does not flush the FIFO before handing over to user code, so some of this output is not currently seen when the UART is reconfigured in early stages of startup. And changes the openocd config file's default flash voltage from 1.8V to 3.3V. This is not necessary right now, but may save some hard-to-debug moments down the track (3.3V-only flash running at 1.8V often half-works and does weird things...)
2016-12-14 08:15:03 -06:00
Gregory Nutt
f063e4c5ac
Remove Calypso architecture support and support for Calypso SERCOMM driver.
2016-12-13 18:35:52 -06:00
Gregory Nutt
c83da3c48f
Remove minnsh configurations and support logic: up_getc() and lowinstream.
...
This was an interesting exercise to see just how small you could get NuttX, but otherwise it was not useful: (1) the NSH code violated the OS interface layer by callup up_getc and up_putc directly, and (2) while waiting for character input, NSH would call up_getc() which would hog all of the CPU. NOt a reasonably solution other than as a proof of concept.
2016-12-13 18:01:23 -06:00
Gregory Nutt
26560cb9e1
i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept.
2016-12-13 16:59:50 -06:00
Frank Benkert
a36ed28790
SAMV7: MCAN: Prevent Interrupt-Flooding of ACKE when not connected to CAN-BUS. An Acknowledge-Error will occur every time no other CAN Node acknowledges the message sent. This will also occur if the device is not connected to the can-bus. The CAN-Standard declares, that the Chip has to retry a given message as long as it is not sent successfully (or it is not cancelled by the application). Every time the chip tries to resend the message an Acknowledge-Error-Interrupt is generated. At high baud rates this can lead in extremely high CPU load just for handling the interrupts (and possibly the error handling in the application). To prevent this Interrupt-Flooding we disable the ACKE once it is seen as long we didn't transfer at least one message successfully.
2016-12-13 11:22:54 -06:00
Gregory Nutt
edeee90c66
i.MX6 interrupt handling: Additional logic needed to handle nested interrupts when an interrupt stack is used
2016-12-13 10:04:38 -06:00
Gregory Nutt
113d8bdcca
Fix some SMP-related compilation errors
2016-12-09 17:10:59 -06:00
Gregory Nutt
70de0ee39f
Merge remote-tracking branch 'origin/master' into cancelpt
2016-12-09 14:42:48 -06:00
Gregory Nutt
8b81cf5c7e
Merged in david_s5/nuttx-3/david_s5/typo-in-stm32f76xx77xx_pinmaph-edited-on-1481298811328 (pull request #182 )
...
Typo in stm32f76xx77xx_pinmap.h edited online with Bitbucket
2016-12-09 10:54:39 -06:00
Alan Carvalho de Assis
35023e4c6d
LPC43xx SD card: Correct pin configuration options needed for SD card pins.
2016-12-09 10:54:17 -06:00
David Sidrane
64ae731c99
stm32_allocateheap.c edited online with Bitbucket
2016-12-09 16:35:35 +00:00
Gregory Nutt
018db84567
Flesh out more cancellation point logic.
2016-12-09 10:31:40 -06:00
David Sidrane
e7597d1754
Typo in stm32f76xx77xx_pinmap.h edited online with Bitbucket
2016-12-09 15:53:58 +00:00
David Sidrane
df9c5b33a0
Added STM32F469 RAM size and deliberated STM32F446 size
2016-12-09 05:02:31 -10:00
