Commit Graph

107 Commits

Author SHA1 Message Date
Dong Heng
bfb5214ef8 xtensa/esp32: Add SPI Flash hardware encryption I/O support 2020-11-13 08:37:59 +01:00
Sara Souza
8a1960fdf4 Documentation for Watchdog Timer Driver 2020-11-09 08:06:10 -08:00
Sara Souza
b9d44017cf xtensa/esp32: Watchdog support (MWDTs) 2020-11-08 13:05:24 -03:00
Alan C. Assis
816af60b77 xtensa/esp32: Include cache workaround to PSRAM 2020-11-07 12:08:02 +01:00
Abdelatif Guettouche
f052a9b1e6 baords/xtensa/esp32/esp32-core: Update all configs to add the new region
of memory.
2020-11-06 18:36:41 -03:00
Abdelatif Guettouche
2ac2ce55d2 arch/xtensa/src/esp32/esp32_allocateheap.c: Fix the memory regions with
regards to the data used by the ROM.
Static alloaction sections should end at the begining of the ROM data.
The rest of memory (End of ROM data --> End of DRAM) is added to the
heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-06 18:36:41 -03:00
Dong Heng
b54f0edff4 xtensa/esp32: Add Partition and OTA device 2020-11-03 21:54:07 +01:00
chao.an
b88561299b make/expression: improving up asm/C/C++ compile times
In the current compilation environment, the recursive assignment(=) for compile
flags will be delayed until every file is actually need to be compile.

For example:
--------------------------------------------------------------------------------
arch/arm/src/Makefile:

INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)common}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)$(ARCH_SUBDIR)}
INCLUDES += ${shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)sched}

CPPFLAGS += $(INCLUDES) $(EXTRAFLAGS)
CFLAGS += $(INCLUDES) $(EXTRAFLAGS)
CXXFLAGS += $(INCLUDES) $(EXTRAFLAGS)
AFLAGS += $(INCLUDES) $(EXTRAFLAGS)
--------------------------------------------------------------------------------

All compilation options will be included recursively,
which will be delayed until the compilation options are actually used:

tools/Config.mk:

--------------------------------------------------------------------------------
define COMPILE
  @echo "CC: $1"
  $(Q) $(CC) -c $(CFLAGS) $($(strip $1)_CFLAGS) $1 -o $2
endef
--------------------------------------------------------------------------------

All compile flags to be reexecuted $(INCDIR) as long as one file needs to be compiled,
but in fact, the compilation options have not changed in the current directory.

So the we recommand to change the syntax of assignment
From
    Recursive (=)
To
    Simple    (:=)

In this way, we can ensure that all compilation options are expanded only once and reducing repeated works.

Signed-off-by: chao.an <anchao@xiaomi.com>
2020-11-02 07:53:53 -08:00
Brennan Ashton
162da1169e CI: Store artifacts durring build
Add new option -A is added to tools/testbuild.sh that will take the
created build executable and store it in a folder for the config
that generated it under $ARTIFACTDIR which can be set via an
environment variable or defaulted to $(TOPDIR)/buildartifacts

This is also helpful for local testing because you can now run
tools/testbuild.sh -A sim.dat and have all of the simulation
targets generated without having to rebuild along the way.

In the GitHub Actions workflow the artifacs are uploaded
two two bundles one for macOS and one for Linux

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-10-28 11:32:21 -07:00
Sara Souza
ddc0d30063 xtensa/esp32: Added Userled support 2020-10-27 15:38:03 -03:00
YAMAMOTO Takashi
d8bee6769a esp32_flash.ld: Avoid having too many sections
Fixes an issue I saw when trying libcxx.

esptool.py has a limit of 16 sections.

It complains like:

    A fatal error occurred: Invalid segment count 23 (max 16).
    Usually this indicates a linker script problem.
2020-10-25 19:42:21 -07:00
Abdelatif Guettouche
9b98f20969 arch/xtensa: Fix the naming of the internal heap functions. They should
be prefixed by xtensa_ instead of up_.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
c91db9eb40 baords/xtensa/esp32/esp32-core: Refresh all the defconfigs
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
f0ae1dd54a arch/xtensa/src/esp32: Fix PR #1958 nxstyle issues.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
430e2d766d boards/xtensa/esp32/esp32-core/configs: When there is no PSRAM, only one
memory region is available.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
1b12d20225 arch/xtensa/src/esp32/esp32_spiflash.c&esp32_spi.c: Allocate a buffer from DRAM
when the given buffer is from PSRAM.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7ac5f7a35b arch/xtensa/src/esp32: Add a PROCFS entry for the internal memory
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
chenwen
67c0af650f xtensa/esp32: Add power management of deep-sleep 2020-10-17 19:38:14 -03:00
Alan C. Assis
fdc44dc6fc Add PSRAM board config test and update README 2020-10-17 20:02:43 +01:00
Dong Heng
a0b84ae53e xtensa/esp32: Add ESP32 WiFi adapter and driver 2020-10-17 22:46:27 +09:00
Sara Souza
0faf861256 xtensa/esp32: Added Timer Support 2020-10-07 14:12:22 -03:00
Abdelatif Guettouche
caa945cb24 arch/xtensa/src/esp32: Add a way to retrieve reset cause.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:51:47 -03:00
Abdelatif Guettouche
c20c8c6dd5 arch/xtensa/esp32: Implement system reset.
Both CPUs are soft-reset with a call to board_reset.  This is actually a
Core Reset, so both cores and all registers are reset.  The only
exception is RTC.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:51:47 -03:00
chenwen
64e2f102ac xtensa/esp32: Add power management of force-sleep 2020-09-20 17:23:07 +01:00
Abdelatif Guettouche
e90eee92d9 boards/xtensa/esp32/esp32-core/scripts/esp32.template.ld: Update the
linker script and correct some addresses.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 15:05:02 +08:00
Abdelatif Guettouche
f1b74fe421 boards/xtensa/esp32/esp32-core/scripts/esp32.template: Rename the file
to have it automatically syntax highlited in editors.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 15:05:02 +08:00
Abdelatif Guettouche
b1f851c987 boards/xtensa/esp32/esp32-core/scripts/Make.defs: Generate a map file
with a cross reference table.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 15:05:02 +08:00
Abdelatif Guettouche
7d1ac72b9b boards/Board.mk: Make the context target a double colon target and allow
other obards to extend it instead of relaying on a definition of a variable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 09:48:33 +08:00
Abdelatif Guettouche
53b975ff79 boards/xtensa/esp32/esp32-core: Add a defconfig example for the
SPIFlash.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Abdelatif Guettouche
d485ccc142 boards/xtensa/esp32/esp32-core: Support for the external FLASH.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Xiang Xiao
d1d8f2515d boards/esp32: Remove CONFIG_NFILE_STREAMS option
since it is removed in:
commit b0797263ca
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Thu Aug 13 18:17:29 2020 +0800

    libc/stdio: Allocate file_struct dynamically

    1.Reduce the default size of task_group_s(~512B each task)
    2.Scale better between simple and complex application

    Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
    Change-Id: Ia872137504fddcf64d89c48d6f0593d76d582710

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-11 20:47:41 +08:00
Xiang Xiao
b0797263ca libc/stdio: Allocate file_struct dynamically
1.Reduce the default size of task_group_s(~512B each task)
2.Scale better between simple and complex application

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia872137504fddcf64d89c48d6f0593d76d582710
2020-09-11 17:58:17 +08:00
Xiang Xiao
952af92690 sched/note: Move the circle buffer code to driver
so the format code can be shared by different transport

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-07 11:54:10 +08:00
Ouss4
41f432eb18 boards/xtensa/esp32/esp32-core: Add support for an MMCSD card over SPI. 2020-09-04 17:43:51 -03:00
Ouss4
8d32930d29 arch&boards/xtensa: Fix some typos, references to STM/ARM code and
change file headers where Gregory Nutt is the only author.
2020-08-27 05:48:55 -07:00
Alan C. Assis
52d7d0cb98 ESP32: Add board config to RNG driver 2020-08-23 08:26:10 -06:00
Alan C. Assis
4ded03a673 ESP32: Add support to RNG HW Driver 2020-08-23 08:26:10 -06:00
Alan C. Assis
4c31ada2ce Fix a small typo - reported by Greg Nutt 2020-08-22 09:54:16 -07:00
Alan Carvalho de Assis
4d0f05c340 Update to divide long URL across many lines
Co-authored-by: patacongo <spudarnia@yahoo.com>
2020-08-20 15:15:07 -06:00
Alan C. Assis
5b719daf69 Fix issues reported in the pull request and update defconfig 2020-08-20 15:15:07 -06:00
chenwen
1e9ef469dc xtensa/esp32: Add functions to switch CPU frequency from 80MHz to 240Mhz 2020-08-20 15:15:07 -06:00
Xiang Xiao
a0ce81d659 sched/wdog: Don't dynamically allocate wdog_s
to save the preserved space(1KB) and also avoid the heap overhead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I694073f68e1bd63960cedeea1ddec441437be025
2020-08-11 12:28:55 -06:00
Alin Jerpelea
b02b1663df boards: xtensa: esp32: update netnsh defconfig
In the commit
612acb9d93

the CONFIG_PREALLOC_MQ_MSGS is set by default to 4 and should be removed from defconfig.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-08-10 09:52:29 +01:00
Xiang Xiao
154852acb5 sched/mqueue: Reduce the initial memory consumption
Change the preallocated message and descriptor from 32/24 to 4.
The total size is reduce from 1892 to 532

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I79d199465daef678986868f773876289859f42fc
2020-08-10 08:07:50 +02:00
Masayuki Ishikawa
456c47643a boards: esp32-core: Fix CI errors in netnsh/defconfig
Summary
- This commit should fix CI errors

Impact
- No impact

Testing
- Build check only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-08-06 19:02:09 -07:00
Alan C. Assis
b815f4935c Add Ethernet netnsh board configuration example 2020-08-06 19:47:02 -03:00
Alan C. Assis
6ea7b29088 Add ESP32 Ethernet device driver
This driver was implemented by Dong Heng<dongheng@espressif.com>
and reviewed by Alan Carvalho de Assis
2020-08-06 23:35:16 +01:00
Xiang Xiao
e1d3627bb1 sched/wdog: Change the default value of MAX_WDOGPARMS from 4 to 2
since the maximum number of argument pass to wd_start in the whole
code base is 2 and change CONFIG_MAX_WDOGPARMS in some defconfig
from 1 to 2 oherwise pthread_condclockwait will fail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ib6cb28b8c0722058849e7be916e164513431d21c
2020-08-06 10:36:22 -06:00
Alan C. Assis
c06d3e1b0a xtensa/esp32: Add SPI Flash device driver
ESP32 runs code in a SPI Flash, so users can also use it to store
data directly or mount some parts into a filesystem.

The SPI Flash usually use SPI0.

This driver was implemented by Dong Heng dongheng@espressif.com
and modified to fix coding style by Alan Carvalho de Assis.
2020-07-31 23:37:30 +01:00
Xiang Xiao
b329e2377d boards: Move toolchain related variables to Toolchain.defs
1.It make sense to let Toolchain.defs give the default value
2.The board can still change if the default isn't suitable
3.Avoid the same definition spread more than 200 Make.defs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic2649f1c7689bcf59c105ca8db61cad45b6e0e64
2020-07-20 17:10:37 +01:00