Commit Graph

230 Commits

Author SHA1 Message Date
Alan C. Assis
099e9fb4f7 boards: Remove -nostartfiles -nodefaultlibs from LDFLAGS 2021-09-13 08:58:25 +08:00
Janne Rosberg
d361a9ded8 boards/icicle: add hwtest config
This config enables all peripherals and some tools.
Also useful for CI build check.
2021-09-11 23:33:01 +08:00
Sara Souza
acf18bd82d risc-v/esp32-c3: refactor the Wi-Fi board logic.
This commit moves the Wi-Fi initialization to
Wi-Fi specific file and to spiflash initialization.

It also reserves one partition for Wi-Fi use and for general use,
and makes it possible to me mounted by several FS.
2021-09-09 20:14:04 +08:00
Sara Souza
11068fad1b risc-v/esp32-c3: Enable the allocation of multiple MTD SPI Flash partitions 2021-09-09 20:14:04 +08:00
Gustavo Henrique Nihei
310a2dd0e4 tools/esp32c3: Create option for merging all binaries into a single file
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-08 12:16:52 +02:00
Alin Jerpelea
9d870e1502 defconfig: allow use of BSD components
several configs are used for testing and need the BSD components

more information about license can be found here
https://www.apache.org/legal/resolved.html#category-a

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-09-02 09:00:43 -03:00
Alin Jerpelea
2ab9e7fef0 Revert "esp32: remove FS_SPIFFS from defconfigs"
This reverts commit 35a004bdd0.
2021-09-02 09:00:43 -03:00
Alin Jerpelea
35a004bdd0 esp32: remove FS_SPIFFS from defconfigs
FS_SPIFFS uses BSD license and should not be enabled by default

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-30 22:39:04 +08:00
Xiang Xiao
e3ab1179fa board: Enable CONFIG_LIBCXXABI when CONFIG_LIBCXX is enabled
to avoid link libsupc++.a which is provided by toolchain

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-28 17:13:43 -03:00
Alin Jerpelea
a43650648e risc-V: remove ble defconfigs
By default the components with BSD license should be disabled

NOTE:
the BLUETOOTH components was enabled in a non bluetooth config

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-27 02:56:22 +08:00
Antti Vähälummukka
6eb73ced51 arch/risc-v/src/mpfs: Add CorePWM driver
Add a driver for CorePWM block, which can be instantiated on PolarFire SOC FPGA

This supports 2 CorePWM blocks on the FPGA. One CorePWM block provides 8 PWM output signals
2021-08-20 08:56:30 -03:00
Xiang Xiao
b12f588140 Rename CONFIG_LIB_BOARDCTL to CONFIG_BOARDCTL
since boardctl isn't a libc feature

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-06 13:58:26 +02:00
Xiang Xiao
5025fbef8d Rename LIB_ to LIBC_ for all libc Kconfig
follow other libc component naming convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-05 19:45:24 +02:00
Xiang Xiao
007adc7736 Replace all __attribute__((section(x)) with locate_data(x)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
jordi
b87333bae8 Kconfig: remove empty help sections
To avoid the setconfig warning: "has 'help' but empty help text"
2021-07-23 02:32:19 -07:00
Alan C. Assis
b9ec0063bc Remove duplicated Documentation of the bl602evb 2021-07-19 06:26:52 -07:00
Sara Souza
81e881c8c0 risc-v/esp32-c3: Makes output readable and rmv unnecessary var. 2021-07-16 19:53:04 -03:00
Virus.V
063e1d6b74 risc-v/bl602: update wifi firmware and some fixup.
1. Added check for repeated connection wifi operations.
2. Invoke the carrier on/off operation in the wrong place.
3. The RTC initialization time is incorrect.
4. Reserve 32K I-Cache space in the linker script.
5. Increase the size of the wifi firmware receiving buffer.

Signed-off-by: Virus.V <virusv@live.com>
2021-07-13 05:12:12 -07:00
Virus.V
4e950c3e30 risc-v/bl602: add boardctl support
Signed-off-by: Virus.V <virusv@live.com>
Change-Id: I74280f5cb801e923fb987009ae007aa02677b14d
2021-07-13 02:50:40 -07:00
Dong Heng
f5eaf82c93 risc-v/esp32c3: Use onexit to free thread private semaphore 2021-07-12 09:38:21 -03:00
Jiuzhu Dong
85470176e7 sched/task: delete CONFIG_MAX_TASKS limit
Change-Id: I583015a95dbcebd352f81ecb3104ffdbd646a9ec
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-07-11 19:42:30 -07:00
Dong Heng
d83caef2df boards/esp32c3-devkit: Support mounting SPI Flash MTD to littleFS 2021-07-08 09:01:43 -03:00
Dong Heng
2d6c1044fb boards/esp32c3-devkit: Fix compiling error
Add UID defconfig to check compiling error.
2021-07-07 02:49:52 -05:00
Xiang Xiao
f0961f43a6 boards/esp32c3-devkit: Add etctmp to .gitignore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-06 09:49:43 -05:00
chenwen
97b8e90d79 boards/esp32c3: Add romfs configuration 2021-07-06 05:25:14 -05:00
Dong Heng
475becac37 risc-v/esp32c3: Add board_ioctl and board_uniqueid 2021-07-05 23:12:17 -05:00
Nathan Hartman
ce20211357 Fix various typos in comments and documentation
Fix typos in these files:
    * Documentation/components/drivers/character/foc.rst
    * Documentation/guides/cpp_cmake.rst
    * Kconfig
    * arch/arm/src/imxrt/imxrt_lpspi.c
    * arch/arm/src/kinetis/kinetis_spi.c
    * arch/arm/src/kl/kl_spi.c
    * arch/arm/src/lpc31xx/lpc31_spi.c
    * arch/arm/src/nrf52/nrf52_radio.h
    * arch/arm/src/s32k1xx/s32k1xx_lpspi.c
    * arch/arm/src/stm32/Kconfig
    * arch/arm/src/stm32/stm32_adc.c
    * arch/arm/src/stm32/stm32_foc.c
    * arch/arm/src/stm32/stm32_foc.h
    * arch/arm/src/stm32/stm32_pwm.c
    * arch/arm/src/stm32/stm32_spi.c
    * arch/arm/src/stm32f0l0g0/stm32_spi.c
    * arch/arm/src/stm32f7/Kconfig
    * arch/arm/src/stm32f7/stm32_spi.c
    * arch/arm/src/stm32h7/Kconfig
    * arch/arm/src/stm32h7/stm32_allocateheap.c
    * arch/arm/src/stm32h7/stm32_fmc.c
    * arch/arm/src/stm32h7/stm32_fmc.h
    * arch/arm/src/stm32h7/stm32_pwm.c
    * arch/arm/src/stm32h7/stm32_qspi.c
    * arch/arm/src/stm32h7/stm32_spi.c
    * arch/arm/src/stm32l4/stm32l4_pwm.c
    * arch/arm/src/stm32l4/stm32l4_spi.c
    * arch/arm/src/stm32l5/Kconfig
    * arch/arm/src/stm32l5/stm32l5_spi.c
    * arch/renesas/src/rx65n/rx65n_dtc.c
    * arch/renesas/src/rx65n/rx65n_usbdev.c
    * arch/risc-v/src/rv32m1/rv32m1_serial.c
    * boards/arm/stm32/b-g431b-esc1/src/stm32_foc.c
    * boards/arm/stm32/nucleo-f103rb/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32/nucleo-f302r8/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32h7/nucleo-h743zi2/README.txt
    * boards/risc-v/rv32m1/rv32m1-vega/README.txt
    * boards/sim/sim/sim/scripts/Make.defs
    * drivers/1wire/1wire.c
    * drivers/1wire/1wire_internal.h
    * drivers/lcd/Kconfig
    * drivers/syslog/ramlog.c
    * fs/fat/Kconfig
    * libs/libc/debug/Kconfig
    * libs/libc/machine/Kconfig
    * libs/libc/stdio/lib_libvsprintf.c
    * libs/libc/stdlib/lib_div.c
    * libs/libc/stdlib/lib_ldiv.c
    * libs/libc/stdlib/lib_lldiv.c
    * libs/libdsp/lib_observer.c
2021-07-04 11:23:26 -05:00
Xiang Xiao
1b5341f6c0 boards/bl602: Fix uart_nx.c:419: undefined reference to `uart_bth4_register'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-01 05:01:21 -05:00
xiewenxiang
5fd3eca9c9 riscv/esp32c3: Support BLE sleep mode 2021-06-28 23:14:30 -05:00
xiewenxiang
145d917587 riscv/esp32c3: Add Wi-Fi and BLE coexist 2021-06-28 23:14:30 -05:00
xiewenxiang
8b96edc3a5 riscv/esp32c3: Add esp32c3 BLE driver 2021-06-28 23:14:30 -05:00
Virus.V
8452c571ec risc-v/bl602: BLE firmware adapts to the new framework
Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Virus.V
cd50650583 risc-v/bl602: Support AP and STA as independent network interface device
Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Abdelatif Guettouche
11ed8575cd boards/rsic-v/esp32c3: Use the common gnu-elf.ld file from binfmt/libelf
instead of keeping the same file for each board.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-24 08:04:14 -05:00
Abdelatif Guettouche
eb403bc996 boards/riscv/esp32c3: Rename the iram_0_2 segment to irom_0_0 to avoid
confusions.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-24 07:00:51 -05:00
Abdelatif Guettouche
60da4317b9 arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for
consistency.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Liu Han
2dd081ed7d risc-v/esp32c3: Support ESP32-C3 SHA accelerator 2021-06-21 02:41:53 -05:00
Abdelatif Guettouche
af5e0c620f Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 07:14:17 -05:00
Abdelatif Guettouche
f54804bafc arch/risc-v/esp32c3: Create a separate heap for the RTC memory.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
965a39a76d boards/risc-v/esp32c3-devkit: Include "config.h" in esp32c3_boot.c
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
bd0e03fecf boards/risc-v/esp32c3-devkit/esp32c3.ld: Add the RTC BSS section for
completeness.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
61f7bc6e2a boards/risc-v/esp32c3-devkit/scripts: Drop the "iram" in the name of the RTC
section.

The RTC region is accessed by both I and D buses.  The old name of
`rtc_iram_seg` is a bit confusing.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Liu Han
04c805207a risc-v/esp32c3: Support ESP32-C3 efuse 2021-06-16 09:35:09 -03:00
Liu Han
8eaaf6d462 risc-v/esp32c3: Support ESP32-C3 RSA accelerator 2021-06-14 15:03:11 -03:00
Eero Nurkkala
1bce864ef7 mpfs: add i2c driver
This adds mpfs i2c driver.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 21:03:42 -05:00
Eero Nurkkala
fad34e04c4 mpfs: add spi driver
This adds the SPI driver for the MPFS Icicle board.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 09:10:03 -05:00
Chen Wen
dbf9c87a42 risc-v/esp32c3: Support ESP32-C3 RTC driver 2021-06-10 09:33:04 -03:00
Xiang Xiao
5b2a17b892 Include assert.h in necessary place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-08 13:06:08 -07:00
unixjet
68f19a6290 risc-v/rv32m1: Basic port to rv32m1 ri5cy 2021-06-05 17:25:57 -03:00
Gustavo Henrique Nihei
0b3c2c7603 spi: Refactor SPI Slave interface prefix to sync with I2C Slave 2021-06-05 04:50:34 -07:00