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Author SHA1 Message Date
Xiang Xiao
e0b62bf677 arch/Toolchain.defs: Don't expand EXTRA_LIBS immediately 
since board's Make.defs may overwrite ARCHCPUFLAGS

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-30 11:04:35 +09:00
Peter Kalbus
61acceb1ca Detect host CPU on MacOS/Linux running on ARM. 2022-01-29 20:49:50 -03:00
David Sidrane
0f1342f36b stm32:Add OTG ID GPIO disable 2022-01-30 01:50:37 +08:00
David Sidrane
99083b8dd1 stm32{f|h}7:Fixed typo in Kconfig help 2022-01-30 01:49:57 +08:00
chao.an
8f166801c2 sim/sysview: add build config of Segger System View 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-01-29 17:26:04 +08:00
chao.an
8e31fa572a segger/RTT: hotfix for RTT compile warning 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-01-29 17:26:04 +08:00
chao.an
11f04e516a drivers/segger: download the RTT/SystemView from github 
RTT:
https://github.com/SEGGERMicro/RTT/archive/refs/tags/V7.54.zip

SystemView:
https://github.com/SEGGERMicro/SystemView/archive/refs/tags/V3.30.zip

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-01-29 17:26:04 +08:00
chao.an
3fc18d50b8 tools/nxstyle: add Segger System View prototype name into white list 
Reference:
https: //github.com/SEGGERMicro/SystemView/blob/master/SYSVIEW/SEGGER_SYSVIEW.h

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-01-29 17:26:04 +08:00
chao.an
e04ccba78a note/sysview: add Segger System View support 
Reference:
https://www.segger.com/products/development-tools/systemview
https://github.com/SEGGERMicro/SystemView
https://github.com/SEGGERMicro/RTT

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-01-29 17:26:04 +08:00
YAMAMOTO Takashi
794df92fc9 libs/libc/libc.csv: Add feof 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
82fdba5258 libs/libc/libc.csv: Add truncate 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
182575d240 libs/libc/libc.csv: Add localtime and ctime 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
0db6ac28d8 libs/libc/libc.csv: Add atoi and friends 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
4b183b93cf libs/libc/libc.csv: Add mktemp and its friends 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
113992c037 libs/libc/libc.csv: Add gettimeofday 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
5ebfb70427 libs/libc/libc.csv: Add pthread_cond_timedwait 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
741a1d2149 libs/libc/libc.csv: Add pthread_create 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
bbfd0667fc libs/libc/libc.csv: Add uname 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
ebbfa034c7 libs/libc/libc.csv: Add shutdown 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
a06cf25ab6 libs/libc/libc.csv: Add getaddrinfo and friends 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
1b7cb3ef63 libs/libc/libc.csv: Add dlfcn functions 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
f5fb4d4d98 libs/libc/libc.csv: Add strtoumax and strtoimax 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
0b8464419d libs/libc/libc.csv: Add ctype functions 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
ead9bf6481 libs/libc/libc.csv: Add ferror 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
c22e8c5427 libs/libc/libc.csv: Add rewind 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
c46bae4a4f libs/libc/libc.csv: Add _assert 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
26b077080b libs/libc/libc.csv: Add __stack_chk_fail 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
79b608ab19 add ssp.h 2022-01-29 01:04:23 +08:00
YAMAMOTO Takashi
b9e73ed8ba libs/libc/libc.csv: Add mallinfo and malloc_size 2022-01-29 01:04:23 +08:00
chao.an
7d8c2c1ad6 cortex-m/doirq: do not update the CURRENT_REGS on nested interrupt handling 
current implementation incorrectly update CURRENT_REGS to interrupt context if
trigger nested interrupt, (e.g, hard fault occurs during interrupt handling)
this would ambiguous for programs using CURRENT_REGS, this patch will prohibit
the update of CURRENT_REGS on nested interrupt handling

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-01-29 01:04:00 +08:00
ligd
d8c2610157 idle: remove heap & stack check in idle thread 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-01-29 00:53:47 +08:00
ligd
b316611ef0 Revert "sem: remove limitation of irq context when do sem_trywait" 
This reverts commit 7c547b3ebd.
 2022-01-29 00:53:47 +08:00
Xiang Xiao
1c2c0e4707 arch/Toolchain.defs: Simplify the builtin library addition for EXTRA_LIBS 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-28 12:02:38 +01:00
Alexander Lunev
b2f3cefe3d sim/netdev,tapdev: implemented emulation of TX done and RX ready interrupts 
and removed two tcp_send_txnotify() calls from tcp_sendfile (they are not needed anymore).

As a result, the TX throughput of both the tcp_send_buffered and tcp_send_unbuffered
is significantly boosted in case of TUN/TAP network device.
 2022-01-28 18:16:42 +08:00
YAMAMOTO Takashi
e596d5bd5e binfmt/libelf: Implement sh_addralign handling 
Basically, mirror the following two commits from modlib.
It's shame we have two copies of elf loaders.

```
commit 51490bad55
Author: YAMAMOTO Takashi <yamamoto@midokura.com>
Date:   Wed Apr 14 17:07:39 2021 +0900

    modlib: Implement sh_addralign handling

    I've seen a module with 16 bytes .rodata alignment for xmm operations.
    It was getting SEGV on sim/Linux because of the alignment issue.
    The same module binary seems working fine after applying this patch.

    Also, tested on sim/macOS and esp32 on qemu,
    using a module with an artificially large alignment. (64 bytes)
```

```
commit 418e11b8b3
Author: YAMAMOTO Takashi <yamamoto@midokura.com>
Date:   Thu Apr 15 11:33:48 2021 +0900

    modlib: Always use separate allocation for text and data

    Pros:

    * Reduce code differences
    * Smaller allocations for !CONFIG_ARCH_USE_MODULE_TEXT

    Cons:

    * Likely to use more memory for !CONFIG_ARCH_USE_MODULE_TEXT in total

    Tested with:

    * sim:module on macOS
    * esp32-devkit:nsh + CONFIG_MODULE on qemu
    * lm3s6965-ek:qemu-protected + CONFIG_EXAMPLES_SOTEST on qemu
```
 2022-01-28 16:23:23 +08:00
liucheng5
764fc7ef5e fix: sensor: ppg of dual- and quad-channel sensor types 
Some PPG devices have 4 ADCs to output quad-channel PPG values while some of them only have 2 ADCs to output dual-channel PPG.
To deal the case above, the type PPGD(PPG of Dual-channel) takes the place of former type PPG, which also have 2-channel PPG outputs. Type PPGQ (PPG of Quad-channel) is new for 4-ADC-PPG. Both types have contained new data "gain" to indicate ADC gains of each PPG channel, for the reason that the gains may vary during automatical optical adjustments.

Signed-off-by: liucheng5 <liucheng5@xiaomi.com>
 2022-01-28 14:07:46 +08:00
Gustavo Henrique Nihei
b0d24f53c4 xtensa: Add initial support for ESP32-S3 
Co-authored-by: Alan Carvalho de Assis <alan.carvalho@espressif.com>
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-27 13:46:50 -03:00
Fotis Panagiotopoulos
f8ba016d72 sim: Added Kconfig option for UART buffer size. 2022-01-27 17:15:17 +01:00
Petro Karashchenko
7b5af90565 tools/mkromfsimg.sh: add attribute to set minimum 4 bytes aignment for romfs image data 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-27 23:50:47 +08:00
Ville Juven
7c116efe05 Add support for a ROMFS image for MPFS 
The image must be placed into:
boards/risc-v/mpfs/icicle/include/boot_romfsimg.h

The image is mounted by mpfs_bringup, which is run by the application
itself, or by board_late_initialize() in the case when
CONFIG_BOARD_LATE_INITIALIZE is defined, e.g. with CONFIG_BUILD_KERNEL
 2022-01-27 11:06:43 -03:00
Gustavo Henrique Nihei
281ec4682f docker/linux: Add ESP32-S3 toolchain and binaries 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-27 10:01:17 -03:00
Petro Karashchenko
0ffffe19b1 typo: change evernt to event in comments 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-27 09:57:31 -03:00
zhuyanlin
6578461cc8 tcbinfo: add packet align to struct tcbinfo 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-27 17:36:27 +08:00
zhuyanlin
8f1c6ee7bc tools/jlink-nuttx: update tcbinfo follow nuttx arch tcbinfo_s 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-27 17:36:27 +08:00
Xiang Xiao
f903a55102 sched/tcbinfo: Fix the compile warning 
Update tcbinfo struct

armv8-m/arm_tcbinfo.c:109:3: warning: excess elements in struct initializer
  109 |   TCB_REG_OFF(REG_S31),
      |   ^~~~~~~~~~~
armv8-m/arm_tcbinfo.c:109:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:110:3: warning: excess elements in struct initializer
  110 |   0,
      |   ^
armv8-m/arm_tcbinfo.c:110:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:111:3: warning: excess elements in struct initializer
  111 |   TCB_REG_OFF(REG_FPSCR),
      |   ^~~~~~~~~~~
armv8-m/arm_tcbinfo.c:111:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:112:3: warning: excess elements in struct initializer
  112 |   0,
      |   ^
armv8-m/arm_tcbinfo.c:112:3: note: (near initialization for 'g_tcbinfo')
armv8-m/arm_tcbinfo.c:37:1: warning: missing braces around initializer [-Wmissing-braces]
   37 | {

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-27 17:36:27 +08:00
YAMAMOTO Takashi
dad4a7f8f7 symtab_findbyvalue: just retun NULL for NULL symtab 2022-01-27 10:23:37 +01:00
YAMAMOTO Takashi
0edb290951 symtab_findbyname: just retun NULL for NULL symtab 
The condition is not fatal at all.
It's better to let the caller handle the failure.
 2022-01-27 10:23:37 +01:00
Ville Juven
4bd1bd177b RISC-V MMU: Add missing implementation for PTE getter 
For some reason this was (mistakenly) left out from the patch
that was supposed to have it.
 2022-01-27 10:22:30 +01:00
zhuyanlin
644c2be3aa armv7-a/r:cache: implemention clean&flush_dcache_all 
For armv7-a/r cache:
And clean_dcache_all, flush_dcache_all

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-27 15:15:28 +08:00
zhuyanlin
1b08f607be arm/xtensa:cache: flush/clean dcache all if size large than cache size 
For performance, if size large than cache size, use xxx_all instead

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-27 15:15:28 +08:00