Commit Graph

15827 Commits

Author SHA1 Message Date
raiden00pl
02b418a7ea arch/arm/src/nrf52/CMakeLists.txt: format file 2024-02-18 07:40:41 -08:00
raiden00pl
b3b543e093 arch/nrf52: add initial support for IEEE 802.15.4
Supported features:

- frame transmition
- frame reception and filtering
- immediate ACK (incoming and outgoing)
- promiscuous mode
- delayed transmision
- radio events trace
- setting pending bit for all incoming Data Request frames
- un-slotted CSMA-CA

Work in progres features (some logic is present, but they require more work):

- beacon transmision (periodic transmition works, but requires verification)
- slotted CSMA-CA
- GTS

Fetures not implemented:

- enhanced ACK (Enh-ACK)
- enhanced beacon
- low power mode
- advanced features from IEEE 802.15.4e (DSME, TSCH)

Added examples for boards:

- nrf52832-dk: mrf24j40_6lowpan
- nrf52832-dk: mrf24j40_mac
- nrf52840-dk: ieee802154_6lowpan
- nrf52840-dk: ieee802154_mac
- nrf52840-dongle: ieee802154_mac
- nrf9160-dk-nrf52: ieee802154_6lowpan
- nrf9160-dk-nrf52: ieee802154_mac
2024-02-18 07:40:41 -08:00
raiden00pl
3f763f5d69 nrf52/nrf52_radio: various changes to support IEEE802154
- remove read-write logic - this should be handled by radio protocol implementation
- remove EVENTS and TASKS bit definitions - we can just use a signle definition
- add more radio ops
- fix frequency configuration
- fix printf warnings
- fix radio reset
2024-02-18 07:40:41 -08:00
raiden00pl
f4324e118e arch/nrf{52|53|91}: let the events from comparator correspond to CC id
this allows us to use the same value to set the comparator and handle comparator events,
making RTC easier to use
2024-02-17 05:00:35 -08:00
raiden00pl
a77c3b367a arch/nrf{52|53}/gpiote.c: fix event reconfiguration for a given pin
if a given pinset is already used, we need to update it, not add another event
2024-02-17 05:00:06 -08:00
raiden00pl
dbbe06193e arch/arm/src/nrf{52|53|91}/xxx_rtc.h: include nuttx/irq.h
fixes undefined xcpt_t error that sometimes occurs
2024-02-17 04:59:49 -08:00
Alan Carvalho de Assis
940f1bace0 arch/stm32h7: Clear all PWM channel when during STOP
I noticed when executing pwm STOP command in
multichannel mode, the channel still outputting.

This commit fixes this issue.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2024-02-15 21:27:22 -08:00
Alan Carvalho de Assis
5975b25951 arch/stm32f7: Clear all PWM channel when during STOP
I noticed when executing pwm STOP command in
multichannel mode, the channel still outputting.

This commit fixes this issue.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2024-02-15 21:27:22 -08:00
Alan Carvalho de Assis
6d346793ee arch/stm32: Clear all PWM channel when during STOP
I noticed when executing pwm STOP command in
multichannel mode, the channel still outputting.

This commit fixes this issue.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2024-02-15 21:27:22 -08:00
Nicolas Lemblé
4a85fbfd09 arch/xmc4: Fix CCU registers 2024-02-13 10:33:04 -03:00
Roberto Bucher
4a04c22147 STM32-H745 files for pysimCoder 2024-02-10 20:01:12 -03:00
trns1997
5c118967bb build xmc4800-relax using CMake 2024-02-10 10:20:59 -03:00
Michal Lenc
2849cd7c6d arch/samv7: add function to retrieve reset cause from HW
SAMv7 reset controller stores the cause of last reset (SW reset, power up,
pin reset etc.) in status register. This commit adds function that allows
the board to retrieve this information. This function should be called
from board support layer either during initialization or based on
incoming ioctl call.

Adding the sam_get_reset_cause() to sam_systemreset.c also resulted in
always compiling this file by default and only putting up_systemreset()
under CONFIG_SAMV7_SYSTEMRESET option.

Also header file sam_systemreset.h was created as it defines reset types
in comfortable manner for future processing in board layer. This is done
to avoid passing boardctl dependent structure to architecture layer.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-02-07 13:26:37 -03:00
Aaron Matlock
470ad35508 cmake: Fixed nucleo-u5a5zj-q 2024-02-07 03:20:43 -08:00
Rdk-T
7f01db30dc Add EtherCAT support on xmc4800-relax. 2024-02-05 22:23:30 -08:00
SPRESENSE
a303ec8653 arch: cxd56xx: Add new feature to use GNSS RAM
As long as the GNSS feature is not used, GNSS RAM can be used as general memory.
This memory is 640KByte total, which is lower performance than the application RAM.
It is possible to locate text, data and bss into GNSS RAM and to use as heap area.
2024-02-05 05:53:51 -08:00
SPRESENSE
fc5ae43dda arch: cxd56xx: Add function to control GNSS RAM clock
Add function to enable and disable GNSS RAM clock.
2024-02-05 05:53:51 -08:00
SPRESENSE
1b3b12ed00 arch: cxd56xx: update loader and gnssfw version
Update loader and gnssfw to version 2.2.20591
2024-02-05 05:53:51 -08:00
Adam Comley
399cd88e7f Support RP2040 Clock Outputs 2024-02-04 16:51:53 -08:00
Xiang Xiao
1e3914ec9d rptun: Remove the unused shmemname field and argument
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-02-04 09:54:05 +01:00
Xiang Xiao
6a6bd30500 rptun: Remove the empty implementation of get_firmware and get_addrenv
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-02-04 09:54:05 +01:00
Xiang Xiao
43d51cd4fc arch: Remove the identity mapping of up_addrenv_va_to_pa and up_addrenv_pa_to_va
and reuse the reuse the implementation from:
drivers/misc/addrenv.c

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-02-04 09:54:05 +01:00
Ville Juven
8e4b2e8a2a arch/arm_addrenv_pgmap.c: Add minimal page map implementation for ARM 2024-02-02 09:09:55 -08:00
raiden00pl
9d761b8ca4 arch/{nrf52|nrf53|nrf91}/tim.c: fix typo
fix offset for EVENT COMPARE0
2024-01-28 09:46:34 -08:00
ThomasNS
fff193324d xmc4 ccu4 register map 2024-01-27 20:14:02 -08:00
Takeyoshi Kikuchi
8571893435 arm: sama5: sam_serial: fix to compile with "UART Flow control enabled" on SAMA5D2.
SAMA5D2 has UART (TX/RX only) and FLEXCOM USART (with control pins).
UART has only TX/RX, so if I try to use flow control with FLEXCOM USART,
there is no register definition on the UART side and get a compilation error.

Signed-off-by: Takeyoshi Kikuchi <kikuchi@centurysys.co.jp>
2024-01-26 11:25:23 +08:00
Michal Lenc
addfa1c030 samv7: fix QSPI DMA option not showing in menuconfig
Commit 03e5c02 introduced option to have both standard SPI and QSPI
in SPI mode on one system. However this change broke the appearance of
QSPI driver configuration menu entry in menuconfig as it was dependent
on !SAMV7_QSPI_IS_SPI (which is now true for all MCUs having standard
SPI ability in QSPI driver).

This change makes sure the menu is correctly shown when QSPI driver
used.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-01-25 18:19:27 -08:00
Michal Lenc
fba4b2593c samv7: refactor DAC driver
This commit refactors DAC driver. The functionality remains the same
but driver start up is now done in dac_setup (after application called
open function) instead of sam_dac_initialize (called from BSP). This
ensures that driver does not take resources (timer, interrupt) until
opened. Implementation of dac_shutdown is also provided, therefore
the driver frees resources once closed.

This change is consistent with other drivers implementation.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-01-24 18:46:33 -08:00
Michal Lenc
55ec92e181 samv7: add support for SPI mode in USART peripheral
USART peripheral can work in SPI mode as well. This commit adds support
for such functionality. Only 1 slave device is supported by the
peripheral therefore board level does not have to ensure correct CS
setup.

The usage of the peripheral is the same as with other SPI drivers.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-01-23 17:16:35 -03:00
David Sidrane
6c186b6084 stm32h7:serial make TX DMA busy when there are an outstanding transaction
If a TX DMA completion interrups a forground write.
    The TX DMA completion can start a dma_send and it will
    then followed by the forground write's dma_send
    stoping the,then in progress DMA.

    By atomicaly marking the tx dma busy, the forground
    write will not perform the dma_send, and will only
    enqueue the data. At the next TX dma completion any
    data pending in the tx queue will be sent
2024-01-22 06:06:01 -08:00
ThomasNS
1c28bf2ed1 fix typo: it is P4.0 and not P0.4 2024-01-22 05:46:33 -08:00
Takeyoshi Kikuchi
bca8df7d65 arm: sama5: sam_ehci: fix transfer cancellation process.
The logic of the conditional expression that determines whether
the QH is a target QH or not is reversed in the process of canceling
a transfer in INPROGRESS state.

Therefore, the QH in INPROGRESS state is not released and subsequent
communication is not successful.

Checked with CDC-ACM driver and cu command.

Signed-off-by: Takeyoshi Kikuchi <kikuchi@centurysys.co.jp>
2024-01-20 19:54:26 -08:00
ThomasNS
e966fff597 add GPIO_U1C0_SCLKOUT_3 P4.0 for spi2 on xm4 2024-01-18 17:49:56 -08:00
Yanfeng Liu
1e9434e2db arch/: remove duplicated task exit logs
Newly added logging in `sched/task_exit.c` obsoletes the existing
ones in `arch/up_exit()`, thus remove the latter to reduce duplications.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-17 09:18:17 -08:00
chao an
45cca933f8 CMake: arm/armv8-r: init armv8-r cmake build
Test cmake build on aarch32 fvp:
$ cmake -B build -DBOARD_CONFIG=fvp-armv8r-aarch32/nsh -GNinja
$ cmake --build build

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 00:46:52 -08:00
chao an
7c89f943c0 armv8-r/perf: enable perf count only ARCH_PERF_EVENTS is enabled
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 00:46:52 -08:00
Yanfeng Liu
3c327efd2f docs/comments: fix some typos
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-15 13:22:13 +08:00
chao an
181a31801d arm/armv8r: remove unused serial_pl011.h
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-11 13:39:06 +01:00
chao an
b7bd2e33b1 arm/armv8-r: wfi secondary cores if SMP is disabled
Check cpu affinity in single core mode to avoid secondary cores bootup

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-11 12:29:59 +01:00
chao an
6e940b74f5 arm/fvp-v8r: fix arm_earlyserialinit() is not called correctly
USE_EARLYSERIALINIT will depends on the definition in arm_internal.h

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-11 00:52:17 -08:00
chao an
5eef09b4a1 arm/armv8-r: fix compile warning
armv8-r/arm_gicv3.c: In function 'gic_validate_dist_version':
armv8-r/arm_gicv3.c:730:9: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'uint32_t' {aka 'long unsigned int'} [-Wformat=]
  730 |   sinfo("GICD_TYPER = 0x%x\n", typer);
      |         ^~~~~~~~~~~~~~~~~~~~~  ~~~~~
      |                                |
      |                                uint32_t {aka long unsigned int}
armv8-r/arm_gicv3.c:730:26: note: format string is defined here
  730 |   sinfo("GICD_TYPER = 0x%x\n", typer);
      |                         ~^
      |                          |
      |                          unsigned int
      |                         %lx

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-11 00:51:28 -08:00
Philippe Leduc
e59c95bc9b Fix mx8mp ecspi interruption management. 2024-01-09 05:48:12 -08:00
Rodrigo Sim
21b02f176f stm32f401rc-rs485: Add rs-485 support 2024-01-07 17:15:59 -08:00
David Sidrane
73bfeccc3f imxrt:ENET Use multi PHY
Allow a board to specify a list of PHYs.
  Then use this list, at run-time, to select and use the
  PHY populated on the board.
2024-01-06 04:26:12 -08:00
TimJTi
438439c1a6 SAMA5 - add LCD backlight PWM cLock source selection 2024-01-05 12:56:27 -03:00
Bowen Wang
df3f95ee1f armv7a/qemu: add QEMU_TRUSTZONE config and default n
Add ARCH_CHIP_QEMU_TRUSTZONE to enable/disable the TrustZone
support beacause qemu also support enable/disable Arm Security
Extensions: https://qemu-project.gitlab.io/qemu/system/arm/virt.html
when launch.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-01-04 20:29:06 -08:00
yinshengkai
9d436b624b tools: support sorting symbol tables by name
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-01-04 09:22:57 -08:00
YAMAMOTO Takashi
fc53497ea2 arch/arm/src/cmake/Toolchain.cmake: fix inverted conditions for C++ features
Fix inverted CONFIG_CXX_EXCEPTION/CONFIG_CXX_RTTI checks.
2024-01-04 07:20:04 -08:00
Peter van der Perk
40f4cde8f5 armv7-m: Expose section name to allow relocation 2024-01-04 15:07:18 +01:00
Xiang Xiao
087c519dd6 arch/armv7-a: Change space to tab in arm_smccc.S
follow the coding style from other assembler source files

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-28 11:09:09 +08:00
Xiang Xiao
770d579630 arch/arm: Move arm_vectoraddrexcptn into arm_vectors.S
and remove arm_vectoraddrexcptn.S like other exception handler

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-28 11:09:09 +08:00
yinshengkai
9852428953 fs: procfs add poll support
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-12-26 19:23:13 -08:00
Peter van der Perk
0a41d040ac imxrt: flexio guard move lower to allow other drivers to it 2023-12-21 19:20:43 -03:00
Xiang Xiao
31a6ffa15c arm/sama5: Fix error: array subscript 0 is outside array bounds
chip/sam_emaca.c: In function 'sam_emac_interrupt':
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:140:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  140 | #define getreg32(a)    (*(volatile uint32_t *)(a))
      |                        ~^~~~~~~~~~~~~~~~~~~~~~~~~~
chip/sam_emaca.c:364:37: note: in expansion of macro 'getreg32'
  364 | #  define sam_getreg(priv,addr)     getreg32(addr)
      |                                     ^~~~~~~~
chip/sam_emaca.c:1630:9: note: in expansion of macro 'sam_getreg'
 1630 |   tsr = sam_getreg(priv, SAM_EMAC_TSR_OFFSET);
      |         ^~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
d54c79126a am335x_lcdc: Fix error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]'
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:51: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
chip/am335x_lcdc.c:387:3: note: in expansion of macro 'putreg32'
  387 |   putreg32(AM335X_CM_WKUP_CLKMODE_DPLL_DISP, 0x4);
      |   ^~~~~~~~
In function 'am335x_lcd_initialize':
cc1: note: source object is likely at address zero
In function 'am335x_set_refclk',
    inlined from 'am335x_lcd_initialize' at chip/am335x_lcdc.c:607:9:
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:51: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
chip/am335x_lcdc.c:430:3: note: in expansion of macro 'putreg32'
  430 |   putreg32(AM335X_CM_WKUP_CLKMODE_DPLL_DISP, 0x7);
      |   ^~~~~~~~
In function 'am335x_lcd_initialize':
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:780:3: note: in expansion of macro 'putreg32'
  780 |   putreg32(AM335X_LCD_CLKC_ENABLE,
      |   ^~~~~~~~
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:784:3: note: in expansion of macro 'putreg32'
  784 |   putreg32(AM335X_LCD_CLKC_RESET, LCD_CLKC_RESET_MAIN);
      |   ^~~~~~~~
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:790:3: note: in expansion of macro 'putreg32'
  790 |   putreg32(AM335X_LCD_IRQ_EN_SET, regval);
      |   ^~~~~~~~
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:796:3: note: in expansion of macro 'putreg32'
  796 |   putreg32(AM335X_LCD_SYSC, LCD_SYSC_IDLE_SMART | LCD_SYSC_STANDBY_SMART);
      |   ^~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
e42780bb0f arch/arm: Disable -Warray-bound for rp2040, dm320 and lpc31xx
since gcc report the false alarm if the pointer offset from zero address:
    inlined from 'up_vectormapping' at chip/dm320_boot.c:162:7,
    inlined from 'arm_boot' at chip/dm320_boot.c:211:3:
Error: chip/dm320_boot.c:117:17: error: array subscript 0 is outside array bounds of 'uint32_t[0]' {aka 'long unsigned int[]'} [-Werror=array-bounds=]
  117 |   ctable[index] = (paddr | mmuflags);
      |   ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
1e696425fd lpc43xx/usb: Fix gcc13.2 compiler error
Error: arch/arm/src/common/arm_internal.h:140:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  140 | #define getreg32(a)    (*(volatile uint32_t *)(a))
      |                        ~^~~~~~~~~~~~~~~~~~~~~~~~~~
chip/lpc43_usb0dev.c:347:34: note: in expansion of macro 'getreg32'
  347 | #  define lpc43_getreg(addr)     getreg32(addr)
      |                                  ^~~~~~~~
chip/lpc43_usb0dev.c:2605:15: note: in expansion of macro 'lpc43_getreg'
 2605 |   return (int)lpc43_getreg(LPC43_USBDEV_FRINDEX_OFFSET);
      |               ^~~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
anjiahao
6c4b30736e arm/debug:fix gdbstub clear fpb & dwt when already use jtag/swo bug
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-18 08:47:56 +01:00
Zhe Weng
5aeb15469a netdev/ipv6: Move xxx_ipv6multicast from arch to common code
The `xxx_ipv6multicast` function in each driver is not adapted to
multiple IPv6 addresses yet, and they're redundant, so try to take them
into common code.

Change:
1. Add MAC `g_ipv6_ethallnodes` and `g_ipv6_ethallrouters` in
   `icmpv6_devinit` and call them in `netdev_register`
2. Add multicast MAC for Neighbor Solicitation when adding any IPv6
   address, and remove them when IPv6 address is removed
3. Select `NET_MCASTGROUP` when `NET_ICMPv6` because now we need
   `d_addmac` when we have ICMPv6

Note:
We want modules outside net stack to call functions like
`netdev_ipv6_add` and never touch the related MAC address, so these MAC
functions are added as internal functions to `net/netdev/netdev.h`

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2023-12-16 05:26:16 -08:00
simbit18
c494ce4a96 Update kconfig2html.c
Fix nuttx coding style
2023-12-14 20:02:52 -08:00
Peter van der Perk
7730201689 imxrt: Extend FlexIO support to 117x 2023-12-14 03:59:36 -08:00
GD32-MCU
9a2569882e fix bug in gd32f4xx_serial.c, add romfsimg.h, gd32f4xx_reset and improve gd32f4xx_gpio.c for f470z board, add board decription for f470
add gd32f470 picture
2023-12-13 23:27:23 -08:00
simbit18
9d50d180b1 Fix nuttx coding style
Remove spaces
Remove extra */
2023-12-13 17:29:08 +01:00
Xiang Xiao
ca5a9c711a Remove @ and % tag from all comments
and format the multiple line comments

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-11 17:00:10 -03:00
anjiahao
bb0a706bdc arch/arm:add up_debugpoint api
on armv8-m/armv7-m,implement breakpoint & watchpoint using FBP & DWT

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 08:43:26 -08:00
anjiahao
94d449e722 arch:Mark key functions to prohibit instrumentation to prevent recursive calls
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 02:06:51 -08:00
anjiahao
7dfbd14eba libc: add instrument api support
Add registration function instrumentation API,
which can achieve instrumentation of entering and
exiting functions through the compiler's functionality.

We can use CONFIG_ARCH_INSTRUMENT_ALL to add instrumentation for all
source, or add '-finstrument-functions' to CFLAGS for Part of the
source.

Notice:
1. use CONFIG_ARCH_INSTRUMENT_ALL must mark _start or entry noinstrument_function,
   becuase bss not set.
2. Make sure your callbacks are not instrumented recursively.

use instrument_register to register entry function and exit function.
They will be called by the instrumented function

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 02:06:51 -08:00
Mete Balci
2215278a53 stm32u5: fix EXTICR2,3,4 register offsets 2023-12-11 10:42:09 +01:00
simbit18
3442af4a19 Fix Kconfig style
Remove extra TABs
Add comments
2023-12-09 13:44:46 -08:00
bertrand
0ca8ae81d0 invert tx and rx in spi_dma_setup
remove indent sam_spi.c

removed indent
2023-12-08 19:50:49 -08:00
Petteri Aimonen
dedb563322 usbdev: Add architecture calls to usbdev_sof_irq() 2023-12-08 21:27:36 -03:00
Anthony Merlino
962ac35170 stm32h7_adc: Dynamically set clock prescaler and BOOST setting.
The ADC peripheral can only support up to
    50MHz on rev V silicon and 36MHz on Y silicon.
    The existing driver always used no prescaler
    and kept boost setting at 0.
2023-12-07 03:50:40 -08:00
David Sidrane
d31214aa25 stm32h7:ADC STM32_RCC_D3CCIPR_ADCSEL->STM32_RCC_D3CCIPR_ADCSRC 2023-12-07 03:50:40 -08:00
David Sidrane
6ad7b82cd6 imxrt:Serial refactor out tx dma semaphore 2023-12-07 03:48:19 -08:00
David Sidrane
a81b36394e imxrt:edma Add idle chack 2023-12-07 03:48:19 -08:00
David Sidrane
cc632ea789 imxrt:edma clear state before callback 2023-12-07 03:48:19 -08:00
David Sidrane
b0e31c7d72 s32k3xx:Serial Use smart invalidate 2023-12-07 03:48:19 -08:00
David Sidrane
05e620d12b imxrt:Serial Use smart invalidate 2023-12-07 03:48:19 -08:00
David Sidrane
982e3e01f0 imxrt:gpio disable imxrt_gpio_select for the 1170
The 1170 usage of the GPR registers is to select the
   between GPIO{2|3} or CM7_GPIO{2|3} where as the 1060
   it selected ports between 1-6,2-7..4-9 and uses
   different GPR registers.

   For the 1170 we are defaulting to GPIO{2|3} and not
   supporting the swtich to CM7_GPIO{2|3}.
2023-12-07 03:48:19 -08:00
Peter van der Perk
9906163beb Base IMXRT1170 port
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>

Co-authored-by: David Sidrane <david.sidrane@nscdg.com>

Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>

imxrt:Kconfig fix formatting

imxrt:usbphy move IMXRT_USBPHY{1|[2]}_BASE to memory map

imxrt:lpspi Fix build breakage from adding 1170

imxrt:Finish 1170 iomux and clockconfig versioning

imxrt:Remove duplicate imxrt_clock{off|all}_lpi2c4

imxrt:pmu remove duplicate dcd non 117x header

imxrt:lpspi Fix unused var warnings

imxrt:lpi2c Fix unused var warnings

imxrt:lowputs Fix unused var warnings

imxrt:imxrt117x_dmamux fix duplicate entries

imxtr:serial Use IOMUX_PULL_{UP|DOWN} and map IOMUX V1 to them

imxrt:MPU Support the 1170

imxrt:dmamux Alias IMXRT_DMAMUX0_BASE as IMXRT_DMAMUX_BASE

imx1170:ccm Alias CCM_CCGR_DMA & CCM_CCGR_SNVS_LP for compatiblity

Author: Peter van der Perk <peter.vanderperk@nxp.com>

IMXRT7 Add LPUART 9/10/11/12 support

Author: David Sidrane <david.sidrane@nscdg.com>

imxrt:1170pinmux Add QTIMER pins

imxrt:1170pinmux Add GPT pins

imxrt:1170pinmux Add FLEXPWM pins

imxrt1170:pinmap Add GPIO_ENET_1G pinning

imxrt:enet Support ENET_1G

imxrt:periphclks rt1170 does not have canX_serial clock

imxrt:flexcan:Layer imxrt_ioctl

imxrt117x:memorymap added CAN3

imxrt:ADC support ver1 and ver2 for imxrt117x

imxrt:imxrt117x_ccm Align timer naming with other imxrt QTIMERn->TIMERn

imxrt:imxrt117x_ccm align CCM names with rt106x

imxrt:XBAR support larger number of selects needed on imxrt1170

Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>

FlexSPI AHB Region support, PIT rename for compatiblity

imxrt:USB Analog add VBUS_VALID_3V

FlexSPI expand prefetch registers for IMXRT117X

imxrt:Support Initialization of FlexRam without Running from OCRAM

imxrt: ocotp add UNIQUE_ID register definition

imxrt: enet use ocotp unique_id

imxrt: enet fixes for imxrt117x

imxrt: ethernet pinmux sion enable

imxrt:imxrt_periphclk_configure add memory sync

   Flush the pipeline to prevent bus faults, by insuring a
   peripheral is clocked before being accessed on return from
   this function.

imxrt:Restructure gpioN to padmux mapping

imxrt:Add imxrt1170 daisy

imxrt: correct power modes for imxrt117x fixing hang on WFI

imxrt: imxrt117x TCM MPU config

imxrt: FlexRAM clocking DIV0 setup

imxrt: 117x periphclocks wait for status bit

imxrt: iomucx set pad settings correctly and allow reconfiguration

imxrt: enet align buffers 64-byte for optimal performance

Add DSC barriers for write-through cache support

imxrt: imxrt1170 use FlexCAN FD/ECC features

imxrt:iomuxc_ver2 (117x) SD_B1 and DISP_B1 use PULL feild not PUE/PUS

imxrt:Fix 1170 SNVS addressing

imxrt: enet set mii clock after ifdown so that phy keep working

nxstyle fixes

imxrt: preprocessor and include fixes

Fix configs

imxrt1170-evk clean defconfig
2023-12-07 03:48:19 -08:00
David Sidrane
e1a9e8fa53 stm32h7:serial Remove .txdmasem = SEM_INITIALIZER(1) from cherry pick 2023-12-06 21:12:01 +01:00
chao an
a3eb42f469 cmake: split extra library from library group
Signed-off-by: chao an <anchao@xiaomi.com>
2023-12-06 07:56:17 -08:00
David Sidrane
f92a9068dc stm32h7:Serial refactor out tx dma semaphore
Fixes is stuttering output.

   The use of the semaphore was causing blocking
   on non blocking callers. This ensured that
   the TX DAM would be restated, but when it
   was switched to trywait in 660ac6, it left
   data in the xmit queue unsent.

   This solution removes the semaphore and restart
   the DMA on completion if there is more data in
   the xmit queue to be sent.
2023-12-05 08:20:10 -08:00
Michal Lenc
7f4cf11064 samv7/sam_emac.c: fix compile error with unknown structure member
chip/sam_emac.c:3754:11: error: 'struct sam_emac_s' has no member
named 'phytype'
 3754 |   if (priv->phytype == SAMV7_PHY_KSZ8061)
      |           ^~
make[3]: *** [Makefile:167: sam_emac.o] Error 1

Member phytype is available only if CONFIG_NETDEV_PHY_IOCTL and
CONFIG_ARCH_PHY_INTERRUPT is set.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-12-05 08:19:30 -08:00
David Sidrane
9175f3a9b6 s32k3xx:Serial refactor out tx dma semaphore
Fixes stuttering output.

  The use of the semaphore was causing blocking
  on non blocking callers. This ensured that
  the TX DAM would be restated, but when it
  was switched to trywait in 8362e314, it left
  data in the xmit queue unsent.

  This solution removes the semaphore and restart
  the DMA on completion if there is more data in
  the xmit queue to be sent.
2023-12-05 08:17:42 -08:00
David Sidrane
7f0643de6d s32k3xx:edma clear state before callback add idle check
This prevents dma stop operations called of a completion
   call back from rentering, the callback and ensures that
   the call back will see the idle state.
2023-12-05 08:17:42 -08:00
simbit18
ccc0c54401 Fix Kconfig style
Remove extra TABs
Remove spaces from Kconfig
Add comments
2023-12-04 22:20:50 +08:00
Petro Karashchenko
a3cd8f921a arch/arm/samv7/sam_emac: Implement errata workaround for KSZ8061 PHY
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-12-04 00:37:43 -08:00
Xiang Xiao
6783051aed Fix the wrong comment banner
"Private Type"->"Private Types"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-03 17:50:35 +01:00
raiden00pl
95ac627d59 arch/nrf{52|53|91}: add missing support for 1 Mbps UART baud 2023-12-02 19:40:09 -08:00
chao an
88dd492e4d arm/clang: clang must depends on the implementation of the math library
Since picolibc used by clang-17 does not provide an implementation of libm,
if you want to use clang, please must specify a libm as an option.

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-29 03:58:05 -08:00
chao an
0bf9e5eb8d armv6-m/dumpnvic: fix build warning
armv6-m/arm_dumpnvic.c: In function 'arm_dumpnvic':
armv6-m/arm_dumpnvic.c:67:13: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'uint32_t' {aka 'long unsigned int'} [-Wformat=]
   67 |       _info("   IPR%d: %08x  IPR%d: %08x  IPR%d: %08x  IPR%d: %08x\n",
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
armv6-m/arm_dumpnvic.c:67:27: note: format string is defined here
   67 |       _info("   IPR%d: %08x  IPR%d: %08x  IPR%d: %08x  IPR%d: %08x\n",
      |                        ~~~^
      |                           |
      |                           unsigned int
      |                        %08lx

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-29 03:58:05 -08:00
chao an
27bfdf68ae stm32/ethernet: fix build warning
chip/stm32_ethernet.c:2014:7: warning: variable 'i' set but not used [-Wunused-but-set-variable]
 2014 |   int i;
      |       ^
1 warning generated.

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-29 03:58:05 -08:00
chao an
1ce1a19afd arm/clang: replace deprecated parameter
In LLVM Clang 17.0.1, the `--config` parameter has been deprecated and replaced by the `-target` parameter

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-29 03:58:05 -08:00
yaojingwei
a57e3f365a video.c: modify set_buf call seqence in start_capture function.
To avoid losing the first frame, the set_buf needs to excute first. At the same time, imgdata->start_capture should excuted before the imgsensor->start_capture.

Signed-off-by: yaojingwei <yaojingwei@xiaomi.com>
2023-11-29 02:01:34 -08:00
chao an
e560111dbb tiva/sock_can: correct mutex lock cycle
Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-22 01:57:44 -08:00
anjiahao
749655d785 tcbinfo:remove total_num form tcbinfo.
total_num is not required
test:

make -f tools/Makefile.host
cp tools/jlink-nuttx /opt/SEGGER/JLink_V786a/libnuttxplugin.so
JLinkGDBServer -if SWD -speed 5000 -device STM32F429ZI -NoGui 1 -rtos libnuttxplugin

can run normally

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-11-21 21:52:24 -08:00
hujun5
1a65f5ed88 sched_lock refine: remove sched_[un]lock in xxx_waitsample
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-11-21 20:03:43 -08:00
Xiang Xiao
eddd90de78 poll: pollsetup should notify only one fd passd by caller
since it's redundant to iterate the whole fds array in setup

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-11-21 09:07:17 +01:00
bertrand
f5374e71f3 Fix compilation and fix SAM_DMAC_CHINTENCLR settings 2023-11-18 18:39:30 -03:00
Petteri Aimonen
2cf56e0fb3 stm32: Add support for Ethernet packet timestamping and PTP timer
Adds support for hardware timestamping of received Ethernet packets.
The timestamp is available to applications using socket option SO_TIMESTAMP.

Optionally, the Ethernet PTP timer can be used as system high-resolution RTC.
In this mode it supports fine resolution rate adjustment.

Alternatively other time source for CLOCK_REALTIME can be used, and the
PTP timestamps are converted by sampling the clocks and computing the
difference. This results in a few microseconds of uncertainty.
2023-11-18 03:10:45 -08:00
raiden00pl
42211cc1c3 nrf91: initial support for GNSS (GPS only for now) 2023-11-16 20:32:41 -08:00
raiden00pl
d38bf3ff2d nrf91/nrf91_modem.c: configure system mode 2023-11-16 20:32:41 -08:00
raiden00pl
18cf6aef16 nrf91/nrf91_modem.c: add support for board-specific modem configuration
this can be used to configure an antenna that is specific to a given board
2023-11-16 20:32:41 -08:00
raiden00pl
4b6213adef nrf91/nrf91_modem_sock.c: fix printf warnings 2023-11-16 20:32:41 -08:00
Xiang Xiao
5ca3e805b2 arch/imx6: Replace cpu_start_t with start_t
avoid the unnecessary typedef

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-11-16 14:35:48 +09:00
chao an
64cf63475c arch/dumponexit: unify dump on exit to common code
remove arch implement and move to common code

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-15 08:28:25 -08:00
raiden00pl
e1b947cd52 stm32/stm32_foc.c: rename some macros
change the names to be the same as for stm32f7/stm32_foc.c
2023-11-15 03:44:17 -08:00
Petteri Aimonen
6dabcd567e stm32/samv7: Update SysTick drivers to new up_adjtime() API. 2023-11-14 19:47:40 -08:00
raiden00pl
7d99f01cf7 drivers/foc: get hardware information via lower-half interface 2023-11-14 04:34:49 -08:00
raiden00pl
0e40cc2853 stm32/stm32_adc.c: protect irq_attach with refcounter
irq_attach should only be called once for ADCs that share a common interrupt handler.
We can move irq_attach to just before interrupts are enabled.
2023-11-13 21:03:36 -03:00
raiden00pl
225d5bba6e stm32/foc: add support for board-specific ioctl 2023-11-13 08:40:11 -08:00
Xiang Xiao
459f8235e4 arch/arm: Let's old arm's arm_doirq return register context like armv7-a
and remove the duplicated arm_doirq and arm_ack_irq prototype

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-11-13 11:41:56 +01:00
Takumi Ando
c076cb1bef rp2040: pwm: Fix errors at CONFIG_PWM_NCHANNELS=1
Perhaps it has never been tested with CONFIG_PWM_NCHANNELS=1.

Signed-off-by: Takumi Ando <t-ando@advaly.co.jp>
2023-11-13 11:40:22 +01:00
Xiang Xiao
122558a1de arch/armv8-m: Fix typo error for NVIC_SYSHCON_HARDFAULTPENDED
and the comment too

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-11-10 15:44:03 -03:00
David Sidrane
a92bd5d081 s32k1xx:Serial Do not wait on TXDMA semaphore
If using flow control with a high CTS the thread may be
    blocked forever on the second transmit attempt due to waiting
    on the txdma semaphore.  The calling thread can then never
    make progress and release any resources it has taken, thus
    may cause a deadlock in other parts of the system.

    The implementation differs in behavior from interrupt-driven
    TX. It should not implicitly wait on a taken semaphore but
    return immediately and let the upper layers decide on what to
    do next.
2023-11-10 22:30:41 +08:00
David Sidrane
8362e3147e s32k3xx:Serial Do not wait on TXDMA semaphore
If using flow control with a high CTS the thread may be
    blocked forever on the second transmit attempt due to waiting
    on the txdma semaphore.  The calling thread can then never
    make progress and release any resources it has taken, thus
    may cause a deadlock in other parts of the system.

    The implementation differs in behavior from interrupt-driven
    TX. It should not implicitly wait on a taken semaphore but
    return immediately and let the upper layers decide on what to
    do next.
2023-11-10 22:30:41 +08:00
David Sidrane
54b4cd3bf3 imxrt:Serial Do not wait on TXDMA semaphore
If using flow control with a high CTS the thread may be
    blocked forever on the second transmit attempt due to waiting
    on the txdma semaphore.  The calling thread can then never
    make progress and release any resources it has taken, thus
    may cause a deadlock in other parts of the system.

    The implementation differs in behavior from interrupt-driven
    TX. It should not implicitly wait on a taken semaphore but
    return immediately and let the upper layers decide on what to
    do next.
2023-11-10 22:30:41 +08:00
Janne Rosberg
03064b9701 sama5: add support for QSPI 2023-11-08 21:58:02 +01:00
Janne Rosberg
0f5cea7322 sama5/sam_dmac: add define for DMACH_FLAG_PERIPHISMEMORY 2023-11-08 21:58:02 +01:00
Niklas Hauser
660ac63b92 stm32h7/serial: Do not wait on TXDMA semaphore
If using flow control with a high CTS the thread may be blocked forever
on the second transmit attempt due to waiting on the txdma semaphore.
The calling thread can then never make progress and release any
resources it has taken, thus may cause a deadlock in other parts of the
system.

The implementation differs in behavior from interrupt-driven TX and the
STM32F7 TXDMA . It should not implicitly wait on a taken semaphore but
return immediately and let the upper layers decide on what to do next.
2023-11-08 12:52:30 -05:00
simbit18
8fa6a29503 Fix Kconfig style
Remove extra TABs
Remove spaces from Kconfig
Add comments
2023-11-08 22:58:26 +08:00
zhanghongyu
fbd0b3d1d7 cmake: move NUTTX_CHIP_ABS_DIR before common src
Some APIs are implemented both in common code and CHIP-specific code,
and the link needs to be based on the implementation in CHIP, so move
NUTTX_CHIP_ABS_DIR before common src.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2023-11-07 17:39:03 +01:00
raiden00pl
24c7e355d9 arch/stm32: remove unused STM32_UART_RXDMA and STM32_UART_TXDMA flags
These flags are not used in the code.
SERIAL_HAVE_RXDMA and SERIAL_HAVE_TXDMA flags are used instead.

STM32_UART_TXDMA flag is not even defined in Kconfig
2023-11-03 22:24:31 +08:00
raiden00pl
3220a59a3e arch/stm32: STM32_FOC_G4_ADCCHAN0_WORKAROUND depend on STM32G4 2023-11-03 22:24:31 +08:00
SPRESENSE
2f5bb9200a arch: cxd56xx: Support to get gnss firmware version
Support to get gnss firmware version and fix typo.
2023-11-03 09:23:57 +01:00
David Sidrane
e0c883f487 s32k3xxx:serial ensure the cache is updated if the DMA has updated again 2023-11-01 09:24:57 +08:00
Gabriel de Sousa
0bc897df15 FIX: s32kxxx flexcan doesn't set srr bit for extended frames 2023-10-31 12:22:00 -03:00
SPRESENSE
ed5785ad06 arch: cxd56xx: Update gnss header files
- Add some ioctl commands to get version, sleep, wakeup and reset.
- Add new data structures for CXD5610 GNSS Add-on board.
2023-10-31 09:18:18 +01:00
raiden00pl
5b87fdfb9d Documentation: remove all migrated READMEs 2023-10-29 21:03:54 -03:00
TimJTi
bfa14406d6 SAMA5D2 add new mcan ioctls 2023-10-28 15:21:46 +08:00
SPRESENSE
f3fabc5d32 Revert "make/archive: Use the full path name when matching or storing names in the archive"
This reverts commit 563125fde3.
2023-10-27 22:26:18 +08:00
David Sidrane
881d67272c s32k3xx:Serial overcome race where DMA has not fetched TCD again"
With TCD set to loop, there is a window where the
   DMA has raised Done, but not reloaded the TCD, resetting
   count and clearing Done.

   In this window  imxrt_dmach_getcount could then return 0.
   Resulting in imxrt_dma_nextrx returning RXDMA_BUFFER_SIZE.
   Which is not a valid index in the FIFO.

   Since the count will be set to RXDMA_BUFFER_SIZE. When the DMA
   engine completes the TCD reload. The imxrt_dma_nextrx would
   return 0. Therefore:

    (RXDMA_BUFFER_SIZE - dmaresidual) % RXDMA_BUFFER_SIZE

   accomplishes this.
2023-10-27 22:24:27 +08:00
David Sidrane
8b9d05d0f7 s32k1xx:Serial overcome race where DMA has not fetched TCD again"
With TCD set to loop, there is a window where the
   DMA has raised Done, but not reloaded the TCD, resetting
   count and clearing Done.

   In this window  imxrt_dmach_getcount could then return 0.
   Resulting in imxrt_dma_nextrx returning RXDMA_BUFFER_SIZE.
   Which is not a valid index in the FIFO.

   Since the count will be set to RXDMA_BUFFER_SIZE. When the DMA
   engine completes the TCD reload. The imxrt_dma_nextrx would
   return 0. Therefore:

    (RXDMA_BUFFER_SIZE - dmaresidual) % RXDMA_BUFFER_SIZE

   accomplishes this.
2023-10-27 22:24:27 +08:00
David Sidrane
892fe45900 imxrt:Serial overcome race where DMA has not fetched TCD again"
With TCD set to loop, there is a window where the
   DMA has raised Done, but not reloaded the TCD, resetting
   count and clearing Done.

   In this window  imxrt_dmach_getcount could then return 0.
   Resulting in imxrt_dma_nextrx returning RXDMA_BUFFER_SIZE.
   Which is not a valid index in the FIFO.

   Since the count will be set to RXDMA_BUFFER_SIZE. When the DMA
   engine completes the TCD reload. The imxrt_dma_nextrx would
   return 0. Therefore:

    (RXDMA_BUFFER_SIZE - dmaresidual) % RXDMA_BUFFER_SIZE

   accomplishes this.
2023-10-27 22:24:27 +08:00
Robert Middleton
c50d47136c Fix #11005 2023-10-27 11:44:44 +08:00
simbit18
37729540c0 Fix Kconfig style
Remove spaces from Kconfig
Add comments
2023-10-26 01:53:58 +08:00
simbit18
fa7d0bbd45 Fix nuttx coding style
Remove TABs
2023-10-26 01:53:48 +08:00
David Sidrane
def7a34733 s32k1xx:lpi2c DMA transaction only need the status conditioned
With DMA enabled on some I2C channels but not all
   the Non DMA channels were failing.

   The cause was condition the status with only the enabled
   interrupts on non DMA chennels. This conditioning needs
   to only happen in DMA enabled channels
2023-10-25 17:22:47 +03:00
David Sidrane
506f725a19 s32k3xx:lpi2c DMA transaction only need the status conditioned
With DMA enabled on some I2C channels but not all
   the Non DMA channels were failing.

   The cause was condition the status with only the enabled
   interrupts on non DMA chennels. This conditioning needs
   to only happen in DMA enabled channels
2023-10-25 17:22:47 +03:00
David Sidrane
1b5aeb1a08 imxrt:lpi2c DMA transaction only need the status conditioned
With DMA enabled on some I2C channels but not all
   the Non DMA channels were failing.

   The cause was condition the status with only the enabled
   interrupts on non DMA chennels. This conditioning needs
   to only happen in DMA enabled channels
2023-10-25 17:22:47 +03:00
David Sidrane
611309b956 imxrt:serial Ensure the cache is updated if the DMA has updated again
The DMA can bring in more rx data, than the number of
   DMA completions call backs. The call back happen on
   idle, 1/2 and full events. But in between these events
   the DMA can write more data to the buffers memory that
   need to be brought in to the cache. (invalidate)

   We do the invalidate on the reads from the fifo memory
   if the the DMA as commited since the last read.
2023-10-25 16:14:45 +03:00
chao an
2b06142232 kernel: replace all sem_* to nxsem_*: in kernel space
syscall cannot be called from kernel space

Signed-off-by: chao an <anchao@xiaomi.com>
2023-10-25 15:46:03 +08:00
chao an
3cadf6642a kernel: replace all usleep to nxsig_usleep in kernel space
syscall cannot be called from kernel space

Signed-off-by: chao an <anchao@xiaomi.com>
2023-10-25 15:46:03 +08:00
David Sidrane
8cb65d9b3b s32k1xx:lpi2c end only on stop with end of packet 2023-10-24 19:27:03 +03:00
David Sidrane
b2b5826b80 s32k3xx:lpi2c end only on stop with end of packet 2023-10-24 19:27:03 +03:00
David Sidrane
119bf660a4 imxrt:lpi2c end only on stop with end of packet 2023-10-24 19:27:03 +03:00
David Sidrane
6101ebd565 imxrt:lpi2c Timeouts can not be 0 2023-10-23 22:44:55 +08:00
David Sidrane
91034ff4d6 s32k3xx:lpi2c Timeouts can not be 0 2023-10-23 22:44:55 +08:00
David Sidrane
7b8ea03ea3 s32k1xx:lpi2c Timeouts can not be 0 2023-10-23 22:44:55 +08:00