Commit Graph

5 Commits

Author SHA1 Message Date
raiden00pl
ebad04c269 Merged in raiden00/nuttx_l0f0/stm32m0_adc (pull request #867)
Initial ADC support and some improvemnets for the STM32 M0

arch/arm/src/stm32f0l0/Kconfig: improvements

configs/b-l072z-lrwan1: add ADC example

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-05-09 13:02:53 +00:00
raiden00pl
79b3bec208 Merged in raiden00/nuttx_lora (pull request #825)
Master

arch/arm/src/stm32f0l0: SPI support for F0

arch/arm/src/stm32f0l0/Kconfig: L0 parts should select STM32F0L0_STM32L0

arch/arm/src/stm32f0l0/hardware: unify names for ADC/DAC/DMA/CAN

drivers/wireless/lpwan/sx127x/sx127x.c: return immediately when ISR0 is called but sx127x is not initialized

configs/nucleo-f091rc: support for sx127x

configs/nucleo-l073rz: cosmetics

configs/b-l072z-lrwan1/include/board.h: use HSI as default clock source and fix typo in SPI1 pins

Approved-by: GregoryN <gnutt@nuttx.org>
2019-02-16 20:53:16 +00:00
raiden00pl
a7d4abd8d2 Merged in raiden00/nuttx_lora (pull request #821)
Initial support for sx127x radio

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-20 13:03:11 +00:00
raiden00pl
9194c68f23 Merged in raiden00/nuttx_lora (pull request #810)
stm32f0l0: SPI and GPIO EXTI support

arch/arm/src/stm32f0l0: add support for GPIO EXTI

configs/nucleo-l073rz: support for nrf24l01

configs/b-l072z-lrwan1/include/board.h: add note about onboard Murata CMWX1ZZABZ-09 module and definitions for available peripherals

Approved-by: GregoryN <gnutt@nuttx.org>
2019-01-09 20:38:00 +00:00
Mateusz Szafoni
4c601faf6f Brings in initial WIP support for the STML0. This initial commit is in pretty bad shape and, hence it it marked EXPERIMENTAL."
Squashed commit of the following:

    arch/arm/src/stm32f0l0:  Various changes for a clean compilation.  Still does not compile correctly due to missing FLASH latency definitions.

    arch/arm/src/stm32f0l0/hardware:  Add framework for the STM32 L0.  Currently set to same as the STM32F0.

    arch/arm/src/stm32f0l0/hardware:  Very fragmentary FLASH header register definitions for the STM32 L0.

    arch/arm/src/stm32f0l0:  Bring in DMA v1.  Cannot possibly be functionaly yet due to the limited number for M0 interrupts.

    arch/arm/src/stm32f0l0:  Add STM32 F0/L0 LSE and backup power domain controls.

    arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h:  Add STM32L0 PWR header file.

    arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.

    arch/arm/include/stm32f0l0/chip.h: WIP.

    arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.

    arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.

    nuttx/arch/arm/include/stm32f0l0:  Add STM32L0 IRQ number definition file.

    arch/arm/src/stm32f0l0:  Add STM32L0 RCC driver.

    arch/arm/src/stm32f0l0/hardware:  Adds basic STM32L0 header files.

    arch/arm/src/stm32f0l0:  Add STM32L0 chip selections.

    configs/:  Hook new STM32L0 boards into the configuration system.

    configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled

    configs: add basic support for nucleo-l073rz

    configs: add basic support for b-l072z-lrwan1
2018-12-19 12:36:35 -06:00