Commit Graph

18142 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
eca1f86294 arch/xtensa: Remove CODE qualifier for Xtensa-specific files
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-22 08:16:01 -03:00
Gustavo Henrique Nihei
e13dd7dab9 arch/xtensa: Remove FAR qualifier for Xtensa-specific files
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-22 08:16:01 -03:00
Gustavo Henrique Nihei
58f87ef443 xtensa/esp32: Fix wrong position for ++ operator on I2C driver
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-22 08:16:01 -03:00
Jari van Ewijk
e5f17f6604 S32K1XX: Add FlexIO registers 2021-09-22 03:15:42 -07:00
David Sidrane
a9ff808dd1 stm32xx:sdmmc/sdio remove redundant GPIO config
The stm32_gpiosetevent calls stm32_configgpio. So
   the pin is infact restored to the SDMMC/SDIO D0.

   The seconday init, dropped interrupts in a debug
   build with HW stack checking on after the GPIO glich
   fixes and that was how it was detected.
2021-09-21 18:25:16 -07:00
David Sidrane
a8d5f21f81 stm32H7:Etablish device before enabling outputs
This prevents gliches on changing to an output mode.
   If not the ALT mux can be selecting a IP block that
   is drving the line to say 0. Then the output is connected
   to that source, then swithced to the correct source.
2021-09-21 18:25:16 -07:00
David Sidrane
5e19ebb818 stm32F7:Etablish device before enabling outputs
This prevents gliches on changing to an output mode.
   If not the ALT mux can be selecting a IP block that
   is drving the line to say 0. Then the output is connected
   to that source, then swithced to the correct source.
2021-09-21 18:25:16 -07:00
David Sidrane
d5e306e6f3 stm32:Etablish device before enabling outputs
This prevents gliches on changing to an output mode.
   If not the ALT mux can be selecting a IP block that
   is drving the line to say 0. Then the output is connected
   to that source, then swithced to the correct source. This
   produced a 430 nS glich on a F4 @168 Mhz. It was a enough
   to corrupt an I2C device with a bus monitor.
2021-09-21 18:25:16 -07:00
Sara Souza
fc12d6888b risc-v/esp32-c3: Group static variables into a struct and prevent an unitialized thread to be deleted 2021-09-21 15:45:59 +02:00
P.Brier
35824b449a Added CONFIG_ETH0_PHY_DP83825I to imxrt_enet: make driver compile for teensy 4.1 (link detection needs more checks to see if it works as expected) 2021-09-21 10:27:33 -03:00
P.Brier
f9850cf433 Fixed imxrt flexcan driver compilation error due to incorrect scope of variable 2021-09-21 10:00:12 -03:00
Abdelatif Guettouche
9f4d7e4767 xtensa_dumpstate.c: Fix the name of the TCB variable when dumping the
backtrace.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-21 09:22:28 -03:00
Eero Nurkkala
812f504c16 mpfs: emmcsd: add Kconfig/Makefile and board files
Add necessary Kconfig, Make.defs, Makefile and board
file changes.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-09-18 12:18:09 -03:00
Eero Nurkkala
772432e7c3 mpfs: add emmcsd driver
This adds the emmcsd driver for the Polarfire Icicle kit.
The driver has been tested with several SD-cards, such as:

 - Kingston 32 GB SDS2 Canvas Select Plus
 - Kingston MicroSD Canvas Select Plus
 - Sandisk Extreme PRO 32 GB
 - Transcend 8 GB MicroSD

The internal eMMC hasn't been tested comprehensively.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-09-18 12:18:09 -03:00
Xiang Xiao
75a119ac1c arch: Compile up_puts in all Make.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-18 07:33:44 -03:00
Xiang Xiao
71c61b11d9 arch/riscv: Rename riscv_puts to up_puts
since it's a common API defined in include/nuttx/arch.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-18 07:33:44 -03:00
Xiang Xiao
0625f9888c arch/z16: Implement up_puts function
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-18 07:33:44 -03:00
Xiang Xiao
5b75df2203 arch/sim: Implement up_puts function
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-18 07:33:44 -03:00
jsun
f4b6bb281c Update bl602 MTU_SIZE and TX_BUF_SIZE
N/A

Signed-off-by: jsun <jsun@bouffalolab.com>
2021-09-17 22:11:30 -05:00
jsun
d489392d08 Add bl602 os adapter layer
N/A

Signed-off-by: jsun <jsun@bouffalolab.com>
2021-09-17 22:11:30 -05:00
Abdelatif Guettouche
15b68b9abb esp32_spiflash.c: Correctly disable APP's CPU cache.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-17 17:43:45 -03:00
Masayuki Ishikawa
204d88bcf3 arch: cxd56xx: Replace the critical section with spinlock in cxd56_serial.c
Summary:
- This commit replaces the critical section with spinlock in cxd56_serial.c

Impact:
- None

Testing:
- Tested with spresense:rndis_smp, spresense:rndis
  and spresense:rndis_wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-09-16 21:56:40 -05:00
Alin Jerpelea
48f92e6f1d author: Bill Gatliff : update licenses to Apache
Gregory Nutt has submitted the SGA
Bill Gatliff has submitted the ICLA

as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-09-16 21:56:08 -05:00
Gustavo Henrique Nihei
52cea558af risc-v/esp32c3: Make the semaphore timeout on I2C configurable
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-16 14:07:26 -03:00
Gustavo Henrique Nihei
b33ccd01cf xtensa/esp32: Make the semaphore timeout on I2C configurable
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-16 14:07:26 -03:00
zhuyanlin
7947e50f06 xtensa:backtrace: flush to stack when in interrupt
The registers may be in window during interrupt.
Flush window stack to stack first.
And fix warning in build.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:53:35 -05:00
Peter Bee
2a8b076b38 risc-v/esp32c3: fix pwm driver bug
Wrong offset sign and pwm multichan fix

Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2021-09-16 08:38:49 -03:00
zhuyanlin
cdb441cc3f arch:xtensa:dumpstate: use sched_dumpstack
Use sched_dumpstack instead. The backtrace infomation like

xtensa_user_panic: User Exception: EXCCAUSE=0009 task: hello
xtensa_registerdump:    PC: 202b32b8    PS: 00060030
xtensa_registerdump:    A0: a02acb87    A1: 20998d10    A2: ffffaaaa    A3: 12345678
xtensa_registerdump:    A4: a02ba26c    A5: 209949c0    A6: 20990994    A7: 00000258
xtensa_registerdump:    A8: a02b32af    A9: 20998cb0   A10: 0000000f   A11: 209949a0
xtensa_registerdump:   A12: a02be95c   A13: 20994980   A14: 00000003   A15: 209949d0
xtensa_registerdump:   SAR: 00000000 CAUSE: 00000009 VADDR: ffffaaaa
xtensa_registerdump:  LBEG: 00000000  LEND: 00000000  LCNT: 00000000
xtensa_registerdump:  TMP0: 202b1512  TMP1: 20998af0
sched_dumpstack: [BackTrace| 3|0]:  0x202acbae 0x202b232e 0x202b1912 0x202b19f5 0x202b24f1 0x202b152f    0x40023 0x202b32b0
sched_dumpstack: [BackTrace| 3|1]:  0x202acb87 0x202a86a4

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:32:38 +08:00
zhuyanlin
6e0f84dc88 arch:xtensa: add up_backtrace support
Up_backtrace can be backtrace from task or interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:32:38 +08:00
zhuyanlin
3acdbef60d xtensa:arch: force up_getsp to inline
Up_getsp may be not inline in gcc, thus get the sp
is up_getsp function's sp, not the caller function.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:32:38 +08:00
zhuyanlin
583dce0b98 arch:xtensa: remove WSBITS/WBBITS to core.h
Remove WSBITS/WBBITS macro to core.h as may be used by
arch common code.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-16 10:32:38 +08:00
Cis van Mierlo
b316c679c1 S32K1xx: added PM support 2021-09-15 12:20:23 -03:00
SPRESENSE
74df4b70b3 drivers: video: Rearchitect video driver
Rearchitect video driver:
- Define two video I/F(struct imgsensor_ops_s and struct imgdata_ops_s),
  and support them.
- CISIF driver supports new video I/F struct imgdata_ops_s.
- ISX012 driver supports new video I/F struct imgsensor_ops_s.
- Move ISX012 driver to general driver directory.
2021-09-15 07:06:35 +02:00
Juha Niskanen
4487b352c0 arch/arm/src/stm32l4: fix baud rate setting for LPUART
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2021-09-14 08:57:25 -07:00
Harri Luhtala
7e3c813346 arch/arm/src/stm32l4: LPUART1 support
Signed-off-by: Harri Luhtala <harri.luhtala@haltian.com>
2021-09-14 08:57:25 -07:00
Abdelatif Guettouche
198c30eaa6 stm32*7/stm32_serial.c: Don't fake an interrupt when interrupts are not
suppressed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-14 22:50:43 +08:00
chao.an
ba9b829372 arch/arm: correct the function name from arm_getsp() to up_getsp()
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-09-14 22:48:47 +08:00
Cis van Mierlo
91c945a2e8 s32k1xx: added way to get the reset cause in proc fs 2021-09-14 08:35:41 +02:00
Sara Souza
83a9c2b24b xtensa/irq.h: Fixes the routine that clears the processor interrupt 2021-09-13 17:01:49 -03:00
Alin Jerpelea
bb54ed4227 author: OffCode Ltd : update licenses to Apache
OffCode Ltd has submitted the SGA

as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-09-13 22:43:36 +08:00
zhuyanlin
8e6fbe700e xtensa:dcache_clean: use DCACHE_LINZESIZE instead of DCACHE_SIZE
Clean_dcache use DCACHE_LINZESIZE instead of DCACHE_SIZE in addr loop

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-09-13 14:38:57 +08:00
Xiang Xiao
850367d5bb arch/arm: Add ARCH_CORTEXM55 Kconfig for cortex-m55
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-12 09:09:42 -03:00
Jukka Laitinen
3654db3517 mpfs: Modify IRQ handling to support also HART0 on PF
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-09-11 23:33:01 +08:00
Janne Rosberg
8b560e7894 mpfs/i2c: fix bus initialize for i2c1 2021-09-11 23:33:01 +08:00
Janne Rosberg
1e3919e55a mpfs/corepwm: remove wrong header include 2021-09-11 23:33:01 +08:00
Janne Rosberg
7db3456824 risc-v/mpfs: serial: add termios support and init device clocks 2021-09-11 23:33:01 +08:00
Janne Rosberg
aa057e25f2 mpfs/i2c: adapt to sysreg define changes 2021-09-11 23:33:01 +08:00
Janne Rosberg
dc54ba924e mpfs/spi: adapt to sysreg define changes 2021-09-11 23:33:01 +08:00
Janne Rosberg
3e6b19dfc5 risc-v/mpfs: add more sysreg defines and fix clock and reset defines 2021-09-11 23:33:01 +08:00
Abdelatif Guettouche
31aa616bf2 stm32_serial.c: Don't fake a TX interrupt when interrupts are not
suppressed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-10 15:15:44 -07:00