Summary:
- I noticed that the kernel heap area overlaps the PGPOOL
- This commit fixes this issue
Impact:
- None
Testing:
- Tested with sabre-6quad:netknsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
without UBSan
```
text data bss dec hex filename
85612 208 142258 228078 37aee nuttx
```
with UBSan:
```
text data bss dec hex filename
194290 98164 208634 501088 7a560 nuttx
```
```c
int main(int argc, FAR char *argv[])
{
uint32_t ptr[32];
printf("Hello, World!! %lu\n", ptr[64]);
return 0;
}
```
Try to run this sample:
```
nsh> hello
ubsan_prologue: ================================================================================
ubsan_prologue: UBSAN: array-index-out-of-bounds in hello_main.c:39:37
__ubsan_handle_out_of_bounds: index 64 is out of range for type 'uint32_t [32]'
ubsan_epilogue: ================================================================================
Hello, World!! 1070182368
nsh>
```
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This patch fixes missing comma, found by cppcheck.
rp2040_i2c_slave.c:259:0: error: failed to expand 'modbits_reg32',
Wrong number of parameters for macro 'modbits_reg32'.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
This patch fixes unbuffered mode so it actually works.
Also, patch contains fixes for possible bugs that could result in
deadlock or system hang in certain situations.
Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c
commit 522a949ed5
Author: David Sidrane <David.Sidrane@NscDg.com>
Date: Wed Jul 13 11:00:11 2022 -0700
imxrt:enet Better interrupt state handeling
- NOTE: I also fixed typo and compile error in the above commit
Impact:
- imx_enet.c
Testing:
- Tested with qemu-6.2
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c
commit 81f03a9151
Author: David Sidrane <David.Sidrane@NscDg.com>
Date: Tue Mar 15 14:27:51 2022 -0700
imxrt:ETH Add Support for ETH2
Impact:
- imx_enet.c
Testing:
- Tested with qemu-6.2
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
This change adds support for the following features:
- injected channels (default: 0)
- ADC resolution (default: 12bit)
- ADC low-level operations
- ADC external triggers
- custom ADC interrupts
- ADC sample time configuration
- configurable ADC SCAN mode (default on if DMA)
- configurable ADC DMA mode (default: one shot mode)
- reset the ADC block only if all ADC instances are closed
This change adds support for the following features:
1. PWM complementary outputs
2. interface for low-level PWM operations
3. support for all PWM channel modes
4. support for internal PWM channels (TIM1/TIM8)
5. support for PWM channel polarity and IDLE state
6. support for TRGO and BREAK
Kientis:edma Cleanup
Kinetis:EDMA Interrupt on last TCD
Kintis:edma remove dcache operations on passed data
Data can be chained in TCD and both read and write
can be in the chain. So the dmach ttype is not
relevent for all; the TCDs. Therefor we only perform
dcache operations on internal strutures, The caller
must perform dcache operations on their data.
kinetis:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather
Summary:
- I noticed that ps shows incorrect stack usage when running
getprime in the background.
- With CONFIG_ARCH_ADDRENV=y, a user task including pthread
allocates its stack in the user space that needs to be
accessed with a correct address environment.
- This commit fixes this issue.
Impact:
- CONFIG_ARCH_ADDRENV=y only
Testing:
- Tested with sabre-6quad:knsh on qemu-6.2
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
ld: arch/libarch.a(cxd56_allocateheap.c.obj): in function `up_allocate_heap':
arch/arm/src/cxd56xx/cxd56_allocateheap.c:113: multiple definition of `up_allocate_heap'; arch/libarch.a(arm_allocateheap.c.obj):
arch/arm/src/common/arm_allocateheap.c:110: first defined here
Signed-off-by: chao.an <anchao@xiaomi.com>
arch/arm/src/common/arm_hostfs.c: In function 'host_read':
arch/arm/src/common/arm_hostfs.c:156:24:
warning: passing argument 1 of 'up_invalidate_dcache' makes integer from pointer without a cast [-Wint-conversion]
156 | up_invalidate_dcache(buf, buf + count);
| ^~~
| |
| void *
In file included from arch/arm/src/common/arm_hostfs.c:26:
include/nuttx/cache.h:261:37: note: expected 'uintptr_t' {aka 'unsigned int'} but argument is of type 'void *'
261 | void up_invalidate_dcache(uintptr_t start, uintptr_t end);
| ~~~~~~~~~~^~~~~
Signed-off-by: chao.an <anchao@xiaomi.com>
This commit adds RX DMA support to serial driver. The DMA is currently
supported only for USART peripherals, not for UART. It uses two circular
buffers which size can be setup by SAMV7_SERIAL_RXDMA_BUFFER option.
The idle bus interrupt is enabled to ensures data are read even if the
buffer is not yet full. The timeout can be setup by
SAMV7_SERIAL_DMA_TIMEOUT option.
This adds support only for RX transfers.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit adds functions sam_dmarxsetup_circular() and
sam_dmarxstart_circular() that create API for operating with two or more
circular buffers. This can be used for DMA operation with serial driver
or ADC where ping pong buffers are required to successfully transfer the
data at high speed.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit enhances SAMV7 serial driver with RS-485 mode available to
USART peripherals. The hardware automatically sets RTS pin high when
data are transfered and low then no transfer occurs. Only USART peripherals
support this mode, UART peripherals do not.
This mode can be enabled by configuration option SAMV7_USARTx_RS485MODE.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
1. Fix error recovery mechanism during transmission error
handling (enable transmission at the end).
2. Fix compilation / operation with CONFIG_SAMV7_EMAC_PREALLOCATE=y
3. Enable fully configured address space for transmission queues
to allow sending packets with length more than 976 bytes. With
partially configured address space the AHB error is generated
during transmission of long packets.
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
forget to update in this patch:
commit b02db04e00
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date: Sun Jun 5 17:10:19 2022 +0800
arch/assert: Keep the thread dump column order same as ps
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
* arch/arm/src/tiva/common/tiva_lowputc.c
(tiva_lowsetup):
For each UART, if Kconfig enables RTS/CTS (e.g.,
CONFIG_UART0_IFLOWCONTROL and/or CONFIG_UART0_OFLOWCONTROL),
configure the corresponding GPIO(s).
* arch/arm/src/tiva/common/tiva_serial.c:
(struct up_dev_s):
If CONFIG_SERIAL_IFLOWCONTROL, add a bool field 'iflow'. If
CONFIG_SERIAL_OFLOWCONTROL, add a bool field 'oflow'. This is
inspired by the implementation for kinetis.
(g_uart0priv, g_uart1priv, g_uart2priv, g_uart3priv, g_uart4priv,
g_uart5priv, g_uart6priv, g_uart7priv):
If Kconfig enables RTS/CTS for a UART (e.g.,
CONFIG_UART0_IFLOWCONTROL thru CONFIG_UART7_OFLOWCONTROL), set
the corresponding iflow and/or oflow flag(s).
(up_setup):
Check the above-mentioned iflow and oflow flags and set or unset
the RTSEN and/or CTSEN bits in the UART's CTL register to enable
the feature.
The "p" format specifier already prepends the pointer address with "0x"
when printing.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
