Commit Graph

4 Commits

Author SHA1 Message Date
Stuart Ianna
4cae98674d litex: Support for kernel build with vexriscv-smp. 2023-04-22 01:40:32 +08:00
Stuart Ianna
01b0305ab5 risc-v: SV32 MMU support for qemu-rv. 2023-03-29 22:15:19 +09:00
Petro Karashchenko
f952b8456c assert: switch from ASSERT(0/false) to PANIC
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-01-26 10:15:34 +08:00
zhangyuan21
f8f29c8147 libc: add risc-v libc function
Porting memory and string optimize functions from newlib and bionic

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-01-10 11:31:26 +08:00