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Author SHA1 Message Date
Jiuzhu Dong
f1f0bcc521 driver/sensor: support new sensor type:ECG,PPG,Imdepance 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-10-20 09:55:18 -05:00
丁欣童
26fedb2770 fakesensor: transform ddmm.mmmm to dd.mmmmmm. 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-10-20 09:55:18 -05:00
Gustavo Henrique Nihei
2a8e7b064d boards/esp32: Return proper error code on esp32_spiflash_init 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-20 09:54:25 -05:00
Gustavo Henrique Nihei
7368f7a2c8 xtensa/esp32: Make SPI Flash initialization common to all ESP32 boards 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-20 09:54:25 -05:00
Abdelatif Guettouche
018aa8eb8d esp32c3_serial.c: Remove the stub implementations of the early serial 
functions as they are only called when the configuration is enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-20 10:22:10 -03:00
Xiang Xiao
1efc9fbac6 sim/rptun: Trigger the callback only the sequnece number change 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-20 10:21:54 -03:00
zhangguoliang
12b2b7c240 fix: charger: change the operations of battery ioctl to common 
Almost all charger chip need the same oprations, which was not
appropriate only for BQ2429X. Therefore, open the operations to
all charger chips.

Signed-off-by: zhangguoliang <zhangguoliang3@xiaomi.com>
 2021-10-20 09:52:21 +02:00
weizhifang
2a6673bcdd feature: charge: modify battery_gauge code 
add temperature and current ioctl api

Signed-off-by: weizhifang <weizhifang@xiaomi.com>
 2021-10-20 09:52:11 +02:00
Abdelatif Guettouche
9235d6605b boards/esp32&esp32c3: Remove crypto accelerators' defconfigs. 
Since the tests were removed from the drivers, there is no need for
these defconfigs anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
55e8b17974 boards/risc-v/esp32c3: Remove the flash encryption test. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
c83c1071cc esp32c3_bignum.c & esp32c3_sha.c: Fix some trivial nxstyle complaints. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
e424241d09 arch/risc-v/esp32c3: Remove the bignum test from the driver. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
91cb9dafaf arch/risc-v/esp32c3: Remove the RSA test from the driver. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
652d77efd2 arch/risc-v/esp32c3: Remove the SHA test from the driver. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
5d1c01aea7 arch/risc-v/esp32c3: Remove the AES test from the driver. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
8288a04a0b arch/xtensa/esp32: Remove the AES test from the driver. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-19 18:41:57 -03:00
Gustavo Henrique Nihei
b99852872c Documentation: Update "Using QEMU" section for ESP32 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-19 23:23:43 +02:00
Gustavo Henrique Nihei
0299e7d35d tools/esp32: Refactor generation of QEMU-compatible image 
Use the merge_bin builtin function from esptool.py.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-10-19 23:23:43 +02:00
Xiang Xiao
970cbff638 fs/partition: Make parse_ptable_partition to partition.h 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-19 08:03:12 -03:00
Xiang Xiao
eb720388ca fs/partition: Make read_partition_block callable outside ptable 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-19 08:03:12 -03:00
zhuyanlin
b5134565fa arch:xtens:mpu: modify acc and memtype to uint32_t 
The uint8_t and uint16_t will overflow in MPU_ENTRY_AR marco.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-10-19 00:24:31 -05:00
anjiahao
9b52e4e311 littlefs:fix rmdir can remove a file 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
 2021-10-19 00:12:45 -05:00
Alexander Lunev
6bdc737f5c bcm43xxx: supported high-speed timing mode with a clock rate up to 50MHz 2021-10-18 21:58:03 -05:00
Xiang Xiao
9e60c33d4d binfmt: Remove umm_initialize from elf_load 
since umm_try_initialize will do it automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-18 22:51:18 -03:00
chao.an
5ff4e33e3f binfmt/Makefile: remove the specified prefix from target variables 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-10-19 00:35:35 +02:00
Xiang Xiao
91398e73eb arch/xtensa/Kconfig: add quotes in source to clean warnings from setconfig 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-19 00:33:51 +02:00
Jari van Ewijk
177acf57c2 S32K1XX boards: Implement userled_getall function 2021-10-18 12:30:18 -07:00
Jari van Ewijk
b1d5eff52d Userled driver: Add option to check actual pin state with getall 2021-10-18 12:30:18 -07:00
daviepeng
9a0146f15f add include battery_ioctl.h 2021-10-18 14:14:09 -03:00
Jiuzhu Dong
7e59a6a31e cpuload: fix crash because of the member of g_pidhash is NULL 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-10-18 15:13:52 +02:00
Michal Lenc
3e1ce5f770 arch/arm/src/imxrt/hardware: add header file for ADC_ETC module 
This commit adds header file imxrt_adc_etc.h for external ADC trigger
module. This contains only definitions of ADC_ETC registers and separate
bits, implementation of ADC_ETC driver is yet to be done.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-10-17 16:50:59 +02:00
Abdelatif Guettouche
7549de49b4 arch/*_cpupause:Allow a spin before taking the g_cpu_wait spinlock. 
If we repeatedly call up_cpu_pause and up_cpu_resume, there would be
cases where the next call to up_cpu_pause happens while the other CPU is
still responding to the previous resume request. In this case the
DEBUGASSERT will trigger. We should allow the first CPU to wait until the
other CPU has finished responding to the resume request.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-17 21:10:23 +09:00
Xiang Xiao
643e34efde sdio: Update the defintion to the latest spec 
and correct the comment:
https://www.sdcard.org/downloads/pls/
https://www.jedec.org/standards-documents/technology-focus-areas/flash-memory-ssds-ufs-emmc/e-mmc

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-17 06:29:13 -03:00
Matheus Castello
5c15fe6ec1 boards: k210: Add initial gpio user space support 
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
 2021-10-17 17:29:59 +09:00
Xiang Xiao
4a7915e72b sched: Check g_pidhash[hash_ndx] isn't NULL before access pid field in nxsched_get_tcb 
Fix the regression by commit:
commit 8b67944c75
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Thu Oct 14 11:03:07 2021 +0800

    sched: Remove pidhash_s and move ticks to tcb_s

    simplify the code logic and reduce memory a little bit

    Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-17 17:28:57 +09:00
Abdelatif Guettouche
7b43d11435 esp32_spiflash.c: Allocate only one variable to hold the cache state in 
single CPU mode.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
f54a929001 esp32_spiflash.c: Keep the index of the other CPU between SPI Flash 
operations.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
eeb68bda3d xtensa_testset.c: Simplify the test-set function and remove some old 
comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
dfe1637864 esp32_spiflash.c: Pause the other CPU during flash operation. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
1de17c364f esp32.ld: Force some of libsched.a symbols to internal SRAM. They are used 
when the cache is disabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
d1ecb8b2e6 esp32.ld: Force some of libarch.a symbols to internal SRAM. They are used 
when the cache is disabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
f2c2323642 esp32_intercpu_interrupt.c: Force the functions to internal SRAM. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 22:56:21 -07:00
Abdelatif Guettouche
d2bc011719 arch/xtensa/xtensa_cpupause.c: Allow a spin before taking the g_cpu_wait 
spinlock.

If we repeatedly call up_cpu_pause and up_cpu_resume, there would be
cases where the next call to up_cpu_pause happens while the other CPU is
still responding to the previous resume request.  In this case the
DEBUGASSERT will trigger.  We should allow the first CPU to wait until the
other CPU has finished responding to the resume request.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 09:46:23 -07:00
Xiang Xiao
8b67944c75 sched: Remove pidhash_s and move ticks to tcb_s 
simplify the code logic and reduce memory a little bit

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-16 06:19:17 -03:00
chao.an
13741c9017 sched/pidhash: init g_pidhash to NULL to avoid wild pointer 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-10-16 06:19:17 -03:00
Abdelatif Guettouche
591c1563b8 esp32_oneshot_lowerhalf.c: Use the same alignment as the rest of the 
code base.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
9e1d2ca95e esp32_rt_timer.c: Group static variables into a struct and fix naming 
standard

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
0dff3f2762 esp32_wifi_adapter.c: Use the specified spin lock when 
enabling/disabling interrupts.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
a50d673df7 esp32_wifi_adapter.c: Don't hold another spinlock when calling 
enter_critical_section, we already hold the global IRQ spinlock.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00
Abdelatif Guettouche
11216257cf esp32_rt_timer.c: Don't nest calls to spin_lock_irqsave with a device 
specific spinlock, this will lead to deadlocks.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-10-16 00:01:23 -07:00