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37 Commits

Author SHA1 Message Date
Alin Jerpelea
c39339a7a8 arch: arm: include: nxstyle fixes 
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-22 19:28:38 -07:00
Alin Jerpelea
4daa276903 arch: arm: include: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-22 19:28:38 -07:00
Gustavo Henrique Nihei
330eff36d7 sourcefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Xiang Xiao
2956b8516b Fix nxstyle warning 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-10-20 01:45:06 -07:00
Xiang Xiao
eb4121ce38 Change all 'Nuttx' to 'NuttX' 
Unify the naming convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-10-20 01:45:06 -07:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly 
This typo had been copied and pasted into numerous irq and syscall
headers.
 2020-04-05 22:31:15 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189) 
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
 2020-01-31 09:24:49 -06:00
Dave Marples
d0cda60442 In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts. 2018-12-03 17:41:59 -06:00
Gregory Nutt
cb374e6e62 arch/: Clean up some naming and spacing. 2018-06-20 15:38:06 -06:00
ahb
67c86e5aa9 add LPC4337FET256 2017-03-09 10:30:28 +01:00
Gregory Nutt
1cdc746726 Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES 2016-06-11 14:14:08 -06:00
Gregory Nutt
f06a06952f LPC43xx: 1KB is 1024, not 1025. Noted by phreakuencies. 2016-05-31 06:22:10 -06:00
Alexander Vasiljev
ad6f37edfa Adds definitions for the LPC4337jet100 chip. 2016-05-24 07:03:50 -06:00
Gregory Nutt
83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Lok Tep
1f4ce9e7f9 LPC43xx: Fix some NVIC priority definitions 2016-01-25 07:23:28 -06:00
Lok Tep
3b4c71ef8d more revert 2015-11-09 14:51:00 +01:00
Lok Tep
a8416d2a26 revert 2015-11-09 14:41:08 +01:00
Lok Tep
7d386866af Merged nuttx/arch into master 2015-11-09 14:24:41 +01:00
v01d
79fad2843a lpc4337: WIP 2015-10-30 20:15:18 -03:00
Lok Tep
5983019a45 merge from nuttx 2015-10-08 22:57:34 +02:00
Gregory Nutt
36726b1bc4 Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
Gregory Nutt
3a07b09b9a LPC43xx: Tweaks to pkolesnikov's LPC4370 changes to get a clean compilation 2015-10-01 10:00:25 -06:00
petekol
0eb1afcdef usb reset right 2015-09-30 17:13:32 +02:00
petekol
585fdf70d8 CONFIG_ARCH_CHIP_LPC4370FET100 2015-09-29 17:23:17 +02:00
Ilya Averyanov
675878b360 PC43xx: Fix NVIC_SYSH_PRIORITY_STEP define 2015-09-01 08:06:34 -06:00
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
25d4ff745b More trailing whilespace removal 2014-04-13 16:22:22 -06:00
Gregory Nutt
29c43b0b24 Fixes a few more high priority, nested interrupt logic 2013-12-23 11:13:56 -06:00
Gregory Nutt
3855ce04e8 Beginning of high priority nested interrupt support for the ARMv7-M family 2013-12-21 11:03:38 -06:00
patacongo
5ab31d456e Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ARMv7-M architectures 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
 2013-01-22 01:25:40 +00:00
patacongo
231e9e262d Add support to the LPC4330-Xplorer port for the Code Red toolchain 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4920 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-08 22:28:39 +00:00
patacongo
2edffea6c3 Add LPC43 GPIO configurtion logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4912 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-06 14:50:43 +00:00
patacongo
53bb15a078 Add LPC43 clock initialization logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4910 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-05 22:38:12 +00:00
patacongo
b0cc2306ad Progress of LPC43xx build environment 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4904 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-04 17:59:16 +00:00
patacongo
899eb0b5ce Add LPC43 Event Monitor, EEPROM, FLASH header files 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4898 42af7a65-404d-4744-a932-0658087f49c3
 2012-07-02 22:15:20 +00:00
patacongo
a63611af54 Add LPC32xx memory map and interrupt numbers 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4877 42af7a65-404d-4744-a932-0658087f49c3
 2012-06-27 21:35:36 +00:00
patacongo
089c4a508c Beginning of NXP LPC4330 port 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4876 42af7a65-404d-4744-a932-0658087f49c3
 2012-06-27 19:17:30 +00:00