Commit Graph

12692 Commits

Author SHA1 Message Date
Nakamura, Yuuichi
f392d246d3 Fix note driver initialization 2020-07-13 00:46:55 -05:00
Xiang Xiao
9dff16e0e4 fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ieaf325c899d1c349d64dfa15bddcc32afd1fce42
2020-07-10 21:30:02 +01:00
Xiang Xiao
924ba84737 arch: call *_getsp in up_assert and board_crashdump
and remove the static up_getsp

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-09 13:51:09 +01:00
Xiang Xiao
05f6445493 arch: Move *_getsp to the common place arch/arch.h
so other place can get the stack pointer easily

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-09 13:51:09 +01:00
Xiang Xiao
95aa3a11d1 arch/tms570: Remove the unused frac variable
and change the type of divb7 from float32_t to float

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-04 08:31:06 -07:00
Xiang Xiao
b984534255 lib/math: Remove float32 and float64 definition
since they aren't defined by standard and never supported by other POSIX OS

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-02 10:53:34 -03:00
Jari van Ewijk
b84ce844c6 S32K additional style fixes 2020-07-01 13:45:38 +01:00
Jari van Ewijk
3db090a210 S32K - Expand FlexTimer header file and add PWM support 2020-07-01 13:45:38 +01:00
Peter van der Perk
4a40a7c3d7 S32K148EVB netdev lateinit to support Enet & CAN at the same time 2020-06-30 12:46:50 -06:00
Peter van der Perk
eca1011b1e Expose xxx_caninitialize() correctly so it's usable in latedev init when there are multiple net devices 2020-06-30 12:46:50 -06:00
Jari van Ewijk
1306cbc16e S32K additional style fixes 2020-06-30 15:46:15 +01:00
Jari van Ewijk
86c151edf1 S32K Small Fixes:
- Typos / wrong names in s32k14x_irq.h, s32k1xx_memorymap.h and s32k1xx_pcc.h
- Wrong base address for port input disable register in s32k1xx_pin.c
- up_* still had to be changed to arm_* in some places
2020-06-30 15:46:15 +01:00
Jacob Dahl
b12b3072e8 Added support for STM32F412xx. Tested with the NUCLEO-F412ZG dev board as well as a custom board using the STM32F412CE. 2020-06-29 17:44:35 +02:00
Claudio Micheli
10f93b9d9b stm32l4: extend CAN ioctrl with NART/ABOM. Add RTR to CAN header
Signed-off-by: Claudio Micheli <claudio@auterion.com>
2020-06-29 09:05:44 -03:00
Claudio Micheli
94e87bb6e8 stm32: extend CAN ioctrl with NART/ABOM. Add RTR to CAN header
Signed-off-by: Claudio Micheli <claudio@auterion.com>
2020-06-29 09:05:44 -03:00
Claudio Micheli
7a346bee26 stm32f7: Add the option to include RTR in CAN header
Signed-off-by: Claudio Micheli <claudio@auterion.com>
2020-06-29 09:05:44 -03:00
Beat Küng
f6039bbfa7 stm32f7: add CANIOC_SET_NART and CANIOC_SET_ABOM ioctl's to can driver 2020-06-29 09:05:44 -03:00
Matias Nitsche
861f80e853 stm32l4 RCC: configure flash wait states early, otherwise execution is corrupted when clock is increased before that 2020-06-28 13:25:05 -03:00
Matias Nitsche
c26521c38f stm32l4 dfumode: move initialization point of bootloader jump instruction to correct place 2020-06-26 09:59:40 -03:00
Matias Nitsche
d1c538b65c stm32l4: dfumode style fixes 2020-06-26 09:59:40 -03:00
Matias Nitsche
b4bea95a6a stm32l4: add support for booting into DFU mode 2020-06-26 09:59:40 -03:00
Ouss4
a7fdc4ba03 arch/arm/src/stm32/stm32f40xxx_i2c.c: Fix tracing enumeration.
Values used in the ISR were taken from STM32F7 but the enumeration was
not updated.
2020-06-26 09:51:09 -03:00
Matias Nitsche
1115f0104b stm32l4 oneshot: style fix 2020-06-25 11:04:14 +01:00
Matias Nitsche
3c37d68735 stm32l4 oneshot: assert period > 0, otherwise the timer never fires 2020-06-25 11:04:14 +01:00
Gustavo Henrique Nihei
105d561a51 arch/arm/src/stm32f7: Refactor FMC functions for STM32F7
This refactor is based on the FMC architecture of STM32H7, with the
exception of the board specific definitions.
2020-06-24 10:51:02 -03:00
Gustavo Henrique Nihei
b06722cd7f boards/arm/stm32/stm32f769i-disco: Add support for external SDRAM 2020-06-24 10:51:02 -03:00
David Sidrane
5cbebda133 kinetis:Ethernet fixed & better interrupt management
When any error was detected the buffers descriptors were
   blindly initialized. This caused the TX of the MAC to
   be in a bad state. The correct thing to do, we disable
   the MAC, init the bufffers and re-eanable the MAC.

   The interrupts were being throlled at the NVIC. This been
   cleaned up.
2020-06-21 14:16:26 -06:00
Huang Qi
a13ebe5975 arch/arm/stm32: Make SysTick as a Tickless clock source option
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2020-06-20 09:10:27 -03:00
David Sidrane
b64060f717 s32k1xx:flexcan clock_systimespec -> clock_systime_timespec 2020-06-19 00:27:52 +01:00
Matias Nitsche
67ab8ebb5f style fixes 2020-06-17 13:17:38 -03:00
Matias Nitsche
b7d18585dc stm32l4: add I2C timings for 48 MHz SYSCLK 2020-06-17 13:17:38 -03:00
Matias Nitsche
fa97e216e4 stm32l4: clocking fixes (would hang for MSI@48MHz on STM32L476) 2020-06-17 13:17:38 -03:00
Peter van der Perk
6a19f03756 FlexCAN C89 Style initialization 2020-06-16 15:35:43 -03:00
Peter van der Perk
ede6225c72 NXStyle fixes 2020-06-16 15:35:43 -03:00
Peter van der Perk
efbe4c89e2 S32K1XX Enhanced EEPROM block device driver 2020-06-16 15:35:43 -03:00
Peter van der Perk
4eecf8561f FlexCAN interrupt fixes, old compiler fixes
SocketCAN old compiler fix
2020-06-16 15:35:43 -03:00
Matias Nitsche
7ce175b614 style fixes 2020-06-16 01:00:45 +01:00
Matias Nitsche
2bdc0c5bc8 stm32l4 ADC: on 47x/48x parts, the ACSR register needs to be configured for ADC inputs to work 2020-06-16 01:00:45 +01:00
Matias Nitsche
9786e3a1a8 style fixes 2020-06-15 23:19:51 +01:00
Matias Nitsche
3f1e89e30f stm32l4 serial fix: clock divider for baud rate was not correctly set 2020-06-15 23:19:51 +01:00
Peter van der Perk
b5c5948e1c NXStyle fixes 2020-06-15 08:07:19 -06:00
Peter van der Perk
5f73dc89be Kinetis: Added FlexCAN driver with SocketCAN support 2020-06-15 08:07:19 -06:00
Peter van der Perk
ff76ef0725 s32k1xx: Added FlexCAN driver with SocketCAN support 2020-06-15 08:07:19 -06:00
chao.an
332e5481ee arch/stackframe: fix heap buffer overflow
ASAN trace:
...
==32087==ERROR: AddressSanitizer: heap-buffer-overflow on address 0xf4502120 at pc 0x56673ca3 bp 0xff9b6a08 sp 0xff9b69f8
WRITE of size 1 at 0xf4502120 thread T0
    #0 0x56673ca2 in strcpy string/lib_strcpy.c:64

0xf4502120 is located 0 bytes to the right of 8224-byte region [0xf4500100,0xf4502120)
allocated by thread T0 here:
    #0 0xf7a60f54 in malloc (/usr/lib32/libasan.so.4+0xe5f54)
    #1 0x5667725d in up_create_stack sim/up_createstack.c:135
    #2 0x56657ed8 in nxthread_create task/task_create.c:125
    #3 0x566580bb in kthread_create task/task_create.c:297
    #4 0x5665935f in work_start_highpri wqueue/kwork_hpthread.c:149
    #5 0x56656f31 in nx_workqueues init/nx_bringup.c:181
    #6 0x56656fc6 in nx_bringup init/nx_bringup.c:436
    #7 0x56656e95 in nx_start init/nx_start.c:809
    #8 0x566548d4 in main sim/up_head.c:95
    #9 0xf763ae80 in __libc_start_main (/lib/i386-linux-gnu/libc.so.6+0x18e80)

CALLSTACK:
    #8  0xf79de7a5 in __asan_report_store1 () from /usr/lib32/libasan.so.4
    #9  0x565fd4d7 in strcpy (dest=0xf4a02121 "", src=0xf5c00895 "k") at string/lib_strcpy.c:64
    #10 0x565e4eb2 in nxtask_setup_stackargs (tcb=0xf5c00810, argv=0x0) at task/task_setup.c:570
    #11 0x565e50ff in nxtask_setup_arguments (tcb=0xf5c00810, name=0x5679e580 "hpwork", argv=0x0) at task/task_setup.c:714
    #12 0x565e414e in nxthread_create (name=0x5679e580 "hpwork", ttype=2 '\002', priority=224, stack=0x0, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:143
    #13 0x565e42e3 in kthread_create (name=0x5679e580 "hpwork", priority=224, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:297
    #14 0x565e5557 in work_start_highpri () at wqueue/kwork_hpthread.c:149
    #15 0x565e3e32 in nx_workqueues () at init/nx_bringup.c:181
    #16 0x565e3ec7 in nx_bringup () at init/nx_bringup.c:436
    #17 0x565e3d96 in nx_start () at init/nx_start.c:809
    #18 0x565e3195 in main (argc=1, argv=0xffe6b954, envp=0xffe6b95c) at sim/up_head.c:95

Change-Id: I096f7952aae67d055daa737e967242eb217ef8ac
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-06-15 07:19:41 -06:00
Xiang Xiao
4fbbd2e3bf arch: Move PRIxMAX and SCNxMAX definition to include/stdint.h
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
2020-06-10 08:24:47 +02:00
Xiang Xiao
7758eb8658 arch: Define INTx_C and UINTx_C macro
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia50ea8764880fabd3d878c95328632c761be6b43
2020-06-10 08:24:47 +02:00
David Sidrane
7e3c341b15 stm32h7:Fix compiler error stm32_bdma_capable 2020-06-09 20:08:50 +01:00
raiden00pl
8708e34b29 arch/arm/src/nrf52/nrf52_idle.c: disable WFI in up_idle 2020-06-09 13:12:09 +01:00
Alan C. Assis
d41a2f87f0 Add support to STM32F411CE 2020-06-07 02:29:16 +01:00
Ouss4
a90f657743 arch/arm/src/stm32/stm32_hrtim.c: Fix nxstyle issues. 2020-06-06 15:46:51 -03:00