Gregory Nutt
f40bb14495
Kinetis: Add support for I2C1
2016-08-16 07:21:03 -06:00
Gregory Nutt
b2be0be3a6
Simulated oneshot max_delay() method should not return a failure.
2016-08-15 11:43:55 -06:00
Gregory Nutt
3f48392974
Add defaults in SAMV7 configuration for all DAC settings
2016-08-15 10:22:12 -06:00
Gregory Nutt
e53118ffc2
SAMV7 DAC configuration needs some conditional logic
2016-08-15 08:55:11 -06:00
Gregory Nutt
c367e4985f
Add configuration logic for the SAMV7 DAC module
2016-08-15 08:21:46 -06:00
Piotr Mienkowski
053aea552f
Add support for SAMV7 DACC module
2016-08-15 08:00:36 -06:00
Gregory Nutt
f84780f36e
Changes from review of PR 114
2016-08-14 13:38:47 -06:00
Gregory Nutt
2b32869b49
Merged in v01d/nuttx/kinetis-i2c-norestart (pull request #114 )
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support NORESTART on kinetis i2c
2016-08-14 13:27:39 -06:00
v01d
239c56f3b9
support NORESTART
2016-08-14 16:25:18 -03:00
Gregory Nutt
014b8268cc
Minor stylistic corrections
2016-08-14 10:14:28 -06:00
Gregory Nutt
45e71a140a
Fix some alignment and long line issues
2016-08-13 18:04:09 -06:00
Gregory Nutt
3023724cf2
Changes from review of PR 113
2016-08-13 17:32:35 -06:00
Gregory Nutt
8315b051ca
Merged in v01d/nuttx/kinetis_i2c (pull request #113 )
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I2C and RTC support for Kinetis
2016-08-13 16:54:14 -06:00
Gregory Nutt
8052dc4955
STM32 SPI: nbits should be unsigned. Valid range is 4-16 for F3 and L4. 8 or 16 for others.
2016-08-13 16:01:50 -06:00
v01d
5a97def131
kinetis k20 i2c fixed
2016-08-13 18:48:45 -03:00
Gregory Nutt
1a10518dae
Update ChangeLog
2016-08-13 12:03:12 -06:00
Gregory Nutt
eed5e41626
Add some comments
2016-08-13 10:24:40 -06:00
Gregory Nutt
172761163b
STM32F3 SPI: Cannot write 16-bit value to DR register because of how the F3 implements data packing.
2016-08-13 10:11:23 -06:00
Gregory Nutt
51fcd89b98
Add and fix some SPI debug output
2016-08-13 08:31:37 -06:00
Gregory Nutt
42202c6365
STM32 and STM32L4: Enabling DMA loses other bits in CR2
2016-08-13 08:01:41 -06:00
Gregory Nutt
efc9f674d2
Trivial changes to comments and spacing
2016-08-13 07:50:54 -06:00
Alan Carvalho de Assis
805cb5c752
STM32F3 SPI: Fix a typo
2016-08-13 07:23:48 -06:00
Gregory Nutt
da5563c0e7
STM32: Add conditional logic for STM32F37xx
2016-08-13 06:43:13 -06:00
Gregory Nutt
10f90a1738
STM32 F3: Fix more SPI issues
2016-08-12 19:00:34 -06:00
Gregory Nutt
3383a25c38
Some logic missing from last commit
2016-08-12 18:40:25 -06:00
Gregory Nutt
afb02b56d4
STM32F3 SPI: Fix the number of bit setting for the F3. It works differently than for other parts.
2016-08-12 18:32:37 -06:00
Gregory Nutt
ab16ad7530
Fix some bugs in the oneshot driver logic
2016-08-12 14:19:11 -06:00
Gregory Nutt
046acf6b54
Add a simulated oneshot lowerhalf driver
2016-08-12 13:14:03 -06:00
Gregory Nutt
b4e8876b09
Correct some spacing
2016-08-12 12:41:49 -06:00
Gregory Nutt
82b86cdcf3
oneshot interface: max_delay method should return time in a standard struct timespec form.
2016-08-12 11:33:10 -06:00
Gregory Nutt
89135c55e4
drivers/timer: Add an upper-half, oneshot timer character driver.
2016-08-12 10:40:07 -06:00
Gregory Nutt
61b0ac06bf
Missed a dependency in last set of commits
2016-08-11 17:20:12 -06:00
Gregory Nutt
1965e25da4
STM32L4: Add oneshot lower half driver.
2016-08-11 17:14:41 -06:00
Gregory Nutt
a5a776e223
SAM4CM: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver.
2016-08-11 17:04:19 -06:00
Gregory Nutt
fa6866b046
SAMA5: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver.
2016-08-11 16:47:17 -06:00
Gregory Nutt
b4d4a74059
SAMV7: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver.
2016-08-11 16:27:01 -06:00
Gregory Nutt
d0ce5b1d1e
Cosmetic changes to comments and function prototypes
2016-08-11 15:15:37 -06:00
Gregory Nutt
fb349508fd
STM32 oneshot lower-half: Missed some data initialization.
2016-08-11 14:57:17 -06:00
Gregory Nutt
eb3a565153
STM32: Add oneshot lower half to build system. Fix some build problems.
2016-08-11 14:53:39 -06:00
Gregory Nutt
1bb93021df
STM32: Add a experimental oneshot, lower-half driver for STM32
2016-08-11 14:07:43 -06:00
Gregory Nutt
0e35bad987
Update some comments
2016-08-11 10:12:04 -06:00
Gregory Nutt
accbccd78a
Merged in mlyszczek/nuttx/stm32f1connline_pllfix (pull request #111 )
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Fix bad pllmul values for stm32f1xx connectivity line.
2016-08-11 06:44:19 -06:00
Michał Łyszczek
81df56086a
Fix bad pllmul values for stm32f1xx connectivity line.
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stm32f1xx connectivity line supports only x4, x5, x6, x7, x8, x9 and x6.5 values
2016-08-11 10:49:57 +02:00
Young
e30a3b780c
Fix two bugs of tiva pwm lower-half driver impl.
2016-08-10 13:25:43 +08:00
Gregory Nutt
7823a1680e
Update a comment
2016-08-09 17:08:03 -06:00
Gregory Nutt
698d6d1294
SAM3/4: Extend clocking logic to enable clocking on ports D-F
2016-08-09 17:05:11 -06:00
Gregory Nutt
0918dd98ab
Merged in gnagflow/nuttx (pull request #109 )
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SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input.
2016-08-09 16:40:48 -06:00
Gregory Nutt
fdcf0f7e5f
Correct some comments
2016-08-09 15:15:21 -06:00
Wolfgang Reissnegger
cf35bb0b18
SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input.
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The value of a GPIO input is only sampled when the peripheral clock for
the port controller the GPIO resides in is enabled. Therefore we need
to enable the clock even when polling a GPIO.
2016-08-09 13:23:05 -07:00
Gregory Nutt
b5b7a21bb6
Make reference count a uin16_t and save a couple of bytes.
2016-08-09 13:54:57 -06:00