Commit Graph

11 Commits

Author SHA1 Message Date
Tiago Medicci Serrano
84d39a8d9a binfmt/libelf: Enable ELF loader if text heap read is word-aligned
The ELF loader needs to load the app into the memory before
executing it from the same location. As expected, this memory space
should be able to execute code. For architectures containing data
and instruction buses, the instruction bus may not be able to be
accessed in a non-aligned way, which is usually required when
copying data to that location. Eventually, this same memory space
can be accessed through the data bus, using different address
ranges. This commit enables accessing the memory through the data
bus to copy the app's data before executing it when
`CONFIG_ARCH_HAVE_TEXT_HEAP_WORD_ALIGNED_READ` is enabled.
2024-07-31 02:33:12 +08:00
Ville Juven
996625ec58 riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:

label:
	auipc      a0, %pcrel_hi(symbol)    // R_RISCV_PCREL_HI20
	load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S

With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).

However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.

The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.

[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2023-12-12 17:32:36 -08:00
Xiang Xiao
b5c48f3ed8 binfmt: Always include arch/elf.h in include/nuttx/elf.h
since symbols defined in arch/elf.h is also used in other case, for example:
CC:  pthread/pthread_testcancel.c machine/arm/gnu_unwind_find_exidx.c:32:8: error: unknown type name '__EIT_entry'
   32 | static __EIT_entry *__exidx_start_elf;
      |        ^~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-25 19:02:53 -03:00
Xiang Xiao
51cf7ba05a Remove FAR from arm/risc-v/xtensa/sim/x86
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 13:55:58 +03:00
Abdelatif Guettouche
d85c432278 Few typos fixes in binfmt and libc/machine.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-11 10:35:40 +08:00
YAMAMOTO Takashi
df44909b30 xtensa/arch_elf.c: Ignore R_XTENSA_NONE
Now examples/sotest passes on qemu.
2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
e135c938d2 xtensa: Implement a few relocations 2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
2776a5bbea Replace a few Gregory Nutt's copyright notices with Apache 2.0
The text was copied from sched/sched/sched_getcpu.c.
2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
b2627225bd Update file paths of copy-and-paste'ed files 2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
c7526e551e arch_elf.c: Appease nxstyle errors 2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
5e1b24f012 xtensa: Add modlib boilerplate
This is a modified copy of armv6-m/armv7-m version.
2020-03-16 07:54:49 -06:00