Abdelatif Guettouche
f54804bafc
arch/risc-v/esp32c3: Create a separate heap for the RTC memory.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
7198b3ef4b
risc-v/esp32c3/esp32c3_soc.h: Add a function to check if a pointer is
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within the RTC RAM range.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Sara Souza
8f59054ef2
risc-v/esp32c3: Adds I2C RESET support via hardware.
2021-06-16 21:22:26 -05:00
Janne Rosberg
673f9519eb
risc-v/mpfs: add dma support
2021-06-16 12:22:54 -05:00
Eero Nurkkala
502210e98c
riscv/mpfs: add i2c reset handler
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Add reset functionality into the mpfs i2c driver.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-16 12:31:36 -03:00
Liu Han
04c805207a
risc-v/esp32c3: Support ESP32-C3 efuse
2021-06-16 09:35:09 -03:00
Virus.V
69fce77718
risc-v/bl602: update firmware to fix undefined up_irq_* symbols when linking
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Signed-off-by: Virus.V <virusv@live.com>
2021-06-15 23:25:16 -05:00
Dong Heng
60fb1adaca
riscv: Add inline IRQ process functions
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Remove functions from RISC-V chips.
2021-06-15 23:25:16 -05:00
Xiang Xiao
2e49e1bc5c
mtd: Add MTDIOC_FLUSH IOCTL like MTDIOC_XIPBASE
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since the old design reuse BIOC_FLUSH for
MTD device which make some confusion
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-15 13:26:45 -03:00
Sara Souza
2a7b97c0cd
risc-v/esp32-c3: Adds I2C polled support
2021-06-15 10:51:18 -05:00
Liu Han
8eaaf6d462
risc-v/esp32c3: Support ESP32-C3 RSA accelerator
2021-06-14 15:03:11 -03:00
Masayuki Ishikawa
bafac8b560
arch: k210: Fix stack coloring for the idle thread stack
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Summary:
- I noticed that stack coloring for the idle thread stacks does
not work due to the recent changes
- This commit fixes this issue
Impact:
- k210 only
Testing:
- Tested with both maix-bit (dev board) and QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-12 05:54:08 -05:00
Eero Nurkkala
1bce864ef7
mpfs: add i2c driver
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This adds mpfs i2c driver.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 21:03:42 -05:00
Eero Nurkkala
fad34e04c4
mpfs: add spi driver
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This adds the SPI driver for the MPFS Icicle board.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 09:10:03 -05:00
Abdelatif Guettouche
96bcf7678b
risc-v/esp32c3_wifi_adapter.c: Remove a config that's only used in
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Xtensa chips.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-11 10:49:52 -03:00
Virus.V
7c20199a61
riscv/bl602:replace syslog to debugging log macros
2021-06-10 08:59:16 -05:00
Xiang Xiao
c0fdddc5d7
arch: Remove all go_nx_start from chip specifc source
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since the idle stack color is done in the common code now
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-10 06:50:41 -07:00
Xiang Xiao
fa0d123f87
arch: Colorize the idle thread stack in an unified way
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idae8da53e5a4799a8edc0e882f17fd515b70cb14
2021-06-10 06:50:41 -07:00
Chen Wen
dbf9c87a42
risc-v/esp32c3: Support ESP32-C3 RTC driver
2021-06-10 09:33:04 -03:00
Xiang Xiao
6576306bca
arch: Rename xxx_getsp to up_getsp
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All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-09 10:20:02 -07:00
Xiang Xiao
5b2a17b892
Include assert.h in necessary place
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-08 13:06:08 -07:00
unixjet
68f19a6290
risc-v/rv32m1: Basic port to rv32m1 ri5cy
2021-06-05 17:25:57 -03:00
Gustavo Henrique Nihei
0b3c2c7603
spi: Refactor SPI Slave interface prefix to sync with I2C Slave
2021-06-05 04:50:34 -07:00
Gustavo Henrique Nihei
27782aca19
risc-v/esp32c3: Include missing debug.h header
2021-06-05 04:50:34 -07:00
Gustavo Henrique Nihei
77dfb39260
risc-v/esp32c3: Uniformize references to CPU interrupt ID
2021-06-04 23:26:13 +01:00
Gustavo Henrique Nihei
f53306f9af
risc-v/esp32c3: Ensure internal linkage of interrupt map
2021-06-04 23:26:13 +01:00
Gustavo Henrique Nihei
a2bcffde73
risc-v/esp32c3: Remove unused macros
2021-06-04 23:26:13 +01:00
Abdelatif Guettouche
2d55f2659e
riscv/esp32c3: Add module text allocator.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 18:08:36 -03:00
Abdelatif Guettouche
778e3ed4ad
arch/risc-v/rv32im/riscv_assert.c: Provide dummy definitions of dump
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functions when ARCH_STACKDUMP is not enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 12:20:18 -05:00
Abdelatif Guettouche
94ded7a695
arch/riscv/rv32im/riscv_assert.c: Fix preprocessor condition.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 12:20:18 -05:00
Janne Rosberg
7b882c3588
risc-v/mpfs: fix ext irq 1-12
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Handle irq numbers 1-12 correctly
2021-06-04 10:14:58 -05:00
Jani Paalijarvi
ebdc7a06b1
risc-v/mpfs: add MSTimer register offsets and bitmasks
2021-06-04 10:14:58 -05:00
Janne Rosberg
f7cbed0256
risc-v/mpfs: enable up_systemreset()
2021-06-04 10:14:58 -05:00
Janne Rosberg
ec11643394
risc-v/mpfs: add sysreg register defines
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This adds minimal set of sysreg defines for MPFS
2021-06-04 10:14:58 -05:00
Xiang Xiao
2e54df0f35
Don't include assert.h from public header file
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-03 08:36:03 -07:00
Sara Souza
b54be4e946
risc-v/esp32-c3: Add support for HW flow control.
2021-06-01 21:37:27 -05:00
Gustavo Henrique Nihei
24c206b3f8
risc-v/esp32c3: Add DMA support for the SPI Slave controller
2021-06-01 21:37:09 -05:00
Gustavo Henrique Nihei
15a93ae974
risc-v/esp32c3: Remove Master-only settings on SPI Slave driver
2021-06-01 21:37:09 -05:00
Xiang Xiao
d7f96003cf
Don't include debug.h from public header file
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-01 06:42:02 +09:00
Gustavo Henrique Nihei
1530b0f639
risc-v/esp32c3: Fix overwriting of registered-but-disabled interrupts
2021-05-31 09:15:40 -05:00
Gustavo Henrique Nihei
da78cf78eb
risc-v/esp32c3: Remove useless parameter from DMA macro
2021-05-31 09:14:14 -05:00
Gustavo Henrique Nihei
7e15d897bd
risc-v/esp32c3: Add driver for SPI Slave controller
2021-05-31 12:54:15 +01:00
chenwen
1d1dd8512f
esp32&esp32c3/wifi: Support specific channel and bssid scan
2021-05-31 11:09:19 +01:00
Abdelatif Guettouche
e29da149e3
arch/riscv/src/esp32c3/esp32c3_rt_timer: Fix typos and re-word some
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comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
08aa9ce540
arch/xtensa/src/esp32/esp32_rt_timer: Fix typos and re-word some
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comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
0f3d94e8e8
arch/risc-v/src/esp32c3/esp32c3_rt_timer.h: Add section headers.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Virus.V
c6317650f9
risc-v/bl602: Add RTC support
2021-05-26 20:03:19 -03:00
Gustavo Henrique Nihei
1d940b2982
risc-v/esp32c3: Constify DMA descriptor pointer to buffer
2021-05-26 14:05:27 -03:00
Gustavo Henrique Nihei
29cae80533
risc-v/esp32c3: Fix DMA TX Burst being set to input register
2021-05-26 14:05:27 -03:00
Dong Heng
73dcbac09d
riscv/esp32c3: Add ESP32-C3 AES driver
2021-05-25 11:02:59 -03:00