Commit Graph

16958 Commits

Author SHA1 Message Date
Nathan Hartman
81224cc596 arch/stm32: Fix nxstyle errors
arch/arm/src/stm32/stm32_spi.h:

    * Fix nxstyle issues.
2020-12-30 10:20:15 -06:00
chao.an
961532a5da arch/sim/hci: reuse the reserved fields of hci buffer
Reuse the reserved fields of hci buffer to avoid redundant packet type splitting

Change-Id: I79d70ae939111bb909a6e0981c50e401734590f2
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-12-29 18:10:04 -08:00
chao.an
2ca99ed1be sim/host/hcisocket: add avail/close interface
Change-Id: I3d96f62c4c3c7d703bfec74952953bee4aef9c7c
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-12-29 18:10:04 -08:00
Nathan Hartman
763aae8155 arch/stm32: Fix nxstyle errors
arch/arm/src/stm32/stm32_rtc.h:

    * Fix nxstyle issues.
2020-12-29 08:36:31 -06:00
Virus.V
5f71e2be79 fix ci build failed 2020-12-29 01:52:09 -08:00
Virus.V
3e0a84182e check bl602 license 2020-12-29 01:52:09 -08:00
yangyue
d354a2f19f fix some code style 2020-12-29 01:52:09 -08:00
Virus.V
12258d72d2 Fix the BL602 mtimer frequency error. 2020-12-29 01:52:09 -08:00
Virus.V
2b8e0945a9 Fix BL602 CI Build failed.
Modify the default configuration in KConfig.
Sync latest commit from mainline.

Remove unused demo configuration

fixup bl602 nsh defconfig cause CICD failed

Rebase from mainline code
2020-12-29 01:52:09 -08:00
Virus.V
7e84874cb1 Reconstruct bl602 readme; move up_irq_save/restore declaration to common place 2020-12-29 01:52:09 -08:00
Virus.V
ce40edbd11 Solve the problems pointed out in the comments 2020-12-29 01:52:09 -08:00
Virus.V
417d0d4ccd fix checkpatch warning 2020-12-29 01:52:09 -08:00
Lei Chen
58bd873729 Add Basic support for BL602(UART timer CLIC) 2020-12-29 01:52:09 -08:00
Peter van der Perk
673a4b5b39 arch: S32K/Kinetis: Fix RTC settime prescaler 2020-12-28 23:32:33 +01:00
Sara Souza
65f39fc0c7 xtensa/esp32: Added driver api to reload counter instantly 2020-12-28 12:08:27 +01:00
Masayuki Ishikawa
b784fd6c3c arch: cxd56xx: Replace license header with Apache License 2.0
Summary:
- This commit replaces SHES related headers under cxd56xx

Impact:
- No impact

Testing:
- Build check only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-28 08:43:35 +01:00
dongjiuzhu
b83ae99456 rpmsg_uart: fix compile break when enable rptun
nuttx.rel: In function `rpmsg_serialinit':
nuttx/arch/sim/src/sim/up_rptun.c:257: undefined reference to `uart_rpmsg_init'
collect2: error: ld returned 1 exit status
Makefile:310: recipe for target 'nuttx' failed

Change-Id: I93a20941bc07f749165dc8f012da46ddb7b02b00
Signed-off-by: dongjiuzhu <dongjiuzhu1@xiaomi.com>
2020-12-25 21:07:04 +01:00
YAMAMOTO Takashi
e1c53eaeb0 arch/sim/include/irq.h: Make 32-bit xcpt_reg_t unsigned
* 64-bit version is already unsigned

* up_copyfullstate uses unsigned for 32-bit

 Error: sim/up_unblocktask.c:107:33: error: pointer targets in passing argument 1 of 'up_copyfullstate' differ in signedness [-Werror=pointer-sign]
  107 |           up_savestate(rtcb->xcp.regs);
      |                        ~~~~~~~~~^~~~~
      |                                 |
      |                                 xcpt_reg_t * {aka int *}
sim/up_internal.h:133:45: note: in definition of macro 'up_savestate'
  133 | #define up_savestate(regs) up_copyfullstate(regs, (xcpt_reg_t *)CURRENT_REGS)
      |                                             ^~~~
sim/up_internal.h:205:33: note: expected 'uint32_t *' {aka 'unsigned int *'} but argument is of type 'xcpt_reg_t *' {aka 'int *'}
  205 | void up_copyfullstate(uint32_t *dest, uint32_t *src);
      |                       ~~~~~~~~~~^~~~
2020-12-24 21:57:39 -06:00
Nathan Hartman
080b2dfceb arch/stm32: Fix nxstyle errors
arch/arm/src/stm32/stm32_exti.h:
arch/arm/src/stm32/stm32_flash.c:
arch/arm/src/stm32/stm32_fsmc.c:
arch/arm/src/stm32/stm32_fsmc.h:
arch/arm/src/stm32/stm32_hciuart.h:
arch/arm/src/stm32/stm32_mpuinit.h:
arch/arm/src/stm32/stm32_rtc.c:

    * Fix nxstyle issues.
2020-12-24 23:21:16 +01:00
chao.an
08b22784c3 sim/names: add writev/readv into name list
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-12-24 11:09:59 -03:00
Nathan Hartman
dad32ccd47 arch/stm32: Fix nxstyle errors
arch/arm/src/stm32/stm32_dma.h:

    * Fix nxstyle issues.
2020-12-23 20:35:42 -06:00
Masayuki Ishikawa
ace6e70f57 arch: imx6: Add imx_enet driver
Summary:
- This commit adds imx_enet driver derived from imxrt_enet

Impact:
- imx6 only

Testing:
- Tested with sabre-6quad:netnsh
- NOTE: telnetd works with QEMU
2020-12-23 16:56:25 -03:00
Masayuki Ishikawa
1725e50a13 arch: imx6: Fix peripheral IP offsets in AIPS-2
Summary:
- This commit fixes peripheral IP offsets in AIPS-2

Impact:
- No impact because there is no drivers

Testing:
- Tested with sabre-6quad:nsh and sabre-6quad:smp
2020-12-23 16:56:25 -03:00
Masayuki Ishikawa
4ce99f324e arch: imx6: Fix style warnings in imx_memorymap.h 2020-12-23 16:56:25 -03:00
Fotis Panagiotopoulos
e26daf9357 STM32 FLASH latency is calculated based on Vin. 2020-12-23 08:13:45 -08:00
Michal Lenc
52416888f7 fix nx style warnings and errors
Signed-off-by: Michal Lenc <lencmich@fel.cvut.cz>
2020-12-23 11:19:53 -03:00
liang
b074ebec9e fix redefined CSR_INSTRET 2020-12-23 01:34:14 -06:00
Sara Souza
6a6121378c xtensa/esp32: Fixed wdt typos 2020-12-22 20:32:38 +01:00
YAMAMOTO Takashi
0fbfc4c44c esp32_wifi_adapter.c: file mode for open doesn't make sense for O_RDONLY 2020-12-22 03:37:29 -06:00
Huang Qi
073912e232 Replace all wget with curl
wget is missing from some system (like macOS and Windows native),
it's better to use curl to simplify build environment.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2020-12-22 03:36:10 -06:00
Brennan Ashton
c6947199b2 Bluetooth: Fix bt_buff lifecycle
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-12-21 23:36:57 -06:00
Masayuki Ishikawa
ec73a4e69c arch & sched: task: Fix up_exit() and nxtask_exit() for SMP
Summary:
- During repeating ostest with sabre-6quad:smp (QEMU),
  I noticed that pthread_rwlock_test sometimes stops
- Finally, I found that nxtask_exit() released a critical
  section too early before context switching which resulted in
  selecting inappropriate TCB
- This commit fixes this issue by moving nxsched_resume_scheduler()
  from nxtask_exit() to up_exit() and also removing
  spin_setbit() and spin_clrbit() from nxtask_exit()
  because the caller holds a critical section
- To be consistent with non-SMP cases, the above changes
  were done for all CPU architectures

Impact:
- This commit affects all CPU architectures regardless of SMP

Testing:
- Tested with ostest with the following configs
- sabre-6quad:smp (QEMU, dev board), sabre-6quad:nsh (QEMU)
- spresense:wifi_smp
- sim:smp, sim:ostest
- maix-bit:smp (QEMU)
- esp32-devkitc:smp (QEMU)
- lc823450-xgevk:rndis

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-21 23:29:56 -06:00
Nathan Hartman
78f308ff2c arch/stm32: Fix nxstyle errors
arch/arm/src/stm32/stm32_dac.h:

    * Fix nxstyle issues.
2020-12-21 20:20:17 +01:00
Nathan Hartman
4cefc5ce7a stm32g4: Fix incorrect FLASH wait states
When the architectural support for STM32G4 family was added, the
reference manual (RM0440) was at revision 2. Since then, it has
undergone several revisions. One significant change is in the
table of FLASH wait states: section 3.3.3 table 9. The outcome
of this change is that fewer FLASH wait states are needed for
most CPU clock (HCLK) frequencies. Notably, if running the CPU
clock at the maximum 170 MHz, only 4 FLASH wait states are
needed, rather than the previously programmed 8 wait states.
This gives a noticeable performance boost.

arch/arm/src/stm32/stm32g4xxxx_rcc.c:

    * FLASH_ACR_LATENCY_SETTING: Reimplement compile-time logic
      that selects the required wait state setting to use the new
      updated table.

    * Update all comments to indicate that RM0440 Rev 5 is used.

    * Update section numbers mentioned in comments in cases where
      they have changed due to added sections in the manual.
2020-12-21 18:43:49 +01:00
Xiang Xiao
92cefb0a78 arch/risc-v: Move CSR register bit definition to csr.h
to avoid the macro duplication

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-20 20:27:13 -08:00
Xiang Xiao
41d576f62b arch/riscv: Reuse the common up_schedule_sigaction implementation
to avoid the code duplication

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-20 20:26:27 -08:00
Nathan Hartman
4facd82ae0 arch/stm32: Fix nxstyle errors
arch/arm/src/stm32/stm32_ltdc.h:
arch/arm/src/stm32/stm32_pmsleep.c:
arch/arm/src/stm32/stm32_pmstandby.c:

    * Fix nxstyle issues.
2020-12-19 00:16:47 -06:00
Xiang Xiao
d42c5a0bf6 arch/risc-v: Move csr.h to common place
since CSR definition is same for 32bit and 64bit arch

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-19 08:41:33 +09:00
Xiang Xiao
fe8122ee2b arch/risc-v: Remove duplicated declaration for up_irq_save and up_irq_restore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-19 08:29:42 +09:00
Abdelatif Guettouche
81a9eb190d arch/xtensa/src/esp32/esp32_spiflash.c: Invalidate the cache and
writeback PSRAM data if the flash address used has a cache mapping.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-18 16:43:52 -03:00
chao.an
4a559807a5 arch/netdev: try tcp timer in every txavail call
In the current implementation, the first transmission of the new
connection handshake is depends entirely by tcp_timer(), which will
caused 0.5s - 1s delay each time in connect().

This patch is mainly to improve the performance of TCP handshake.

Original:

nsh> tcp_client
[    1.536100] TCP connect start.
[    2.000200] TCP connect end. DIFF: tick: 4641, 464ms.
[    3.000300] TCP connect start.
[    4.000400] TCP connect end. DIFF: tick: 10001, 1000ms.
[    5.000500] TCP connect start.
[    6.000600] TCP connect end. DIFF: tick: 10001, 1000ms.
[    7.000700] TCP connect start.
[    8.000800] TCP connect end. DIFF: tick: 10001, 1000ms.

Optimized:

nsh> tcp_client
[    3.263600] TCP connect start.
[    3.263700] TCP connect end. DIFF: tick: 1, 0ms.
[    4.263800] TCP connect start.
[    4.263800] TCP connect end. DIFF: tick: 0, 0ms.
[    5.263900] TCP connect start.
[    5.263900] TCP connect end. DIFF: tick: 0, 0ms.
[    6.264000] TCP connect start.
[    6.264000] TCP connect end. DIFF: tick: 0, 0ms.
[    7.264100] TCP connect start.
[    7.264100] TCP connect end. DIFF: tick: 0, 0ms.

Signed-off-by: chao.an <anchao@xiaomi.com>
2020-12-18 14:16:11 +09:00
YAMAMOTO Takashi
48ba0bb30a esp32_wifi_adapter.c: Fix a use-after-free bug 2020-12-17 03:24:15 -06:00
YAMAMOTO Takashi
75bc489e24 esp32: Fix phy_printf
Fix the following error:

CC:  chip/esp32_wifi_adapter.c
In file included from /Users/yamamoto/git/nuttx/nuttx/include/nuttx/mm/shm.h:45,
                 from /Users/yamamoto/git/nuttx/nuttx/include/nuttx/sched.h:42,
                 from /Users/yamamoto/git/nuttx/nuttx/include/sched.h:35,
                 from /Users/yamamoto/git/nuttx/nuttx/include/stdio.h:48,
                 from chip/esp32_wifi_adapter.c:28:
chip/esp32_wifi_adapter.c: In function 'phy_printf':
chip/esp32_wifi_adapter.c:3952:10: error: expected ')' before 'format'
   wlinfo(format, arg);
          ^~~~~~
2020-12-17 03:24:15 -06:00
Christian
abcc41d17d fix: arch/.../stm32h7x3xx_memorymap.h invalid address map for fdcan 2020-12-16 20:27:07 -06:00
Sara Souza
1acba417c4 xtensa/esp32: enables started flag if the wdt was turned on in bootloader 2020-12-16 16:35:55 -03:00
RICHNER Jonathan
6339fcfdd3 arch/arm/src/stm32h7/stm32_ethernet.c: Fix typo in multicast address hash
table registers for STM32H7
2020-12-16 10:01:25 -06:00
Sara Souza
71715aaee8 xtensa/esp32: fixes enable int function and gets apb clk frequency through function 2020-12-16 10:48:02 -03:00
Sara Souza
add46d0408 xtensa/esp32: Added support for RTC WDT 2020-12-16 14:37:39 +01:00
Sara Souza
be12c79c52 xtensa/esp32: Changes in rtc driver to support rtc wdt driver 2020-12-16 14:37:39 +01:00
Abdelatif Guettouche
ecede04263 arch/*/src/Makefile: Generate dependencies for head files.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-15 21:00:52 -06:00