- Reduce "SPI Flash configuration" menu dependency on SPI Flash driver
just to MTD-related configs.
- Move SPI Flash Mode and Frequency configs to SPI Flash configuration
menu.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Make a separate config flag for enabling L2 cache. This is on by
default when compiling a standalone/bootloader configuration, but
can also be disabled for special cases, such as memory testing
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Summary:
- This commit refactors the entry point name for BUILD_KERNEL
to avoid misunderstanding the name
Impact:
- None
Testing:
- Tested with rv-virt:ksmp64
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- I noticed that the OS timer sometimes proceeds fast when
a task is scheduled to run on CPUO via IPI.
- Actually, qemu-rv implementation shares supervisor software
interrupt for both timer and IPI on CPU0.
- This commit fixes this issue.
Impact:
- qemu-rv only
Testing:
- Tested with qemu-6.2
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit adds SMP support for BUILD_KERNEL
Impact:
- RISC-V: BUILD_KERNEL + SMP only
Testing:
- Tested with rv-virt:ksmp64 (will be added later)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Run-time check for L3 page table size, to ensure it is large enough
to map all of the kernel memory.
NOTE: The check has to be run-time, as KFLASH_SIZE/KSRAM_SIZE are really
linker relocation symbols, and thus cannot be utilized compile-time.
L3 table maps 2MB of memory, this brings an implicit requirement for
any L3 region to be aligned to 2MB. This commit adds build time sanity
checks to ensure this requirement is met.
For other SvXX architectures the boundary requirement (might be) is
different.
Summary:
- This commit introduces g_percpu_spin to avoid deadlock
in riscv_percpu.c instead of using the global spinlock.
Impact:
- None
Testing:
- Tested with rv-virt:knsh64 and rv-virt:ksmp64 (will be added later)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
This allows properly using 10/100Mbps also with 1G phy. Some gigabit PHYs
come out of reset with 1G advertisement enabled, causing other devices to
set up link with 1G. If, after this, the link is set to 10/100 on the mpfs,
the link won't work.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Summary:
- In RISC-V, BUILD_KERNEL uses S-mode and to use M-mode timer
we need to handle it by using OpenSBI or self-implementation.
- This commit adds M-timer self-implementation for BUILD_KERNEL.
Impact:
- qemu-rv only
Testing:
- Tested with rv-virt:knsh64 on qemu-6.2
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- I found inappropriate SET_CSR() usage in the function.
- This PR fixes this issue.
Impact:
- None
Testing:
- tested with rv-virt:knsh64
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- I noticed that the OpenSBI library depends on the BSD license
- This commit fixes this issue
Impact:
- CONFIG_OPENSBI=y only
Testing:
- Build with icicle:opensbi (will be updated later)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Because a context switch issue still exists with FPU
the configs should be removed until it works.
Impact:
- None
Testing:
- Tested with ostest
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
undeclare TCGETS on esp32c3 when enable usbserial and termios
error:
chip/esp32c3_usbserial.c: In function 'esp32c3_ioctl':
chip/esp32c3_usbserial.c:411:10: error: 'TCGETS' undeclared (first use in this function)
Situation:
Assume we have 2 cpus, and busy run task0.
CPU0 CPU1
task0 -> task1 task2 -> task0
1. remove task0 form runninglist
2. take task1 as new tcb
3. add task0 to blocklist
4. clear spinlock
4.1 remove task2 form runninglist
4.2 take task0 as new tcb
4.3 add task2 to blocklist
4.4 use svc ISR swith to task0
4.5 crash
5. use svc ISR swith to task1
Fix:
Move clear spinlock to the end of svc ISR
Signed-off-by: ligd <liguiding1@xiaomi.com>
Simplify the clock mode from the board.h -files. Also make the
SD clock definable as well.
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Some related products, such as Aries m100pfs, don't support eMMC
speeds up to 200MHz. Thus, provide option to select slower clock.
This has only to do with the clocking, no CMD6 is sent to select
high speed modes.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
The L3 mapping function was just way too simplistic. Depending on memory
configuration it either works or not.
Noticed that with icicle:pnsh the software crashes due to instruction
page fault, reason is the map_region() implementation that does not
work for regions that are not aligned to 2MB (the L2 page size).
Implemented an extremely simplistic page table allocator for the L3
references, that should once and for all get rid of the L3 mapping issue.
NOTE: gran_alloc() cannot be used at this point, it is too early for it.
