Commit Graph

22296 Commits

Author SHA1 Message Date
Xiang Xiao
fcb3e84c24 can: Merge netpacket/can.h into nuttx/can.h
To align with the layout of Linux can header file.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-08-26 05:05:31 -04:00
Windrow14
cc8d453b5a arch/xtensa/src/esp32s3/esp32s3_sdmmc.c: wait for command done event also on error response
Wait for CMDDONE in esp32s3_waitresponse even an error response is received.
Otherwise, the CMDDONE event of this command will disrupt later command.

Signed-off-by: Yinzhe Wu <Yinzhe.Wu@sony.com>
Reviewed-by: Yuezhang Mo <Yuezhang.Mo@sony.com>
Reviewed-by: Jacky Cao <Jacky.Cao@sony.com>
Tested-by: Yinzhe Wu <Yinzhe.Wu@sony.com>
2024-08-26 13:44:57 +08:00
yinshengkai
84333881d7 mm: add mm_largest api to get the current largest available memory block
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-08-25 23:09:28 +08:00
yinshengkai
49d1b4198f mm: add memory pressure notification support
Add mm_heap_free interface to pass remaining memory to memory pressure

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-08-25 23:09:28 +08:00
yanghuatao
fac44ab8aa nuttx/mps2: Support NuttX running on qemu cortex-m7
Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-08-25 22:56:46 +08:00
Xiang Xiao
d3be25d90c arch/arm: Add the support of MPS2 AN386 and AN500
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-08-25 22:56:46 +08:00
hujun5
1d6a099180 irq: remove restore_critical_section in irq
Only in the non-critical region, nuttx can the respond to the irq and not hold the lock
When returning from the irq, there is no need to check whether the lock needs to be released
we also need keep restore_critical_section in svc call

test:
Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
   -machine virt,virtualization=on,gic-version=3 \
   -net none -chardev stdio,id=con,mux=on -serial chardev:con \
   -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-08-25 21:14:19 +08:00
Petro Karashchenko
d499ac9d58 nuttx: fix multiple 'FAR', 'CODE' and style issues
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-08-25 19:22:15 +08:00
Petro Karashchenko
7b18f9d19f nuttx: add missing 'FAR' and fix style issues
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-08-25 19:22:15 +08:00
Petro Karashchenko
a8ec8b8cd2 arch/x86_64: remove 'ul' sufix from shift value
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-08-25 19:22:15 +08:00
Petro Karashchenko
b7cbe16fed arch/x86_64: remove redundant init
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-08-25 19:22:15 +08:00
Petro Karashchenko
f40b09cbc9 style: remove redundant spaces
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-08-25 19:22:15 +08:00
Petro Karashchenko
d252b6229f nuttx: use sizeof instead of define or number in snprintf
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-08-25 19:22:15 +08:00
Kevin Zhou
bf57047429 xtensa/esp32s3: Separate address and command flag for QSPI DMA transfer 2024-08-24 11:31:35 +08:00
Yanfeng Liu
634ee5b1f6 board/maix-bit: add cmake support
This adds initial CMake support for `maix-bit` device.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-24 11:08:25 +08:00
Ville Juven
29f8648ecc arm64: Initial implementation of CONFIG_BUILD_KERNEL
This is the initial version for kernel mode build on the arm64 platform.
It works much in the same way as the risc-v implementation so any
highlights can be read from there.

Features that have been tested working:
- Creating address environments
- Loading init (nsh) from elf file
- Booting to nsh
- Starting other processes from nsh
- ostest runs to completion

Features that are not tested / do not work:
- SHM / shared memory support
- Kernel memory mapping (MM_KMAP)
- fork/vfork

An example qemu target is provided as a separate patch:
tools/configure.sh qemu-armv8a:knsh
2024-08-23 10:26:34 -03:00
Ville Juven
7f228b1554 arm64/barriers.h: Generalize barrier macros
Make it possible to define arguments for barriers
2024-08-23 10:26:34 -03:00
Ville Juven
52781221b3 arm64_sync_exc: Use temporaries x9/x10 instead of x0/x1
Why? Because this allows optimizing the user system call path in such
a way that the parameter registers don't have to be read from the saved
integer register context when the system call is executed.
2024-08-23 10:26:34 -03:00
wangchen
f0cdaca660 nuttx-names.in:add popen & pclose assign to glibc interface
Signed-off-by: wangchen <wangchen41@xiaomi.com>
2024-08-23 20:20:25 +08:00
chao an
a0afd38f24 arm/spinlock: up_testset() sould not depends on SMP
up_testset() sould not depends on SMP

Signed-off-by: chao an <anchao@lixiang.com>
2024-08-23 20:20:06 +08:00
Xu Xingliang
cfdbc856ff sim/lcd: fix compile break
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2024-08-23 15:26:16 +08:00
jianglianfang
a5afa11238 sim: Support to use of non-consecutive framebuffers
Some hardware devices use discontinuous framebuffers, which require SIM support for simulating discontinuous framebuffers.

Signed-off-by: jianglianfang <jianglianfang@xiaomi.com>
2024-08-23 15:26:16 +08:00
Yanfeng Liu
74080e8659 arm/qemu: use WFI to avoid busy loop
This adds WFI based up_idle() for arm/qemu to fix busy loop.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-23 15:09:44 +08:00
Matheus Catarino
93b520f7b0 swift6 embedded support 2024-08-23 09:02:20 +08:00
yinshengkai
53ddc3ef7f arch/sim: suppress libasan checks
There is a false positive in asan of gcc-13, we need to mask it to ensure that other parts work properly

sanitizer_common/sanitizer_common_interceptors.inc:
   // FIXME: under ASan the call below may write to freed memory and corrupt
   // its metadata. See
   // https://github.com/google/sanitizers/issues/321.

==572161==ERROR: AddressSanitizer: dynamic-stack-buffer-overflow on address 0xed3d3f00 at pc 0xef46af64 bp 0xed3d3de8 sp 0xed3d39bc
WRITE of size 128 at 0xed3d3f00 thread T0
     #0 0xef46af63 in __interceptor_pthread_sigmask ../../../../../src/libsanitizer/sanitizer_common/sanitizer_common_interceptors.inc:4419
     #1 0x5486aa7d in up_irq_save sim/posix/sim_hostirq.c:97

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-08-23 08:53:52 +08:00
yinshengkai
0111cb73f1 sim: update sim_asan dependencies
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-08-23 08:53:52 +08:00
jinxiuxu
b874d95beb drivers/audio: fix samp rate conversion issue
Signed-off-by: jinxiuxu <jinxiuxu@xiaomi.com>
2024-08-22 09:13:51 -03:00
jinxiuxu
618a51fa84 audio: add 12K support in sim_alsa driver
Signed-off-by: jinxiuxu <jinxiuxu@xiaomi.com>
2024-08-22 09:13:51 -03:00
jianglianfang
f5fe7646ed sim: read the second buffer
It can only read the contents of the first buffer, so fblen should be changed to ensure that it can read the second buffer as well.

Signed-off-by: jianglianfang <jianglianfang@xiaomi.com>
2024-08-22 16:17:43 +08:00
Yanfeng Liu
01219b415c board/qemu-armv7a: add Cmake support
This adds Cmake support for `qemu-armv7a` device.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-08-22 15:25:02 +08:00
fangxinyong
9b3fe17743 arch/arm/arm_mpu.c: fix build warning
armv7-m/arm_mpu.c: In function 'mpu_dump_region':
armv7-m/arm_mpu.c:621:13: warning: format '%X' expects argument of type 'unsigned int', but argument 4 has type 'long unsigned int' [-Wformat=]
  621 |       _info("MPU-%d, alignedbase=0%08X l2size=%"PRIu32" SRD=%X"
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
armv7-m/arm_mpu.c:621:13: warning: format '%X' expects argument of type 'unsigned int', but argument 6 has type 'long unsigned int' [-Wformat=]
  621 |       _info("MPU-%d, alignedbase=0%08X l2size=%"PRIu32" SRD=%X"
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
armv7-m/arm_mpu.c:621:13: warning: format '%X' expects argument of type 'unsigned int', but argument 7 has type 'long unsigned int' [-Wformat=]
  621 |       _info("MPU-%d, alignedbase=0%08X l2size=%"PRIu32" SRD=%X"
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
armv7-m/arm_mpu.c:621:13: warning: format '%u' expects argument of type 'unsigned int', but argument 8 has type 'long unsigned int' [-Wformat=]
  621 |       _info("MPU-%d, alignedbase=0%08X l2size=%"PRIu32" SRD=%X"

Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
2024-08-22 01:58:46 +08:00
chenrun1
3a6a23d157 xtensa_mpu:Modify the specified Region attributes
Due to the xtensa mpu feature, the size of the Region depends on the Base of the next Region. e.g.
Region[1] = 0x20000000
Region[0] = 0x30000000
Then Region[1] length = Region[0] - Region[1]
So this approach is not suitable to implement the behavior of cleaning
up the Region and such a configuration will result in affecting the very beginning (the higher) Region
Therefore, to address this feature, in this change we return the Region
value and implement the ability to modify the target Region's attributes

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-08-22 01:58:46 +08:00
chenrun1
054c564a2d arm_mpu:Fix mpu_initialize not taking effect
Modified the input parameters of mpu_initialize to require the caller to provide the number of entries in the table

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-08-22 01:58:46 +08:00
chenrun1
62f598e547 arm_mpu:Reentrant allocation Region
Changes have been completed:
1.armv7m
2.armv8m
3.armv7r
4.arm64

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-08-22 01:58:46 +08:00
chenrun1
8e1a042eef nuttx/atomic.h:Fix missing type declarations at compile time
Summary:
  1.Modify the conditions for entering different include header files
  2.Added pre-definition for _Atomic _Bool when it is missing
  3.Added nuttx for stdatomic implementation. When toolchain does not support atomic, use lib/stdatomic to implement it

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-08-22 01:44:29 +08:00
chenrun1
667e92390b nuttx/atomic.h:replace ALL stdatomic.h with nuttx/stdatomic.h in nuttx/
Summary:
  1. Add nuttx/atomic.h in include
  2. Use nuttx/atomic.h instead of stdatomic.h in the nuttx directory

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-08-22 01:44:29 +08:00
liqinhui
91d849b70e simwifi: Resolve the error of getting the network ID.
Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2024-08-21 23:36:26 +08:00
liqinhui
6d3fdd4f15 simwifi: Suppress the scanning times to avoid the popen crash.
Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2024-08-21 23:36:26 +08:00
liqinhui
577e2fa73f simwifi: Avoid to set the mode of wlan repeatedly.
Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2024-08-21 23:36:26 +08:00
liqinhui
01b39074a2 simwifi: Support the ioctl of SIOCGIWENCODEEXT and SIOCGIWSENS.
Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2024-08-21 23:36:26 +08:00
shizhenghui
8d1f4e9697 sim_camera: rename video to camera
Signed-off-by: shizhenghui <shizhenghui@xiaomi.com>
2024-08-21 23:29:47 +08:00
shizhenghui
6ff3ed83fc m2m sim codec: add wqueue.h to fix build warning
Signed-off-by: shizhenghui <shizhenghui@xiaomi.com>
2024-08-21 23:29:47 +08:00
Tiago Medicci Serrano
568917bfd2 espressif: Fix MCUboot build on RISC-V and unify linker script
This commit fixes building MCUboot on Espressif's RISC-V SoCs and
unify the associated linker scripts to make improve readability.
2024-08-21 23:28:45 +08:00
Tiago Medicci Serrano
5680e9d5a4 espressif: Update internal libraries reference
Update internal reference to get the most updated Espressif's
libraries. Those libraries are based on branch `release/v5.1` of
the ESP-IDF and include `v5.1.4` version of it.
2024-08-21 23:28:45 +08:00
jinxiuxu
45d41af6db nuttx/audio: add offload buffer size config
Signed-off-by: jinxiuxu <jinxiuxu@xiaomi.com>
2024-08-21 17:59:28 +08:00
jinxiuxu
31fe15b6e0 audio:fix crash when driver_audio capture
sim/posix/sim_alsa.c:728:24: runtime error: member
access within null pointer of type 'const struct sim_codec_ops_s'

Signed-off-by: jinxiuxu <jinxiuxu@xiaomi.com>
2024-08-21 17:59:28 +08:00
qiaohaijiao1
d7088fe376 sim/alsa: use default bps as 16 in offload mode.
Signed-off-by: qiaohaijiao1 <qiaohaijiao1@xiaomi.com>
2024-08-21 17:59:28 +08:00
chenrun1
bb4d710d62 xtensa_cache:Disable clean/flush optimization in case of SMP restriction
In a multicore task scenario, there may be a situation where the task runs on different cores at different time slices (when the task is not bound to a particular core).
When the task calls cache clean/flush(range > cache size), depending on the optimization, clean_all, flush_all are called. however, at this point, there may be dirty data or incomplete data profiles in the cache on the kernel that is running the task, which may result in dirty data being flushed into memory or make the application think that the flushed data should be successfully flushed into memory, leading to unknown consequences.

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-08-21 03:04:41 +08:00
chenrun1
91cf97ed84 arm_cache:Disable clean/flush optimization in case of SMP restriction
In a multicore task scenario, there may be a situation where the task runs on different cores at different time slices (when the task is not bound to a particular core).
When the task calls cache clean/flush(range > cache size), depending on the optimization, clean_all, flush_all are called. however, at this point, there may be dirty data or incomplete data profiles in the cache on the kernel that is running the task, which may result in dirty data being flushed into memory or make the application think that the flushed data should be successfully flushed into memory, leading to unknown consequences.

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-08-21 03:04:41 +08:00
wangming9
0c12fb9237 arm/armv8-r: Fix cache interface
Signed-off-by: wangming9 <wangming9@xiaomi.com>
2024-08-21 03:04:41 +08:00