Gregory Nutt
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faca2fb1e7
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ARMv7-A/i.MX6: Add logic to handle allocation of CPU IDLE thread stacks more efficiently
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2016-05-13 11:39:42 -06:00 |
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Gregory Nutt
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d14d84c1a6
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ARMv7M/i.MX6: Implement CPUn n=1,2,3 startup logic
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2016-05-13 09:11:55 -06:00 |
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Gregory Nutt
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70782b0f14
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ARMv7-A i.MX6: More SMP logic. Still untested.
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2016-05-12 15:04:46 -06:00 |
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Gregory Nutt
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99e695398c
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Rename up_boot to arm_boot
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2016-05-12 13:42:49 -06:00 |
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Gregory Nutt
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26ba3a2b96
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Cosmetic changes from review of last PR
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2016-04-18 06:50:45 -06:00 |
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Gregory Nutt
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84b399136e
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GIC: Level or edge sensitive interrupt?
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2016-04-01 13:26:57 -06:00 |
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Gregory Nutt
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f698f3dcbe
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ARMv7-A GIC: Fix another initialization errors
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2016-04-01 08:53:43 -06:00 |
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Gregory Nutt
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ddc1b88027
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ARMv7-A GIC: Fix some initialization errors
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2016-04-01 08:40:51 -06:00 |
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Gregory Nutt
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855c9a5225
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ARMv7-A GIC: Move debug logic to a separate file; fix some errors in debug logic.
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2016-04-01 06:58:49 -06:00 |
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Gregory Nutt
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37cacc6178
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ARMv7 GIC: Fix some formatting errors in GIC debug output
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2016-03-31 18:26:15 -06:00 |
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Gregory Nutt
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70683d08bc
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i.MX6: Add GIC debug output
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2016-03-31 17:25:04 -06:00 |
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Gregory Nutt
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756e6050e4
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ARMv7-A: Need to set bits in the ICDDCR to enable forwarding of interrupts
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2016-03-31 09:18:55 -06:00 |
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Gregory Nutt
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12064b276a
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ARMv7-A: Fix an error in GIC initialization
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2016-03-31 08:05:12 -06:00 |
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Gregory Nutt
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1c56b8dd87
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Update some ARM registers for Cortex-A9
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2016-03-29 11:47:35 -06:00 |
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Gregory Nutt
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dcc93a7a44
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Make it clear that GIC support is GICv2
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2016-03-14 10:50:54 -06:00 |
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Gregory Nutt
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41b3af52b7
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i.MX6: Revamp GIC initialization logic; add missing register bit definitions and initialization of GIC control register for secure cases
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2016-03-13 10:12:45 -06:00 |
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Gregory Nutt
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6288e381ee
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Conform to revised SMP interfaces. Improve i.MX6 SMP startup handshake.
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2016-03-12 15:22:45 -06:00 |
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Gregory Nutt
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8ad1188fe5
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i.MX6: Finish initial cut at all SMP support
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2016-03-12 13:23:49 -06:00 |
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Gregory Nutt
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cbe7321508
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i.MX6: Finish GIC initialization
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2016-03-12 11:38:16 -06:00 |
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Gregory Nutt
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4d484399a9
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ARM: Remove some obsolete and incorrect conditional compilation
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2016-03-11 12:42:58 -06:00 |
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Gregory Nutt
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87e7e135ba
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i.MX6: GIC decode and prioritization logic
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2016-03-11 09:49:00 -06:00 |
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Gregory Nutt
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bc0fb5453a
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i.MX6: A little more GIC initialization logic
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2016-03-11 09:00:49 -06:00 |
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Gregory Nutt
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3d6519a223
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Implement Cortex-A9 up_cpu_index() using the MPIDR register. Thanks Alan.
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2016-03-10 14:02:58 -06:00 |
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Gregory Nutt
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a94febb551
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MPCore: Fix missing header file inclusion; Add GIC-based implementations of up_enabable_irq(0 and up_disable_irq()
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2016-03-10 08:37:34 -06:00 |
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Gregory Nutt
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5c75f83b55
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ARMv7-A GIC: Add definitions for shared interrupt IDs
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2016-03-10 07:13:40 -06:00 |
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Gregory Nutt
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4d4f54a789
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Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs
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2016-03-09 13:41:48 -06:00 |
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Gregory Nutt
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7b0a696498
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i.MX6: Add a system timer based on the i.MX6 GPT
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2016-03-09 12:16:44 -06:00 |
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Gregory Nutt
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80dce6dba1
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i.MX6: Add incomplete GPT header file
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2016-03-09 09:08:01 -06:00 |
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Gregory Nutt
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613786ff3d
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ARMv7-A: Add global timer header file
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2016-03-09 08:36:22 -06:00 |
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Gregory Nutt
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c404eae718
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Costmetic update to comments
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2016-03-03 09:12:13 -06:00 |
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Gregory Nutt
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3a14a4c4c6
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i.MX6: Put in basic framework for interrupt handling
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2016-03-03 08:50:56 -06:00 |
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Gregory Nutt
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a0783791a9
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GIC: Fix some name collisions and naming inconsistencies
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2016-03-03 08:50:25 -06:00 |
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Gregory Nutt
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52d499ba33
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ARMv7-A: Add hooks for some common GIC logic
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2016-03-02 14:56:54 -06:00 |
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Gregory Nutt
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db331d47dd
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ARMv7-A: Clean up some kruft in gic.h
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2016-03-01 12:55:48 -06:00 |
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Gregory Nutt
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f2eb90cd1c
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i.MX6: Add definition of base address of ARM multi-core registers
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2016-03-01 08:26:30 -06:00 |
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Gregory Nutt
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6949ff553b
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ARMv7-A: Revamp gic.h. Add mpcore.h
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2016-03-01 08:21:26 -06:00 |
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Gregory Nutt
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bb62237c80
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ARMv7-A: gic.h: Use register names from MPCore spec
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2016-02-29 19:25:59 -06:00 |
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Gregory Nutt
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1fdc8db30c
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ARMv7-A: Add GIC register definition header file
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2016-02-29 18:13:51 -06:00 |
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Gregory Nutt
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83bc1c97c3
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Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore()
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2016-02-14 16:11:25 -06:00 |
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Gregory Nutt
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70e502adb0
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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()
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2016-02-13 19:11:09 -06:00 |
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Gregory Nutt
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a6eb9a351c
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Add spinlock support for ARMv7-M architectures
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2016-02-09 13:44:22 -06:00 |
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Gregory Nutt
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5d449e9991
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Add spinlock support for ARMv7-A architectures
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2016-02-09 12:53:10 -06:00 |
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Gregory Nutt
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ed4e3c0a9e
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ARM: Replace explicit references to g_readytorun with indirect references via the macro this_task()
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2016-02-06 13:41:28 -06:00 |
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Gregory Nutt
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10001f8556
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WINTOOl should be selected only for Cygwin. MSYS and native should not have it.
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2016-01-09 16:34:33 -06:00 |
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Gregory Nutt
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6d0650349a
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Add support for ARM big-endian toolchains with prefix armeb-
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2015-12-26 18:13:01 -06:00 |
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Gregory Nutt
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9bcf27d15b
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TMS570 is big-endian
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2015-12-26 14:47:54 -06:00 |
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Gregory Nutt
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092c681157
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TMS570: Add a little more IRQ/FIQ logic
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2015-12-21 10:57:01 -06:00 |
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Gregory Nutt
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63d5032d3b
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TMS4570: Was not building arm_head.S or up_allocateheap.c; ARMv7-R: Fix variious problems not that arm_head.S is being built
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2015-12-19 18:56:23 -06:00 |
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Gregory Nutt
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bacf7cf07e
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ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit
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2015-12-16 09:03:14 -06:00 |
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Gregory Nutt
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1f05f49e66
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ARMv7-A: Update some co-processor register naming
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2015-12-14 13:04:03 -06:00 |
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