Commit Graph

16208 Commits

Author SHA1 Message Date
Jukka Laitinen
91779e997a arch/arm/src/stm32h7/hardware/stm32h7x3xx_spi.h: Fix nxstyle issues
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-06-03 07:06:30 -07:00
David Sidrane
698ac72dae stm32h7:stm32_sdmmc fix compiler error when SDMMC2 is enabled 2020-06-02 17:51:23 -06:00
Gregory Nutt
0da3400009 ez80: Fix ez80 build problems.
arch/z80/src/Makefile:  Correct inclusion of non-existent file.  This was not a problem before because there was '-' before the include.  Problem revealed with '-' removed.

arch/z80/src/ez80/Toolchain.defs:  Apparently there are not too many '"' in path definition.

tools/incdir.c:  No space between -usrinc:  or -sysinc:  and the list of paths.
2020-06-02 13:20:51 -03:00
Xiang Xiao
ed0c38cb7a arch/intel64: Don't include immintrin.h
because it will bring a lot of host header files

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-06-01 08:22:46 -06:00
Xiang Xiao
b932b653dd arch: Select 64bit elf base on the architecture characteristic
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I09eec5a76f255016a910cfec3b3f70cd7577525e
2020-05-31 21:38:32 -07:00
Xiang Xiao
f6a87c5c15 arch: Change dependence from ELF to LIBC_ARCH_ELF
since LIBC_MODLIB need to be considered too

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I220b25afa08727af954ccbb40ac987b66113b2be
2020-05-31 21:38:32 -07:00
David Sidrane
1b8c072802 stm32h7:stm32_spi Restores internal DMA buffer broken in 574b25
574b25 broke the internal DMA buffers usage that solved
   the following problem: The DMA capable interface does
   not know the buffers extent. It calulates it from size.
   The user may need to transfer less than a cachline bytes,
   but STILL have a DMA cabable buffer. The user is therefore
   foreced to transfer more data then needed to "trick" the
   DMA cabable function. This is a wast of bus bandwith and
   may not work will all devices. The internal buffer, solve
   this issue.

stm32h7:stm32_spi review changes

   Added sugestion from jlaitine to support RX only.
2020-05-29 13:08:18 -07:00
RB
f47151f8a7 Updated Rx65n rtc for non CONFIG_RTC_HIRES
Added support for non CONFIG_RTC_HIRES
2020-05-28 16:16:25 -06:00
Jukka Laitinen
48c88f2af3 arch/arm/src/stm32h7: Add the spi slave bus control driver
This is a work in progress, and now only serves as
DMA enabled simplex RX-only mode bus controller

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-28 05:14:38 -07:00
Jukka Laitinen
b2a9a8cf81 arch/arm/src/samv7/sam_spi_slave.c: Change for modified spi slave interface
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-28 05:14:38 -07:00
Jukka Laitinen
8d3c9a8773 arch/arm/src/stm32h7/stm32_spi.h: Split long lines
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-28 05:14:38 -07:00
Masayuki Ishikawa
3f88f57666 arch: imxrt: Fix style violations in imxrt_clockconfig.c 2020-05-26 16:30:04 +02:00
Masayuki Ishikawa
8dda796e6a arch: imxrt: Set the low power mode to 'remain in run mode'
NOTE: now imxrt can wake up from wfi
2020-05-26 16:30:04 +02:00
JacobCrabill
a4012bffa8 stm32h7:stm32h7x3xx_rcc Select FDCAN clock source 2020-05-26 03:57:34 -07:00
Gregory Nutt
82debdc213 Make task_init() and task_activate() internal OS functions.
-Move task_init() and task_activate() prototypes from include/sched.h to include/nuttx/sched.h.  These are internal OS functions and should not be exposed to the user.
-Remove references to task_init() and task_activate() from the User Manual.
-Rename task_init() to nxtask_init() since since it is an OS internal function
-Rename task_activate() to nxtask_activate since it is an OS internal function
2020-05-25 23:54:45 +01:00
Yang Chung-Fan
9345cb5553 arch: x86: Set the idle task stack to prevent get/set errno on idle task resulting NULL reference 2020-05-25 11:18:03 -06:00
Xiang Xiao
37685110cb arch/sim: Fix hostfs.h No such file or directory in makedep
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-25 09:34:47 -06:00
raiden00pl
d66cb505a5 nrf52: add workaround to SPI Master 1 Byte transfer anomaly 2020-05-25 08:12:14 -06:00
Xiang Xiao
e83c1400b6 build: Move BOARD_DIR definition to common place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 20:20:12 +01:00
Xiang Xiao
7e5b0f81e9 build: Replace -I with INCDIR
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 20:20:12 +01:00
Xiang Xiao
23668a4b9b build: Remove the empty variable assignment
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 08:24:13 -06:00
Xiang Xiao
edb0ce2d5a build: Don't need use $(DELIM) in include statement
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 08:24:13 -06:00
Masayuki Ishikawa
36c1f7ccf0 arch: tiva: Introduce tiva_idle.c 2020-05-24 09:44:46 -03:00
Xiang Xiao
dd61d3d9f9 build: Remve the unnecessary .gitignore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-23 18:00:40 +01:00
David Sidrane
1c2e8cbb36 stm32h7 stm32h7x3xx_rc: Fix CS violation 2020-05-23 09:16:30 -03:00
David Sidrane
19111d9d85 stm32h7:stm32h7x3xx_rcc SDMMC2EN is in RCC_AHB2ENR 2020-05-23 09:16:30 -03:00
David Sidrane
21a96c4784 stm32h7:ethernet Use proper Clock limits for H7 2020-05-23 09:16:30 -03:00
David Sidrane
d93091459d stm32h7:stm32h7x3xx_pinmap Fix missing | 2020-05-23 09:16:30 -03:00
David Sidrane
bcf673a673 stm32h7 stm32h7x3xx_irq: Fix CS violation 2020-05-23 09:16:30 -03:00
David Sidrane
f5482b50ee stm32h7:stm32h7x3xx_irq STM32_IRQ_SDMMC->STM32_IRQ_SDMMC2 2020-05-23 09:16:30 -03:00
Nathan Hartman
168a4cafc6 Add support for STM32G474: Modify existing files
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.

This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.

arch/arm/Kconfig:
arch/arm/include/stm32/chip.h:
arch/arm/include/stm32/irq.h:
arch/arm/src/stm32/Kconfig:
arch/arm/src/stm32/hardware/stm32_adc.h:
arch/arm/src/stm32/hardware/stm32_adc_v2.h:
arch/arm/src/stm32/hardware/stm32_dma.h:
arch/arm/src/stm32/hardware/stm32_dma_v1.h:
arch/arm/src/stm32/hardware/stm32_flash.h:
arch/arm/src/stm32/hardware/stm32_i2c.h:
arch/arm/src/stm32/hardware/stm32_i2c_v2.h:
arch/arm/src/stm32/hardware/stm32_memorymap.h:
arch/arm/src/stm32/hardware/stm32_pinmap.h:
arch/arm/src/stm32/hardware/stm32_tim.h:
arch/arm/src/stm32/stm32_allocateheap.c:
arch/arm/src/stm32/stm32_dma.c:
arch/arm/src/stm32/stm32_dma_v1.c:
arch/arm/src/stm32/stm32_dumpgpio.c:
arch/arm/src/stm32/stm32_gpio.c:
arch/arm/src/stm32/stm32_gpio.h:
arch/arm/src/stm32/stm32_lowputc.c:
arch/arm/src/stm32/stm32_rcc.c:
arch/arm/src/stm32/stm32_rcc.h:
arch/arm/src/stm32/stm32_serial.c:
arch/arm/src/stm32/stm32_syscfg.h:
arch/arm/src/stm32/stm32_uart.h:

    * Add architectural support to existing NuttX files. This
      makes the STM32G474 family parts accessible to the system.

With big thanks for detailed code review:
    David Sidrane (davids5)
    Mateusz Szafoni (raiden00)
    Abdelatif Guettouche (Ouss4)
2020-05-23 09:02:00 -03:00
Nathan Hartman
3b4e4c603f Add support for STM32G474: New files
Add support for the STM32G474 family of microcontrollers and the
B-G474E-DPOW1 Discovery Board, which features a STM32G474RET6.

This is a major pull request as it adds support for an entirely
new family of STM32. This support is implemented in
arch/arm/src/stm32 and shares implementation with other STM32
families supported by that code, such as the 'L15xx, 'F10xx,
'F20xx, 'F3xxx, and 'F4xxx.

arch/arm/include/stm32/stm32g47xxx_irq.h:
arch/arm/src/stm32/hardware/stm32g474cxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474mxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474qxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474rxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g474vxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_gpio.h:
arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pinmap.h:
arch/arm/src/stm32/hardware/stm32g47xxx_pwr.h:
arch/arm/src/stm32/hardware/stm32g47xxx_rcc.h:
arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h:
arch/arm/src/stm32/hardware/stm32g47xxx_uart.h:
arch/arm/src/stm32/stm32g47xxx_rcc.c:

    * New files required for architectural support. Note that
      existing NuttX files are not modified. As such, in this
      revision, the system is unaffected by their addition.

With big thanks for detailed code review:
    David Sidrane (davids5)
    Mateusz Szafoni (raiden00)
    Abdelatif Guettouche (Ouss4)
2020-05-23 09:02:00 -03:00
David Sidrane
31bb58548d stm32h7:ethernet Use UUID for MAC 2020-05-23 04:41:32 -07:00
Xiang Xiao
1a95cce1a3 build: Move .config check to the top Makefile
remove the workaround to handle the inexistence of .config/Make.defs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-20 17:57:34 +01:00
Nathan Hartman
62c5593674 stm32: nxstyle fixes
arch/arm/src/stm32/stm32_gpio.c
arch/arm/src/stm32/stm32_rcc.c
arch/arm/src/stm32/stm32_rcc.h

    * nxstyle fixes, mostly long lines
2020-05-20 11:24:58 +08:00
Nathan Hartman
34286dfdac stm32: nxstyle fixes
arch/arm/include/stm32/irq.h:
arch/arm/src/stm32/hardware/stm32_dma_v1.h:
arch/arm/src/stm32/hardware/stm32_i2c.h:
arch/arm/src/stm32/hardware/stm32_pinmap.h:
arch/arm/src/stm32/stm32_dma.c:
arch/arm/src/stm32/stm32_dumpgpio.c:
arch/arm/src/stm32/stm32_gpio.h:

    * nxstyle fixes, mostly long lines
2020-05-20 11:23:48 +08:00
Nathan Hartman
ca8585e8e7 stm32: nxstyle fixes
arch/arm/src/stm32/hardware/stm32_adc_v2.h
arch/arm/src/stm32/hardware/stm32_i2c_v2.h
arch/arm/src/stm32/hardware/stm32_tim.h

    * nxstyle fixes, mostly long lines and misaligned comments
2020-05-19 19:34:34 -06:00
Xiang Xiao
567962bd62 build: Move the extension definition to common place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-19 19:23:18 +01:00
Nathan Hartman
5fe9085913 stm32: lowputc: nxstyle fixes
arch/arm/src/stm32/stm32_lowputc.c:

    * nxstyle fixes, mostly for long lines and comment misalignments.
2020-05-19 11:20:40 -06:00
Nathan Hartman
387d33c535 stm32: allocateheap: nxstyle fixes
arch/arm/src/stm32/stm32_allocateheap.c:

    * nxstyle fixes, mostly for comment misalignments.
2020-05-19 10:56:34 -06:00
Nathan Hartman
624b50f7ea stm32: serial: nxstyle fixes
arch/arm/src/stm32/stm32_serial.c:

    * nxstyle fixes, mostly for long lines.
2020-05-19 10:56:12 -06:00
Xiang Xiao
bd656888f2 build: Replace WINTOOL with CYGWIN_WINTOOL Kconfig
so the correct value can be determinated by Kconfig system automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-18 15:02:55 -06:00
chao.an
05ebb39998 arch: complete logic in create/use stack to support stack coloration.
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-18 07:30:46 -06:00
chao.an
86a412d65a arch/stack: fix check stack breakage
remove the TLS alignment check

Regression by:

--------------------------------------------------------
commit a6da3c2cb6
Author: Ouss4 <abdelatif.guettouche@gmail.com>
Date:   Thu May 7 18:50:07 2020 +0100

    arch/*/*_checkstack.c: Get aligned address only when
    CONFIG_TLS_ALIGNED is enabled.

--------------------------------------------------------
commit c2244a2382
Author: Gregory Nutt <gnutt@nuttx.org>
Date:   Thu May 7 09:46:47 2020 -0600

    Remove CONFIG_TLS

    A first step in implementing the user-space error is
    force TLS to be enabled at all times.  It is no longer optional

Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-18 07:27:17 -06:00
qiaowei
cddd64fd30 armv8-m: Add stack overflow by stack pointer limit register
Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I0f0ae0fb8edb8e1690b3c5e3e8b3189d51a318b0
2020-05-18 07:21:05 -06:00
Gregory Nutt
a569006fd8 sched/: Make more naming consistent
Rename various functions per the quidelines of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions

    nxsem_setprotocol -> nxsem_set_protocol
    nxsem_getprotocol -> nxsem_get_protocol
    nxsem_getvalue -> nxsem_get_value
2020-05-17 14:01:00 -03:00
Xiang Xiao
d938b50969 arch/sim: Fix multiple definition of g_cpu_wait' and g_cpu_paused'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I62d81582d58c9156ee8a56207b479dad7d6d18df
2020-05-17 07:36:45 -06:00
Gregory Nutt
00ed37b609 sched/: Run nxstyle on all .c/.h files modified by PR. 2020-05-16 13:39:03 -03:00
Gregory Nutt
d823a3ab3e sched/: Make more naming consistent
Rename various functions per the quidelines of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-16 13:39:03 -03:00
Gregory Nutt
e6a984dc2b arch/arm/src/stm32h7/stm32_sdmmc.c: Fix wrong selection in modifying the conflict. 2020-05-15 23:11:33 +01:00
Pierre-Olivier Vauboin
671191d7a1 boards/arm/stm32h7/stm32h747i-disco: fix nxstyle warnings 2020-05-15 23:11:33 +01:00
Pierre-Olivier Vauboin
2d43c57a67 boards/arm/stm32h7/stm32h747i-disco: SDMMC card detect interrupt 2020-05-15 23:11:33 +01:00
Pierre-Olivier Vauboin
07bd520ccb arch/arm/src/stm32h7/stm32_sdmmc: check IDMA buffer address
For SDMMC1, IDMA cannot access SRAM123 or SRAM4. Refer to ST AN5200 for
details. This patch makes stm32_dmapreflight check the buffer address and
return an error when the buffer is located in a invalid address space.

This does not fix the hardware limitation but at least makes it visible.
2020-05-15 23:11:33 +01:00
Pierre-Olivier Vauboin
369293dd84 boards/arm/stm32h7/stm32h747i-disco: bring support for SDMMC 2020-05-15 23:11:33 +01:00
Jukka Laitinen
1071934350 arch/arm/src/stm32h7/stm32_sdmmc.c: Fixes for IDMA transfer and cache usage
This simplifies the sdmmc driver when the IDMA is in use. There is no need to mix
IDMA and interrupt based transfers; instead, when making unaligned data tranfers,
just make IDMA into an internal aligned buffer and then copy the data.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:33 -06:00
Jukka Laitinen
a532b0b53a arch/arm/src/stm32h7/stm32_dma.c: Optimization for stm32_sdma_capable
It should not be an error to clean cache beyond the dma source buffer
boundaries. It would just prematurely push some unrelated data from
cache to memory.

The only case where it would corrupt memory is that there is a dma
destination buffer overlapping the same cache line with the source
buffer. But this can't happen, because a destination buffer must always
be cache-line aligned when using write-back cache.

This patch enables doing dma tx-only transfer from unaligned source
buffer when using write-back cache.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
c7acbb80d8 arch/arm/src/stm32h7/stm32_dma.c: Allow transfer from peripheral to AXI SRAM
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
f5571b2550 arch/arm/src/stm32h7/stm32_dma.c: Fix DEBUGASSERT compilation
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
8f559b1276 arch/arm/src/stm32h7/stm32_dma.c: Split long lines to pass style checks
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
1e0f416a93 arch/arm/src/stm32h7: Make flash program size configurable
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:27:49 -06:00
Jari Nippula
de8f3b73d5 arch/arm/src/stm32h7/stm32_flash.c: fix write and erase
Correct flash write and erase functions, they inherit some
broken code from other platforms. Also fix the confusion between
eraseblock(sector) and page sizes.

Signed-off-by: Jari Nippula <jari.nippula@intel.com>
2020-05-14 17:27:49 -06:00
Jukka Laitinen
f9a886f8b7 arch/arm/src/stm32h7/stm32_flash.c: Lock flash option register
If the flash option register was locked before modifying it, return
it to the locked state after modify.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:27:49 -06:00
Nathan Hartman
8d985819b3 Fix typos
Comments only. No functional changes.
2020-05-14 10:49:44 -06:00
chao.an
8bce416c25 sim/tapdev: follow the tunnel MTU size
Change-Id: Ia32255517650d95ea3a675ee9fe5b69e923fb51a
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-14 07:54:57 -06:00
Gregory Nutt
801b9d6e5f arch/arm: Remove support for old redundant toolchains.
Remove support for the Codesourcery, Atollic, DevKitArm, Raisonance, and CodeRed toolchains.  Not only are these tools old and no longer used but they are all equivalent to standard ARM EABI toolchains.  Retaining specific support has no effect (they are still supported, but now just as generic EABI toolchains).
2020-05-13 18:41:10 +01:00
Jukka Laitinen
e989147119 arch/arm/src/stm32h7: Add support for spi simplex configurations
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
574b2593e6 arch/arm/src/stm32h7/stm32_spi.c: Correct the dmacapable check
First, configure the dmacfg in spi_dmarxsetup and spi_dmatxsetup. Then,
check for dmacapable, and only after that set up the dma.

This way the dmacapable actually works, and we don't need to initialize
the dmacfg structures twice.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
d1c406d65d arch/arm/src/stm32h7/stm32_spi.c: Correct cache flush
When starting dma transfer, the dcache for the TX buffer should be cleaned.
"flush" performs also invalidate, which is unnecessary. The TX buffer
can be unaligned to the cahche line in some(most) cases, whereas RX buffer
can never be.

The cache for the receive buffer can be dirty and valid before call to exchange.
Thus another memory access (hitting the same cache line) may corrupt receive data
while waiting for transfer to complete. So the receive buffer should be
invalidated before the transfer

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
ace63ef74a arch/arm/src/stm32h7/stm32_spi.c: Remove un-used local variable
Causes compilation warning

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
63af18eaf9 arch/arm/src/stm32h7/stm32_spi.c: Fix long lines to pass style checks
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
4967352c33 arch/arm/src/stm32h7/stm32_ethernet.c: Comment and debug assertion fixes
Modify some comments and debug assertions, which inherit from previous versions
and make no sense. Also add a few nerr printouts to make it easier to debug
running out of buffers

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Jukka Laitinen
db492ca03b arch/arm/src/stm32h7/stm32_ethernet.c: Break long lines to pass style checks
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Jukka Laitinen
d618dad296 arch/arm/src/stm32h7/Make.defs: arm_mpu.c was added twice
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Jukka Laitinen
2ef571453a arch/arm/src/stm32h7/stm32_allocateheap.c: Fix compilation when CONFIG_MM_REGIONS == 1
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
rajeshwaribhat
3d7678ad9b nxstyle corrections for .c and .h file modified by PR1030 2020-05-13 06:46:56 -06:00
Gregory Nutt
4664642cf7 Board specific code moved to boards directory and ipv6 support added
Added support to crashdump for rx65n on sbram
Board specific code moved to boards directory and ipv6 support added
2020-05-13 06:46:44 -06:00
Xiang Xiao
9607152e68 arm/gic: Don't pirnt log in arm_decodeirq
it is unsafe place to do this

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I47fdb1a34a7f1d5c5d3c4f3c0030a60bf01c43c2
2020-05-13 06:33:56 -06:00
Xiang Xiao
7ffafa3654 Remove executable bit from source code
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-13 06:32:13 -06:00
Masayuki Ishikawa
77f15c8b17 arch: cxd56xx: Apply the latest cxd56_dma.c and cxd56_spi from SDK
See the following commit in SDK:

  commit 62a2fb4fd3001aefad9ec3b2e2e7c47e5b0f21e1
  Author: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
  Date:   Fri Jan 24 13:32:04 2020 +0900

      Enable dummy transfer by SPI using DMA

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-05-13 13:11:08 +02:00
Xiang Xiao
517974787f Rename clock_systime[r|spec] to clock_systime_[ticks|timespec]
follow up the new naming convention:
https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-10 14:35:50 -06:00
Gregory Nutt
3ac629bdfb Run all .c and .h files modifed by the PR though nxstyle. 2020-05-09 16:58:42 -03:00
Gregory Nutt
f92dba212d sched/sched/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 16:58:42 -03:00
Gregory Nutt
4b44b628ea Run nxstyle against all .c and .h files modified by this PR.
All complaints fixed except for those that were not possible to fix:

- Used of Mixed case identifier in ESP32 files.  These are references to Expressif ROM functions which are outside of the scope of NuttX.
2020-05-09 14:19:08 -03:00
Gregory Nutt
a4218e2144 include/nuttx/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 14:19:08 -03:00
Xiang Xiao
b7d922960f Fix nxstyle issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-08 07:20:49 -06:00
Gregory Nutt
2d78ed7c7e arch/sim/src/nuttx-names.dat: Add __errno()
Needed to avoid collision with the host on simulator build.
2020-05-08 01:58:25 +01:00
Ouss4
958999c443 arch/mips/src/common/mips_usestack.c: Include tls.h header. 2020-05-07 18:41:43 -06:00
Gregory Nutt
3dca5eba15 Completes the Implementation of the TLS-based errno
- Remove per-thread errno from the TCB structure (pterrno)
- Remove get_errno() and set_errno() as functions.  The macros are still available as stubs and will be needed in the future if we need to access the errno from a different address environment (KERNEL mode).
- Add errno value to the tls_info_s structure definitions
- Move sched/errno to libs/libc/errno.  Replace old TCB access to the errno with TLS access to the errno.
2020-05-07 23:11:34 +01:00
Ouss4
a6da3c2cb6 arch/*/*_checkstack.c: Get aligned address only when CONFIG_TLS_ALIGNED is
enabled.
2020-05-07 12:04:51 -06:00
Ouss4
e74899ff6d arch/risc-v/src/common/riscv_createstack.c: Fix the stack_color name. 2020-05-07 12:04:32 -06:00
Gregory Nutt
c2244a2382 Remove CONFIG_TLS
A first step in implementing the user-space error is force TLS to be enabled at all times.  It is no longer optional
2020-05-07 12:04:16 -06:00
Pierre-Olivier Vauboin
8d8ceee838 boards/arm/stm32h7/stm32h747i-disco: support for FMC SDRAM 2020-05-07 10:29:01 -06:00
Masayuki Ishikawa
1cf62c7db9 arch: k210: Fix cpu1 hangup during boot with qemu 2020-05-07 08:33:50 +02:00
Ouss4
6eb6d31c32 Fix nxstyle complaints 2020-05-06 21:56:40 -06:00
Ouss4
d56c613b7d arch/avr,renesas,risc-v: The *_getsp function was moved to a header
file, remove it from the different source files that used to implement
it to avoid redefinitions.
2020-05-06 21:56:40 -06:00
Ouss4
a4dd967440 arch/: Implement up_tls_info() for the rest of the architectures. 2020-05-06 21:56:40 -06:00
Ouss4
1e3ec6ecd0 arch/: Implement Thread Local Storage for the rest of the architectures.
The change consisted on modifying *_usestack.c and *_createstack.c
2020-05-06 21:56:40 -06:00
Xiang Xiao
3e00d182d2 Fix nxstyle issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Xiang Xiao
94bb2e05bb syslog: Code outside libc shouldn't call nx_vsyslog directly
since nx_vsyslog is the implementation detail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Yang Chung-Fan
6b1f94ee49 arch: x86_64: real-mode bootstrap code should jump to 1M 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
ffa2027226 arch: x86_64: Add option to disable interrupt controller initialization 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
c63c8a3841 arch: x86_64: Add real-mode bootstrap stub 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
9ab6b92ad7 arch: x86_64: move the disable multiboot2 marco around to retain labels 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
235d905001 arch: x86_64: remove leftover debug output 2020-05-06 23:33:46 +08:00
Masayuki Ishikawa
4ca19e7e74 arch: k210: Set CPU clock based on PLL0 settings 2020-05-05 17:21:32 -07:00
Gregory Nutt
bda24f09c2 libs/libc/tls/tls_getinfo.c: Add tls_get_info()
Move the logic to get TLS information from an inline function to a normal function.  For the unaligned case, it is probably too large to be inlined.

Also fixes some minor things from review of previous commits.
2020-05-05 18:56:33 +01:00
Abdelatif Guettouche
b7e7fba732 TLS_UNALIGNED (#2)
* Implement the TLS_UNALIGNED
2020-05-05 18:56:33 +01:00
Pierre-Olivier Vauboin
8d763d37ab arch/arm/src/stm32h7/stm32_oneshot: fix style issues 2020-05-05 11:53:58 -06:00
Pierre-Olivier Vauboin
d96565a765 arch/arm/src/stm32h7: add support for oneshot timer
The code is ported from arch/arm/src/stm32
2020-05-05 11:53:58 -06:00
Brennan Ashton
093aa040eb x86_64: Fix /dev/random rdrand implementation
rdrand was checking the wrong return value for the intrinsics
so it would block forever.  The read function was also not returning
the actual number of bytes read.

This was tested by running the rand example application
NuttShell (NSH) NuttX-9.0.0
nsh>rand
Reading 8 random numbers
Random values (0x101584f70):
0000: 019a172df7d539f2df8550362e2d3f74 9b467c51ebe30b9f6510e540e34fabcc ...-..9...P6.-?t .F|Q....e..@.O..

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-05 18:54:47 +08:00
Yang Chung-Fan
521e6354b6 arch: x86_64: fix style of intel64_lowsetup.c 2020-05-05 02:03:34 -07:00
Yang Chung-Fan
8b86fae8d3 arch: x86_64: Check only XSAVE and rename __eanble_sse3 to __enable_sse_avx 2020-05-05 02:03:34 -07:00
Yang Chung-Fan
2936f72651 arch: x86_64: revoke lower 128MB mapping later, ldmxcsr require 32-bit address 2020-05-05 02:03:34 -07:00
Brennan Ashton
aea90e7cf0 Clean code to match nxstyle requirements
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
2405901bf2 Use mempy to perform type punning for setting gdt entry
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
4c24d91b4a Surpress unused rtcb variable
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
19afc57eef Fix null pointer reference in x86_64 rng
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
a9871f584a Resolve linking issues with x86_64 port
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Masayuki Ishikawa
11bbe3997e arch: x86: Add hlt instruction to save power in qemu_idle.c 2020-05-04 07:13:30 -06:00
raiden00pl
f03ed73f91 arch/arm/src/stm32/stm32_adc.c: remove obsolete warnings 2020-05-03 15:57:49 -03:00
raiden00pl
534ba2cc18 arch/arm/src/stm32/stm32_adc: add setup and shutdown operations to the low-level interface 2020-05-03 15:57:49 -03:00
raiden00pl
b3a1aef773 arch/arm/src/stm32/stm32_adc.c: cosmetics 2020-05-03 15:57:49 -03:00
raiden00pl
5857c48b2e arch/arm/src/stm32/stm32_adc.c: setup/shutdown ADC instance only once 2020-05-03 15:57:49 -03:00
raiden00pl
e2a3266857 arch/arm/src/stm32/stm32_adc: add interface to configure EXTSEL/JEXTSEL from low-level ops 2020-05-03 15:57:49 -03:00
Gregory Nutt
1bab5b6813 arch/arm/: Rename up_intstack_* to arm_intstack_*
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all architecture-private functions begin with the name of the arch, not up_.

This PR addresses only these name changes for the ARM-private functions up_instack_base() and up_instack_top() which should be called arm_instack_base() and arm_instack_top().

There should be no impact of this change (other that one step toward more consistent naming).

Normal PR checks are sufficient
2020-05-03 14:48:40 -03:00
Gregory Nutt
da4c597b5f Run all .c and .h files modified by this PR through nxstyle. 2020-05-03 16:42:19 +01:00
Gregory Nutt
01d32a2b22 arch/arm/stm32, stm32f7, stm32l4: Rename up_waste to stm32_waste
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the MCU, not up_.

This PR addresses only these name changes for the STM32-private functions up_waste() which should be called stm32_waste.

There should be no impact of this change (other that one step toward more consistent naming).

Normal PR checks are sufficient
2020-05-03 16:42:19 +01:00
Gregory Nutt
cbc931b590 arch/arm: Rename up_savestate and up_restorestate
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses function-like macro naming that was missing in previous PRs:  up_savestate() and up_restorestate() which must be named arm_savestate() and arm_restorestate().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f103-minimum:nsh
2020-05-02 18:35:30 -03:00
Alan Carvalho de Assis
54d0256b9a Remove the not existent CONFIG_XXX_CMNVECTOR 2020-05-02 09:55:35 -06:00
Gregory Nutt
bb29541e3c Remove garbage file accidentally added 2020-05-01 21:05:22 -03:00
Xiang Xiao
f2aba8d9b7 build: Remove 'u' prefix from userspace library
so user needn't link the different library because the build type change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 15:56:55 -06:00
Gregory Nutt
673640b313 Run all .c and .h modified by this PR through nxstyle
The are remaining nxstyle complaints due to the use of mixed case identifiers in arch/arm/src/lc823450/lc823450_irq.c This, cannot be easily fixed since it depends on register definitions in header files that have implications to section other lc823450 files.
2020-05-01 16:55:33 -03:00
Gregory Nutt
b0dbdd7c10 arch/arm, board/arm: Rename all up_ramvec_* functions to arm_ramvec_*
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions up_ramvec_initialize() and up_ramvec_attch().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 16:55:33 -03:00
Xiang Xiao
2476aad5b4 sim: Fix librt can't find on macOS
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 13:09:44 -06:00
Gregory Nutt
2aa85fd17e arch/arm, board/arm: Rename all up_* functions to arm_*
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h

This change to the files only modifies the name of called functions.  nxstyle fixes were made for all core architecture files.  However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change.  It is not humanly possible to fix all of these.   I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
2020-05-01 18:28:13 +01:00
Gregory Nutt
542b684f73 arch/arm: Rename all up_*.S files to arm_*.S
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.S files.

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
2020-05-01 11:29:11 -03:00
Xiang Xiao
f8a809eb5b Fix nxstyle issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 10:43:47 -03:00
Xiang Xiao
eca7059785 Refine __KERNEL__ and CONFIG_BUILD_xxx usage in the code base
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 10:43:47 -03:00
YAMAMOTO Takashi
8b054dba98 sim: Update hostfs after the recent struct stat timespec changes
Fix it after the following change:

    commit bb4458b63f
    Author: Ouss4 <abdelatif.guettouche@gmail.com>
    Date:   Thu Apr 30 19:05:12 2020 +0100

        include/sys/stat.h: Per the POSIX standard, the atime, ctime and mtime field
    s
        have changed their type from time_t to struct timespec.
2020-05-01 17:42:46 +08:00
Ouss4
21302fcdae arch/risc-v/src: Rename files starting by up_ to risc_ to conform to the
naming standard.
2020-04-30 20:48:32 -06:00
Gregory Nutt
037c9ea0a4 arch/arm: Rename all up_*.h files to arm_*.h
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.h files.  There are only three, but almost 1680 files that include them:

    up_arch.h
    up_internal.h
    up_vfork.h

The only change to the files is from including up_arch.h to arm_arch.h (for example).

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 03:43:44 +01:00
Gregory Nutt
ee05672434 Run all .c and .h files modified by this PR through nxstyle. 2020-05-01 02:11:01 +01:00
Gregory Nutt
c6c712b2fc arch/arm: Rename all up_*.c files to arm_*.c 2020-05-01 02:11:01 +01:00
Gregory Nutt
a86884c615 Run all .c and .h files modifed in this PR through nxstyle. 2020-04-30 22:09:51 +01:00
Gregory Nutt
84ccee4d34 Rename up_switchcontext to arm_switchcontext 2020-04-30 22:09:51 +01:00
Gregory Nutt
6398a64e26 Rename up_saveusercontext to arm_saveusercontext 2020-04-30 22:09:51 +01:00
Gregory Nutt
3a82a20c90 Rename up_copyarmstate to arm_copyarmstate 2020-04-30 22:09:51 +01:00
Gregory Nutt
3d2cd1493f Rename up_copyfullstate to arm_copyfullstate 2020-04-30 22:09:51 +01:00
Xiang Xiao
b1e661e7db sama5/sam_tsd: Fix error: 'ret' may be used uninitialized
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-30 11:43:29 -06:00
Gregory Nutt
a7558cf9b9 Run all .c and .h modified by the PR through nxstyle. 2020-04-30 18:38:32 +01:00
Gregory Nutt
e2a65ceb5f Rename up_fullcontextrestore to arm_fullcontextrestore 2020-04-30 18:38:32 +01:00
Gregory Nutt
317a8a8942 arch/z16: Build update
Verfy build.  Update to latest 2.2.2 toolchain.
2020-04-30 16:58:06 +01:00
liuhaitao
55ff12ad66 arch/arm/src/common/up_exit.c: _exit should call arm_fullcontextrestore for armv8-m
Since armv8-m now uses arm_fullcontextrestore instead of up_fullcontextrestore, _exit
should call arm_fullcontextrestore for armv8-m accordingly.

Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-04-30 08:47:10 -06:00
liuhaitao
bab61180db sim: Add host mmap and perror support
Change-Id: I20bb8cba7ed6ab3e06c91f275fa2be6a633efe9e
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-04-30 20:20:32 +08:00
Gregory Nutt
1aa9ff8af2 Run .c and .h files in this PR through nxstyle and fix complaints 2020-04-29 22:30:54 -03:00
Gregory Nutt
f23a756349 arch/z16: Correct file naming for coding standard
Rename all up_* files to conform to the name conventions of https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ

Rename all internal functions from up_* z16_
2020-04-29 22:30:54 -03:00
Xiang Xiao
5d12735f34 sama5d3x-ek/nxwm: Fix error: 'g_adcdev' undeclared
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-29 14:04:14 -06:00
Yang Chung-Fan
bebc8875fb arch: x86_64: add no-relax to the linker flags 2020-04-29 09:29:03 -07:00
Xiang Xiao
1c483d8ed4 arm/up_allocpage: fix warning: "PG_POOL_MAXL1NDX" is not defined
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-29 10:26:29 -06:00
Xiang Xiao
d2a262672c tiva/cc13x0: fix error 'TIVA_GPIO_BASE' undeclared
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-29 07:10:44 -06:00
Nathan Hartman
1b03a42bc0 arch/arm/src/stm32/Kconfig - Remove redundant ARCH_CHIP configs
* Remove redundant configs:
  - ARCH_CHIP_STM32F303RD, and
  - ARCH_CHIP_STM32F303RE.
2020-04-27 17:46:31 -06:00
Ouss4
e5443a4718 Remove a duplicate file introduced by the previous PR. 2020-04-26 22:12:42 -06:00
Ouss4
32597a763a arch/mips: Fix file naming. 2020-04-26 20:56:30 -06:00
zhongan
ef9735febd arch/sim: initialize 'rxbuf_size' and 'txbuf_size' instead of 'buf_size'.
Change-Id: I5442f022cafef6c0f636614ba739e11249713134
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-26 19:59:16 -06:00
zhongan
4ec8fd521f arch/sim: change 'VIRTIO_RPMSG_F_BIND' to 'VIRTIO_RPMSG_F_ACK'
Change-Id: I4d6b6b700130e264199f490ab4e922f699955113
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-26 19:59:16 -06:00
Gregory Nutt
dcd50db5d1 Run files in previous commit through nxstyle, fixing issues. 2020-04-26 22:14:25 +01:00
Gregory Nutt
a0fdda698c arch/z80: Fix z80 file naming
Modify file naming to conform on the Naming conventions of https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ

This commit only address the file naming convention.  There is still nonconformant function naming.
2020-04-26 22:14:25 +01:00
raiden00pl
f837bfecdb arch/arm/src/stm32/stm32_adc.h: add prefix STM32 to low-level ops macros 2020-04-26 11:35:11 -06:00
raiden00pl
1b4e0fddb8 arch/arm/src/stm32/stm32_adc.h: move generalized ADC definitions to the header file 2020-04-26 11:35:11 -06:00
raiden00pl
0e09d162e2 arch/arm/src/stm32/stm32_adc.c: fix injected channels configuration for ADC IPv1 2020-04-26 11:35:11 -06:00
raiden00pl
a85ffd0fbd arch/arm/src/stm32/stm32_adc.c: enable callback logic if DMA enabled 2020-04-26 11:35:11 -06:00
raiden00pl
4cb8be9608 arch/arm/src/stm32/stm32_adc.c: move adc_offset_set to llops section 2020-04-26 11:35:11 -06:00
Gregory Nutt
010603329b More compliance to the naming standard.
1) Rename all up_*.S file to arm_*.S
2) Rename all functions used only by armv8_m logic from up_* to arm_*
2020-04-26 14:12:47 -03:00
Gregory Nutt
15f003d01c arch/arm/src/armv8-m: Rename files to correspond to naming conventions.
This files in the arch/arm/src/armv8-m directory were cloned from arch/arm/src/armv7-m.  Naming standards were created for the architecture files, function, and variable names:  https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ

There however were never appliced to arch/arm/src/armv7-m and so this bad naming was inherited by arch/arm/src/armv8-m.  This commit corrects the file naming only and makes it compliant with the Naming FAQ.
2020-04-26 14:12:47 -03:00
Gregory Nutt
6766aa0ed5 Mea Culpa. Fix nxstyle problems from PR879
In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check).  It was really my intention to merge PR878, but I screwed that up and merged 879 instead.

This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
2020-04-26 11:56:15 -03:00
Nathan Hartman
d6f7821b15 Docs and comments: Change OSX -> macOS
Mac OS X was renamed to macOS at some point. Update references to
OSX, OS X, Mac OS X, Mac OSX, and other permutations, to macOS,
in README files and in comments of other files.
2020-04-26 07:48:33 -06:00
qiaowei
2376d8a266 Porting arch/armv8-m support
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p

Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
2020-04-26 07:43:37 -06:00
Matias Nitsche
a0d4e61d54 STM32L4 PWM: nxstyle 2020-04-24 12:38:47 -06:00
Matias Nitsche
436979baed STM32L4 PWM: nxstyle 2020-04-24 12:38:47 -06:00
Matias Nitsche
ff85335b71 fix use of undefined CONFIG_STM32L4_LPTIM1_CH1POL 2020-04-24 12:38:47 -06:00
Matias Nitsche
3fcb441ef8 STM32L4 PWR/RCC: nxstyle 2020-04-24 12:34:17 -06:00
Matias Nitsche
a0d4370163 STM32L4 RCC/PWR: nxstyle fixes 2020-04-24 12:34:17 -06:00
Matias Nitsche
e9319fa9a0 stm32l4x6 RCC: allow choosing HSI, MSI or HSE as SYSCLK instead of PLL to reduce power 2020-04-24 12:34:17 -06:00
Matias Nitsche
34bf9b26e0 stm32l4x6 RCC: set CORE regulator range according to CPU clock 2020-04-24 12:34:17 -06:00
Matias Nitsche
891acc5fa3 stm32l4x6 RCC: fix MSI clock speed setting 2020-04-24 12:34:17 -06:00
Matias Nitsche
2a76451185 stm32l4 PWR: add VOS setting function 2020-04-24 12:34:17 -06:00
Matias Nitsche
977f3194de stm32l4_lptim: nxstyle fix 2020-04-24 14:47:07 -03:00
Matias Nitsche
f0033f783e stm32l4_lptim: nxstyle fix 2020-04-24 14:47:07 -03:00
Matias Nitsche
d5eaa68b50 stm32l4_lptim: nxstyle fixes 2020-04-24 14:47:07 -03:00
Matias Nitsche
38bd0364bf stm32l4_lptim: add various functions 2020-04-24 14:47:07 -03:00
anjana-tel
0a673d759d Corrected build error
Corrected build error in rx65n_sbram_open()
2020-04-23 18:33:09 +08:00
Gregory Nutt
e6af32c88f Run nxstyle against all files modified by PR 848 2020-04-22 21:36:41 +01:00
Gregory Nutt
2f7e003ef8 arch/arm/src/armv7-m: Use Apache 2.0 license
Change license header on all files under arch/arm/src for which I am the sole author and the only person claiming to hold a coyright on the file.
2020-04-22 21:36:41 +01:00
Nathan Hartman
02ab0cd149 stm32: Fix typos, wrong comments, and nxstyle.
arch/arm/include/stm32/chip.h:

    * Fix 2 typos.

    * Fix 1 wrong comment (No LCD -> LCD)

    * Fix nxstyle errors regarding comment positions, blank lines
      before/after comments, and C++ style comments.
2020-04-22 16:14:57 +01:00
rajeshwaribhat
31332904dd Added support to crashdump for rx65n on sbram 2020-04-22 07:32:37 -06:00
raiden00pl
c2162365fc arch/arm/src/stm32h7/stm32_pwm: nxstyle fixes 2020-04-22 01:37:42 +08:00
raiden00pl
d89b9102cc arch/arm/src/stm32h7/stm32_pwm: fix PWM_DUMP_REGS macro
arch/arm/src/stm32h7/stm32_pwm: prevent the PA0 pin configuration from being overwritten
2020-04-22 01:37:42 +08:00
raiden00pl
655bb2e391 arch/arm/src/stm32/stm32_pwm: fix PWM_DUMP_REGS macro
arch/arm/src/stm32/stm32_pwm: prevent the PA0 pin configuration from being overwritten
2020-04-22 01:37:42 +08:00
raiden00pl
23c1efa164 arch/arm/src/stm32/hardware/stm32f30xxx_pinmap.h: add missing TIM2_CH1 pins 2020-04-22 01:35:10 +08:00
Alin Jerpelea
afead9c9da arch: arm: a1x: nxstyle fixes for a1x arch
nxstyle fixes for a1x arch

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-21 13:46:07 +08:00
Xiang Xiao
090a4d1690 Update .gitignore per testbuild.sh report
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-20 07:07:32 -06:00
Xiang Xiao
3d10f8cf8f Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-19 07:51:18 -06:00
Xiang Xiao
2a7029dd52 arch/sim: All cpu core need conform to CONFIG_SIM_WALLTIME behaviour
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-19 07:51:18 -06:00
Nakamura, Yuuichi
00049aa482 Fix saved %esp value in up_saveusercontext() for qemu-i486 2020-04-18 19:33:39 +08:00
Nathan Hartman
1d394535cb arch/README.txt: Various improvements to the text
* Added missing architectures and directories.

* Corrected a few mistakes.

* Rewrapped some text for consistency.
2020-04-17 15:16:43 -06:00
Nathan Hartman
120de788d4 kinetis: Fix typos
arch/arm/include/kinetis/kinetis_pmc.h:

    * Fix several typos in comments.
    * Rewrap some comment lines.
    * Fix define KINETIS_PMC_VERSION_UKN: Put -1 in
      parenthesis for safety.
    * Fix nxstyle complaint regarding long line.
2020-04-16 14:43:54 -06:00
Nathan Hartman
9b9d1fc7ca arch/stm32h7: Extend support to all STM32H7x3xx
All parts in the STM32H7x3xx family have the same pinmap, etc.,
so extending support to all members of the family required only
minimal changes: Adding them to Kconfig, extending some
preprocessor logic, and minor code changes.

arch/arm/src/stm32h7/Kconfig:

    * Add explicit support for all microcontrollers in the
      STM32H7x3xx family by adding support for:
        - STM32H743AG
        - STM32H743AI
        - STM32H743BG
        - STM32H743BI
        - STM32H743IG
        - STM32H743II
        - STM32H743VG
        - STM32H743VI
        - STM32H743XG
        - STM32H743XI
        - STM32H743ZG
        - STM32H753AI
        - STM32H753BI
        - STM32H753VI
        - STM32H753XI
        - STM32H753ZI

    * Fix TODO items for IO_CONFIG (all STM32H7X3XX).

    * Because 100-pin parts lack GPIO ports F and G, but have
      port H, create the new hidden configs STM32H7_HAVE_GPIOF
      and STM32H7_HAVE_GPIOG.

    * STM32H7_STM32H7X3XX:
      - Select STM32H7_HAVE_GPIOF and STM32H7_HAVE_GPIOG only
        when not STM32H7_IO_CONFIG_V (100-pin part).
      - STM32H7_STM32H7X3XX: select STM32H7_HAVE_SPI5 for all
        IO configs except V (100-pin part), which doesn't expose
        SPI5 due to pin count.

    * STM32H7_STM32H7X7XX: Always select STM32H7_HAVE_GPIOF and
      STM32H7_HAVE_GPIOG because we aren't adding more part
      numbers in this family.

    * Remove extraneous (duplicate) "bool" and "default n"
      lines.

    * config STM32H7_FMC: Fix indent (contents were indented
      with spaces while rest of file uses tabs).

arch/arm/include/stm32h7/chip.h:

    * Extend preprocessor logic to add support for the new
      MCU part numbers.

    * Expand table of differences between family members.

    * Define STM32H7_NGPIO based on IO_CONFIGs decided in Kconfig.

    * If IO config is not known, issue compile-time #error
      with grep-friendly "CONFIG_STM32H7_IO_CONFIG_x Not Set."
      Suggested by davids5.

arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h:
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c:
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c:

    * When checking STM32H7_NGPIO > 5 or 6, check also
      CONFIG_STM32H7_HAVE_GPIOF or CONFIG_STM32H7_HAVE_GPIOG.

arch/arm/src/stm32h7/stm32_gpio.c:

    * stm32_configgpio(): When applicable, make sure we're not
      trying to configure one of the missing ports.

    * Fix nxstyle complains (wrong end of line comment position
      and several long lines). No functional changes.

    * g_gpiobase[]: Init base address for ports F and G according to
      CONFIG_STM32H7_HAVE_GPIOF and CONFIG_STM32H7_HAVE_GPIOG.

    * stm32_configgpio(): Replace complicated check with g_gpiobase[]
      null check. Suggested by davids5.

    * stm32_gpiowrite() and stm32_gpioread(): Add previously missing
      null check of g_gpiobase[].

arch/arm/src/stm32h7/stm32_gpio.h:

    * Wrap the defines GPIO_PORTA, GPIO_PORTB, GPIO_PORTC, GPIO_PORTD,
      GPIO_PORTE, GPIO_PORTF, GPIO_PORTG, GPIO_PORTH, GPIO_PORTI,
      GPIO_PORTJ, and GPIO_PORTK in conditional logic so that the
      compiler will prevent use of ports that do not exist on the
      target MCU.

    * Fix nxstyle complaints.

Documentation/NuttX.html:

    * Remove copy-and-pasted anchor for stm32f76xx77xx.

    * Correct link to README.txt for Nucleo-H743ZI board,
      formerly on BitBucket, now on GitHub.

    * Add list item for STMicro STM32H747I-DISCO board.

Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
2020-04-16 13:23:12 -06:00
Nathan Hartman
3c829226f9 Fix typos and nxstyle complaints.
arch/x86_64/src/intel64/intel64_tickless.c:
boards/x86_64/intel64/qemu-intel64/src/qemu_freq.c:
drivers/modem/altair/altmdm.c:

    * Fix typos and nxstyle complaints.
2020-04-15 17:04:58 +01:00
zhongan
b4a50a9192 fix nxstyle warning.
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-15 12:30:50 -03:00
zhongan
4ff0edce25 arch/sim: add implemntation of 'host_sleep'.
Change-Id: Ib82343565ca9541499dec52c753c3f15923f7d1c
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-15 12:30:50 -03:00
zhongan
a41c5e01e1 arch/sim: add header to remove warning when build with 'CONFIG_SYSLOG_RPMSG_SERVER'.
Change-Id: I58ebe25434aaebce3812abb52caf3c670118cb66
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-15 12:30:50 -03:00
zhongan
648a76b3c1 risc-v: add pm initialization functions.
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-15 10:07:30 -03:00
Nathan Hartman
9b86305ad3 Fix copy/paste typo in various Kconfigs 2020-04-14 22:42:21 +01:00
Xiang Xiao
11705ffc71 Fix nxstyle issue 2020-04-14 13:02:00 -06:00
zhongan
0d3691a460 Add fpu support. 2020-04-14 13:01:47 -06:00
zhongan
957c14d95e Add initialization for idle task. 2020-04-14 13:01:34 -06:00
zhongan
38b4933e88 Change --start-group and '--end-group' as args. 2020-04-14 13:01:20 -06:00
zhongan
7262af219f rv32im/Toolchain.defs: when 'CONFIG_ARCH_FPU' enabled, add 'f' to match and mabi. 2020-04-14 13:01:08 -06:00
zhongan
bf21c1b947 Risc-v: Fix the not supported options in the latest 'RISCV_TOOLCHAIN' in rv32im's Toolchain.defs. 2020-04-14 13:00:53 -06:00
Juha Niskanen
88971a15a5 arch/arm/src/stm32f7/stm32_flash.c: Fix return value of stm32_flash_lock 2020-04-14 17:34:45 +01:00
Gregory Nutt
61f6fa769a nxstyle fixes for previous commit. 2020-04-14 17:19:11 +01:00
Juha Niskanen
552ca28d22 arch/arm/src/stm32l4/stm32l4_1wire.c: fix build error, fix typo 2020-04-14 17:19:11 +01:00
Juha Niskanen
e1138e35e0 arch/arm/src/stm32l4/stm32l4_spi.c: add missing ret declaration 2020-04-14 16:32:10 +01:00
Alin Jerpelea
222a3b9fe8 arch: arm: cxd56xx: nxstyle fixes
nxstyle fixes for cxd56xx

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-14 13:20:21 +01:00
Alin Jerpelea
dd2f3deaaf arch: arm: cxd56xx: nxstyle fixes
nxstyle fixes for cxd56 arch

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-14 17:31:18 +08:00
Xiang Xiao
df57cacd61 nuttx: Fix the nightly build warning again
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-14 11:22:22 +02:00
Xiang Xiao
d3c4879113 Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-13 12:01:39 -06:00
Xiang Xiao
b22e3b9e28 nuttx: Fix the nightly build warning
lpc2148_spi1.c:142:24: warning: initialization of 'uint32_t (*)(struct spi_dev_s *, uint32_t)' {aka 'unsigned int (*)(struct spi_dev_s *, unsigned int)'} from incompatible pointer type 'uint16_t (*)(struct spi_dev_s *, uint16_t)' {aka 'short unsigned int (*)(struct spi_dev_s *, short unsigned int)'} [-Wincompatible-pointer-types]
  142 |   .send              = spi_send,
      |                        ^~~~~~~~
lpc2148_spi1.c:142:24: note: (near initialization for 'g_spiops.send')

In file included from ieee802154/mac802154_bind.c:49:
ieee802154/mac802154_internal.h: In function 'mac802154_setdevmode':
ieee802154/mac802154_internal.h:788:42: warning: converting a packed 'enum ieee802154_devmode_e' pointer (alignment 1) to a 'const union ieee802154_attr_u' pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  788 |                         (FAR const union ieee802154_attr_u *)&mode);
      |                                          ^~~~~~~~~~~~~~~~~

chip/stm32_hciuart.c: In function 'hciuart_read':
chip/stm32_hciuart.c:2104:30: warning: statement with no effect [-Wunused-value]
 2104 |                       ntotal == (ssize_t)ret;
      |                       ~~~~~~~^~~~~~~~~~~~~~~

wireless/ieee80211/bcm43xxx/bcmf_driver.c: In function 'bcmf_wl_auth_event_handler':
wireless/ieee80211/bcm43xxx/bcmf_driver.c:579:23: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  579 |   type = bcmf_getle32(&event->type);
      |                       ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c:580:25: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  580 |   status = bcmf_getle32(&event->status);
      |                         ^~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c: In function 'bcmf_wl_scan_event_handler':
wireless/ieee80211/bcm43xxx/bcmf_driver.c:619:25: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  619 |   status = bcmf_getle32(&event->status);
      |                         ^~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c:620:35: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  620 |   escan_result_len = bcmf_getle32(&event->len);
      |                                   ^~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_bdc.c: In function 'bcmf_bdc_process_event_frame':
wireless/ieee80211/bcm43xxx/bcmf_bdc.c:166:27: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  166 |   event_id = bcmf_getle32(&event_msg->event.type);
      |                           ^~~~~~~~~~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c: In function 'sdio_io_rw_direct':
wireless/ieee80211/bcm43xxx/mmc_sdio.c:157:3: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  157 |   ret = SDIO_RECVR5(dev, SD_ACMD52, (uint32_t *)&resp);
      |   ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c: In function 'sdio_io_rw_extended':
wireless/ieee80211/bcm43xxx/mmc_sdio.c:239:11: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  239 |           ret = SDIO_RECVR5(dev, SD_ACMD53, (uint32_t *)&resp);
      |           ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:244:11: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  244 |           ret = SDIO_RECVR5(dev, SD_ACMD53, (uint32_t *)&resp);
      |           ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:257:7: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  257 |       ret = SDIO_RECVR5(dev, SD_ACMD53, (uint32_t *)&resp);
      |       ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:265:3: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  265 |   SDIO_RECVR1(dev, SD_ACMD52ABRT, (uint32_t *)&resp);
      |   ^~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~

chip/stm32_adc.c: In function 'adc_reset':
chip/stm32_adc.c:2860:7: warning: unused variable 'ret' [-Wunused-variable]
 2860 |   int ret;
      |       ^~~
chip/stm32_adc.c: In function 'adc_shutdown':
chip/stm32_adc.c:3044:7: warning: unused variable 'ret' [-Wunused-variable]
 3044 |   int ret;
      |       ^~~

chip/stm32_i2c.c:722:12: warning: 'stm32_i2c_sem_wait_noncancelable' defined but not used [-Wunused-function]
  722 | static int stm32_i2c_sem_wait_noncancelable(FAR struct i2c_master_s *dev)
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

wireless/gs2200m.c: In function 'gs2200m_read':
wireless/gs2200m.c:727:20: warning: passing argument 1 of 'nxsem_wait' from incompatible pointer type [-Wincompatible-pointer-types]
  727 |   ret = nxsem_wait(dev);
      |                    ^~~
      |                    |
      |                    struct gs2200m_dev_s *

.config:1207:warning: symbol value '' invalid for TESTING_OSTEST_FPUSIZE

platform/audio/cxd56_audio_analog.c:69:13: warning: inline function 'cxd56_audio_clock_is_enabled' declared but never defined
   69 | inline bool cxd56_audio_clock_is_enabled(void);
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
platform/audio/cxd56_audio_analog.c:68:13: warning: inline function 'cxd56_audio_clock_disable' declared but never defined
   68 | inline void cxd56_audio_clock_disable(void);
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~
platform/audio/cxd56_audio_analog.c:67:13: warning: inline function 'cxd56_audio_clock_enable' declared but never defined
   67 | inline void cxd56_audio_clock_enable(uint32_t clk, uint32_t div);
      |             ^~~~~~~~~~~~~~~~~~~~~~~~

chip/stm32_adc.c: In function 'adc_reset':
chip/stm32_adc.c:1348:7: warning: unused variable 'ret' [-Wunused-variable]
 1348 |   int ret;
      |       ^~~
chip/stm32_adc.c: In function 'adc_shutdown':
chip/stm32_adc.c:1496:7: warning: unused variable 'ret' [-Wunused-variable]
 1496 |   int ret;
      |       ^~~

chip/stm32_i2c.c:729:12: warning: 'stm32_i2c_sem_wait_uninterruptble' defined but not used [-Wunused-function]
  729 | static int stm32_i2c_sem_wait_uninterruptble(FAR struct i2c_master_s *dev)
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

wireless/lpwan/sx127x/sx127x.c:147:52: warning: missing terminating ' character
  147 | #  warning OOK support is not complete, RX+TX doesn't work yet!
      |                                                    ^

str71_spi.c:435:24: warning: initialization of 'uint32_t (*)(struct spi_dev_s *, uint32_t)' {aka 'unsigned int (*)(struct spi_dev_s *, unsigned int)'} from incompatible pointer type
                                               'uint16_t (*)(struct spi_dev_s *, uint16_t)' {aka 'short unsigned int (*)(struct spi_dev_s *, short unsigned int)'} [-Wincompatible-pointer-types]
  435 |   .send              = spi_send,
      |                        ^~~~~~~~
str71_spi.c:435:24: note: (near initialization for 'g_spiops.send')

chip/pic32mx-lowconsole.c:147:24: warning: 'pic32mx_getreg' defined but not used [-Wunused-function]
 static inline uint32_t pic32mx_getreg(uintptr_t uart_base,
                        ^
chip/pic32mx-gpio.c:113:20: warning: 'pic32mx_value' defined but not used [-Wunused-function]
 static inline bool pic32mx_value(uint16_t pinset)
                    ^
chip/pic32mz-gpio.c:124:20: warning: 'pic32mz_value' defined but not used [-Wunused-function]
 static inline bool pic32mz_value(pinset_t pinset)
                    ^
chip/pic32mx-usbdev.c:3065:1: warning: 'pic32mx_epreserved' defined but not used [-Wunused-function]
 pic32mx_epreserved(struct pic32mx_usbdev_s *priv, int epno)
 ^

mmcsd/mmcsd_spi.c: In function 'mmcsd_mediachanged':
mmcsd/mmcsd_spi.c:1938:7: warning: 'return' with a value, in function returning void
       return ret;
       ^

In file included from partition/fs_partition.c:42:0:
partition/partition.h:66:19: warning: 'read_partition_block' defined but not used [-Wunused-function]
 static inline int read_partition_block(FAR struct partition_state_s *state,
                   ^

local/local_netpoll.c: In function 'local_pollsetup':
local/local_netpoll.c:305:1: warning: label 'pollerr' defined but not used [-Wunused-label]
 pollerr:
 ^~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: If3ea8f32b878aa218072130f7c3018f0d3c1aca5
2020-04-13 12:01:39 -06:00
Nathan Hartman
34113810bd Fix nxstyle errors in previous commit. 2020-04-12 15:49:35 -06:00
Nathan Hartman
743dcd8acf Fix suspect DEBUGASSERT() like PR765
As pointed out by Şükrü Bahadır Arslan in PR765, function calls
inside DEBUGASSERT() will not be executed if DEBUGASSERT is
disabled. Following that PR, I searched for other instances of
similar errors and found four. As there are many thousands of
DEBUGASSERT in the code, this is *not* an exhaustive fix.

arch/arm/src/tms570/tms570_boot.c:
* In function arm_boot(), call tms570_memtest_complete()
  outside of the DEBUGASSERT(). Otherwise, if DEBUGASSERT is
  disabled, we will never rendezvous with completion of the
  test. (Two instances of this fix.)

arch/arm/src/tms570/tms570_clockconfig.c:
* In function tms570_clockconfig(), call
  tms570_efc_selftest_complete() outside of the DEBUGASSERT()
  for the same reason as above.

boards/arm/sam34/sam4s-xplained-pro/src/sam_boot.c:
* In function board_late_initialize(), call
  sam_watchdog_initialize() outside of the DEBUGASSERT() for
  the same reason as above.
2020-04-12 15:49:35 -06:00
Gregory Nutt
72104c182c nxstyle fixes
Run all files modified by PR 766 through nxstyle and fix any resulting complaints.

NOTE:  Numerous "Mixed case identifier" errors in arch/arm/src/cxd56xx/cxd56_gnss.c were not fixed because this problem is of much larger scope than this file.
2020-04-11 21:19:47 +01:00
Gregory Nutt
67ec3d7926 Remove CONFIG_CAN_PASS_STRUCT
This commit resolves issue #620:

Remove CONFIG_CAN_PASS_STRUCTS #620

The configuration option CONFIG_CAN_PASS_STRUCTS was added many years ago to support an old version of the SDCC compiler. That compiler is currently used only with the Z80 and Z180 targets. The limitation of that old compiler was that it could not pass structures or unions as either inputs or outputs. For example:

    #ifdef CONFIG_CAN_PASS_STRUCTS
    struct mallinfo mallinfo(void);
    #else
    int      mallinfo(FAR struct mallinfo *info);
    #endif

And even leads to violation of a few POSIX interfaces like:

    #ifdef CONFIG_CAN_PASS_STRUCTS
    int  sigqueue(int pid, int signo, union sigval value);
    #else
    int  sigqueue(int pid, int signo, FAR void *sival_ptr);
    #endif

This breaks the 1st INVIOLABLES rule:

Strict POSIX compliance
-----------------------

  o Strict conformance to the portable standard OS interface as defined at
    OpenGroup.org.
  o A deeply embedded system requires some special support.  Special
    support must be minimized.
  o The portable interface must never be compromised only for the sake of
    expediency.
  o Expediency or even improved performance are not justifications for
   violation of the strict POSIX interface

Also, it appears that the current SDCC compilers have resolve this issue and so, perhaps, this is no longer a problem: z88dk/z88dk#1132

NOTE:  This commit cannot pass the PR checks because it depends on matching changes to the apps/ directory.
2020-04-11 21:19:47 +01:00
liuhaitao
459ad99373 Use EXTRAFLAGS instead of EXTRADEFINES to be used by make via command line
So call 'make EXTRAFLAGS=-Wno-cpp' could suppress the warnings with pre-processor
directive #warning in GCC.

Change-Id: Iaa618238924c9969bf91db22117b39e6d2fc9bb6
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-04-11 08:31:08 -06:00
John Rippetoe
2f54204035 Fixed some nxstyle errors 2020-04-11 13:53:20 +08:00
John Rippetoe
acb16e087a Fixes build issues associated with ARMv7-m mpu support files.
- inline functions within mpu.h converted to macros or moved to up_mpu.c
- mpu.h and up_mpu.c are now conditionally included in build via CONFIG_ARM_MPU

Chips affected by these changes
- imxrt
- kinetis
- lpc17xx
- lpc43xx
- lpc54xx
- sam34
- stm32
- stm32f7
- stm32h7
- stm32l4
- tiva
- xmc4
2020-04-11 13:53:20 +08:00
ligd
cbf31bca5c global change: fix tools/checkpatch.sh warnnings
Change-Id: I88cfa979c44bcaf3a8f6e036c6bfccd3402ca85a
Signed-off-by: ligd <liguiding@fishsemi.com>
2020-04-09 10:29:28 -06:00
ligd
231ad202ee global change: repace sched_xfree() to kxmm_free()
Changes:
sched_xfree() => kxmm_free()
remove garbage related APIs
remove ARCH_HAVE_GARBAGE

Cause garbage feature move to mm_heap, then don't need
garbage anymore.

Change-Id: If310790a3208155ca8ab319e8d038cb6ff92c518
Signed-off-by: ligd <liguiding@fishsemi.com>
2020-04-09 10:29:28 -06:00
Alin Jerpelea
425e6c28dc
arch: xtensa: esp32: nxstyle fixes (#753)
esp32 nxstyle fixes

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-08 08:28:17 -06:00
hartmannathan
bfc153ca27
Fix typos in comments and documentation (#750)
* Fix typos in comments and documentation
2020-04-08 06:45:35 -06:00
Alin Jerpelea
402fb16a77 arch: arm: cxd56xx: nxstyle fixes
nxstyle fixes for cxd56xx

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-07 07:27:41 -06:00
Nakamura, Yuuichi
9029e4daee Fix nxstyle issues 2020-04-07 06:23:15 -06:00
Nakamura, Yuuichi
e264484c16 Remove type casting to wdentry_t (arch/) 2020-04-07 06:23:15 -06:00
Gregory Nutt
81b286d375 Fix some long single line comments.
This commit fixes some long single line comments.  This effort was primarily intended to verify the change to tools/nxstyle of PR #743 further.  This took the files changed with 1501d284c3 and ran them through nxstyle again.  The files in the commit previously passed the old nxstyle test with no complaints.  The current nxstyle, on the other hand, reported 49 long single line comments.  Each of those were verified and the file was updated.  The nxstyle change appears completely reliable.
2020-04-06 22:04:38 +01:00
Alin Jerpelea
c78bd930b5 arch: arm: sxd56xx: nxstyle fixes
Fix nxstyle complains

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-06 20:49:54 +08:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly
This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
Ouss4
a5c619c207 arch/arm/src/cxd56xx/cxd56_emmc.c: Don't wait for the semaphore if the
task was canceled.
2020-04-05 15:02:23 -06:00
Ouss4
dda47dd4a9 Check return from nxsem_wait_uninterruptible()
This commits is for the remaining files in arch/arm/src/cxd56xx
  arch/arm/src/imxrt and arch/arm/src/stm32l4
2020-04-05 12:26:45 -06:00
Gregory Nutt
5d123098b8 Check return from nxsem_wait_uninterruptible()
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution:  Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly.  This commit is for all remaining drivers in the LC823450 architectures.
2020-04-05 18:18:25 +01:00
Gregory Nutt
e19246fe94 Correct the naming of some new functions.
Serval private functions were added with a name ending with _uninterruptible.  That is not correct.  These new functions should be named _noncancelable.
2020-04-05 12:32:04 -03:00
Gregory Nutt
6a43282197 Check return from nxsem_wait_uninterruptible()
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution:  Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly.  This commit is for all remaining drivers in the Atmel SAM architectures.
2020-04-05 12:32:04 -03:00
Gregory Nutt
7837eec33f Fix style problems noted by nxstyle for this PR
NOTES:
- arch/arm/src/sama5/sam_can.c:  Generates several "Mixed case identifier" complaints because definitions provided by header files that are not part of the change.
- arch/arm/src/sama5/sam_pmecc.c:  Has two cases of "Mixed case identifies" result within commented out code.  There are references to undefined types that might be provided by Atmel logic (Pmecc and Pmerrloc) if it were ever integrated.
2020-04-05 12:32:04 -03:00
Gregory Nutt
d95d641597 Check return from nxsem_wait_uninterruptible()
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution:  Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly.  This commit is for all HCI UART drivers under arch/.
2020-04-04 23:55:45 +01:00
Ouss4
8f85a57941 Check the return of nxsem_wait_unterruptible()
This commit is for all tc drivers under arch/.
2020-04-04 16:50:20 -06:00
Ouss4
dc96287d27 Check the return of nxsem_wait_uninterruptible()
This commit is for all bbsram drivers under arch/.
2020-04-04 15:37:12 -06:00
Gregory Nutt
42790f1412 Check return from nxsem_wait_uninterruptible()
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution:  Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly.  This commit is for all I2S/SSC drivers under arch/.
2020-04-04 22:36:49 +01:00
Ouss4
d910a71981 Check the return of nxsem_wait_uninterruptible() (#724)
This commit is for all flash/progmem drivers under arch/.
2020-04-04 14:57:22 -06:00
Alan Carvalho de Assis
bcbe5646eb
Fix nxstyle stm32l4 (#726)
* Fix nxstyle to stm32l4 dma and rcc
* Fix nxstyle for usbhost, userspace, wdg, rcc, etc
* Fix nxstyle reported errors on stm32l4_usbdev.[ch]
2020-04-04 14:41:34 -06:00
Gregory Nutt
6009d213a4 samd2l1/samd5e5: Eliminate warnings.
In the sam_usb.c file for these two architectures, the USB suspend() operation is implemented, but never called from anywhere.  This logic might be valuable in the future for for now it just causes errors due to the unused static function.

This commit just disables the suspend() logic with #if 0 to eliminate the error.  The suspend logic is, however, still preserved in case it is needed in the future.
2020-04-04 20:52:08 +01:00
Gregory Nutt
1501d284c3 Check return from nxsem_wait_uninterruptible()
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution:  Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly.  This commit is for all SDIO card drivers under arch/.
2020-04-04 20:00:04 +01:00
Gregory Nutt
a6e69a82ad SDIO: Make interface field names conform to standard.
The SDIO interface structure includes fields with names like recvR1 and others.  These cause "Mixed case identifier" errors from nxstyle in all places they are uses.
This change performs a mass substition of recvR with recv_r to correct this coding standard violation.
2020-04-04 18:15:25 +01:00
Alan Carvalho de Assis
de188fbe85
Fix nxstyle to stm32l4 files (#721)
* Fix nxstyle for usbhost, userspace, wdg, rcc, dma, rcc etc
2020-04-04 09:50:33 -06:00
Alan Carvalho de Assis
460124629c Kinetis lpc sdcard (#719)
* Check return of nxsem_wait_uninterruptible
* Fix nxstyle reported errors

Note: It will not pass on CI tests because of it:

    .recvR1           = lpc17_40_recvshortcrc,
    .recvR2           = lpc17_40_recvlong,
    .recvR3           = lpc17_40_recvshort,
    .recvR4           = lpc17_40_recvnotimpl,
    .recvR5           = lpc17_40_recvnotimpl,
    .recvR6           = lpc17_40_recvshortcrc,
    .recvR7           = lpc17_40_recvshort,
2020-04-03 20:29:31 -06:00
raiden00pl
df1eeb8e3f arch/arm/src/nrf52: add initial interface to work with on-chip radio 2020-04-03 18:22:55 -06:00
Ouss4
952e7f6e17 Check the return of nxsem_wait_uninterruptible().
This commit is for the DMA files under arch/ that were missing from an
earlier PR.
2020-04-03 17:56:59 -06:00
Gregory Nutt
7dbcc71e0d Check return from nxsem_wait_uninterruptible()
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution:  Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly.  This commit is for all USB host drivers under arch/.
2020-04-03 23:45:33 +01:00
raiden00pl
8876bd8ebc arch/arm/src/stm32/stm32_pwm.c: fix nxstyle issues 2020-04-03 15:29:14 -06:00
raiden00pl
ae31b1f926 arch/arm/src/stm32/stm32_pwm.h: fix nxstyle issues 2020-04-03 15:29:14 -06:00
raiden00pl
8988251814 arch/arm/src/stm32/stm32_adc.h: fix nxstyle issues 2020-04-03 15:29:14 -06:00
Daniel Agar
4fa26d34d6 stm32f7/h7 spi add missing ret declaration 2020-04-03 15:25:49 -06:00
David Sidrane
fc3ab3e085 stm32h7:Fix DMA Overrun error 2020-04-03 10:50:25 -06:00
David Sidrane
c191787ba4 stm32h7:spi Add buffers for DMA 2020-04-03 10:50:25 -06:00
Alan Carvalho de Assis
96dc3308f4 Fix nxstyle reported errors 2020-04-03 10:45:14 -06:00
Alan Carvalho de Assis
4017dbfdd3 Check return of nxsem_wait_uninterruptible 2020-04-03 10:45:14 -06:00
Ouss4
428131efd0 arch/mips/src/pic32mz/pic32mz-ethernet.c: Fix style issues. 2020-04-03 10:42:43 -06:00
Alin Jerpelea
06910819e5 arch: arm: cxd56xx: nxstyle updates
Fix nxstyle complains

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-03 11:49:35 +01:00
Ouss4
a447ec616d Check return from nxsem_wait_uninterruptible()
This commits is for all 1wire drivers under arch/
2020-04-02 19:42:07 -06:00
Ouss4
13b229a9eb Check return from nxsem_wait_uninterruptible()
This commit is for all ADC/DAC drivers under arch/.
2020-04-02 17:37:46 -06:00
Gregory Nutt
4892c27b4a Check return from nxsem_wait_uninterruptible()
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution:  Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly.  This commit is for all SPI drivers under arch/.
2020-04-02 16:26:15 +01:00
Ouss4
4d771c2bcf Check return from nxsem_wait_uninterruptible()
This commit is for all DMA drivers under arch/.
2020-04-02 09:06:09 -06:00
Gregory Nutt
fc467021cf Check return from nxsem_wait_initialize()
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution:  Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly.  This commit is for all I2C drivers under arch/.
2020-04-02 00:46:06 +01:00
Alan Carvalho de Assis
30ca00c0a9
Check for return of nxsem_wait_uninterruptible. This commit is for files under arch/sim 2020-04-01 19:50:39 +01:00
Xiang Xiao
836fef358b
arch/arm: include chip.h in up_checkstack.c/up_initialize.c (#668) 2020-03-31 21:33:45 +01:00
YAMAMOTO Takashi
c009927deb Appease nxstyle complaints 2020-04-01 00:03:31 +08:00
YAMAMOTO Takashi
4ddb457c3e Fix a typo in comments 2020-04-01 00:03:31 +08:00
YAMAMOTO Takashi
f8f5830410 xtensa: Implement CONFIG_ARCH_IDLE_CUSTOM 2020-03-31 15:50:04 +08:00
YAMAMOTO Takashi
123b3d92df xtensa: Check XCHAL_HAVE_INTERRUPTS for waiti 2020-03-31 14:32:07 +08:00
YAMAMOTO Takashi
b9bf9c9a2b xtensa: Save PS correctly in coproc handler
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
2020-03-31 14:31:31 +08:00
YAMAMOTO Takashi
d2a6e56308 xtensa: Save PS correctly in double exception handler
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
2020-03-31 14:31:31 +08:00
YAMAMOTO Takashi
18d3fa9eea xtensa: Save PS correctly in syscall handler
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
2020-03-31 14:31:31 +08:00
YAMAMOTO Takashi
40d7f83e31 sim: Appease a few prototype warnings 2020-03-28 12:08:57 +01:00
raiden00pl
d217b3a889 arch/arm/src/nrf52: fix coding standard issues 2020-03-27 12:51:54 -06:00
raiden00pl
fef7abb598 arch/arm/src/nrf52/nrf52_i2c.c: protect the I2C transfer with a semaphore 2020-03-27 12:51:54 -06:00
YAMAMOTO Takashi
a493c92826 sim: Use executable memory for the heap
On modern environments, bss is not executable.

Alternatively we can use the ARCH_HAVE_MODULE_TEXT mechanism.
But it's considered overkill for the sim, which is mainly
for development.
2020-03-27 00:04:36 -05:00
YAMAMOTO Takashi
d6d03d64d5 sim: Hide strerror/strerror_r 2020-03-25 21:35:17 -06:00
YAMAMOTO Takashi
27aa16111c sim: hostfs: Stop assuming CONFIG_NAME_MAX=32 2020-03-25 20:31:32 -06:00
YAMAMOTO Takashi
f89ccf873e sim: host_readdir: Ensure NUL termination when truncating d_name 2020-03-25 20:31:32 -06:00
Andrey Zabolotnyi
3ff956dc00
stm32h7: support SDRAM via FMC peripherial (#459)
* stm32h7: Add support for SDRAM connected to FMC

* stm32h7: nxstyle fixes in stm32_fmc.h and stm32h7x3xx_rcc.{c,h}
2020-03-25 08:34:15 -07:00
YAMAMOTO Takashi
2991836ee8 sim: Appease nxstyle errors 2020-03-25 00:09:21 -05:00
Xiang Xiao
3f860280e5 arm/common: Fix nxstyle issue in arch/arm/src/common/up_checkstack.c
and arch/arm/src/common/up_initialize.c
2020-03-24 10:50:02 +00:00
Xiang Xiao
bc29b25983 arm/imx6: compile up_hostfs.c when CONFIG_ARM_SEMIHOSTING_HOSTFS equal true 2020-03-24 10:49:59 +00:00
Xiang Xiao
d5905d5963 arch/arm: Fix linker error: undefined reference to `g_intstackalloc'
when CONFIG_ARCH_INTERRUPTSTACK, CONFIG_SMP and CONFIG_STACK_COLORATION are true
2020-03-24 10:49:53 +00:00
YAMAMOTO Takashi
9fdda58eca sim: Hide putenv 2020-03-23 18:17:58 -06:00
YAMAMOTO Takashi
2e933102e1 sim: Hide getopt related globals
Right now this is rather theorethic as we don't actually
use getopt though.
2020-03-23 14:38:17 -05:00
YAMAMOTO Takashi
702d82d052 vpnkit: Add a config to specify the socket 2020-03-23 14:37:56 -05:00
YAMAMOTO Takashi
12a97acaed vpnkit: Make this less verbose on connection errors 2020-03-23 14:37:28 -05:00
Peter van der Perk
1848e83257 Added S32K1XX FlexTimer register definitions 2020-03-23 12:34:28 -05:00
YAMAMOTO Takashi
1ffa009c8b Revert "Don't generate .depend anymore"
This reverts commit 79af7fbf4e.

Because:

* btashton reported some issues in local builds:

  https://github.com/apache/incubator-nuttx/pull/603#issuecomment-602264860

* this might be related to the current CI breakage:

  > /bin/sh: 1: /__w/incubator-nuttx/incubator-nuttx/nuttx/tools/mkdeps: not found
2020-03-22 23:07:29 -05:00
Xiang Xiao
79af7fbf4e
Don't generate .depend anymore 2020-03-22 18:15:29 +00:00
raiden00pl
6821d0e85f arch/arm/src/xmc4/xmc4_start.c: add showprogress macro 2020-03-22 08:29:51 -06:00
raiden00pl
7135c91b0f arch/arm/include/xmc4: add irq definitions for xmc4700 and xmc4800 2020-03-22 08:29:51 -06:00
Gregory Nutt
547a3cb3d9 Run all .c and .h files in previous commits through nxstyle. 2020-03-22 08:24:07 -05:00
Gregory Nutt
7dc4ae4772 arch/: Remove support for CONFIG_FS_WRITABLE
Remove support for CONFIG_FS_WRITABLE from some MMC drivers.
2020-03-22 08:24:07 -05:00
raiden00pl
e663f8ea2e xmc4: fix some CS releted issues and remove empty files 2020-03-21 08:52:27 -05:00
aenrbes
d450f5ce77
Add support for Litex VexRiscV. 2020-03-21 06:01:56 +00:00
YAMAMOTO Takashi
9b88ecc1b2 sim: Make SIM_NETDEV_TAP depends on LINUX||WINDOWS 2020-03-21 00:23:40 -05:00
Simon Åström
88d59bac40 arch/arm/src/imxrt/imxrt_usbdev.c: Add OUT interrupt endpoint support 2020-03-20 00:26:27 -05:00
Masayuki Ishikawa
6baebcecc4 arch: esp32: Fix compile error for smp 2020-03-19 19:40:18 -06:00
YAMAMOTO Takashi
a5f8b20fcd sim: Add a netdev backed by VPNKit 2020-03-19 09:13:32 -05:00
YAMAMOTO Takashi
124c00b661 Appease nxstyle complaints in files from vpnkit 2020-03-19 09:13:32 -05:00
YAMAMOTO Takashi
cd10bd67c4 Add copyright notices to files from vpnkit 2020-03-19 09:13:32 -05:00
YAMAMOTO Takashi
4062727333 negotiate() function extracted from vpnkit
From:
    https://github.com/moby/vpnkit
    commit 2ffc1dd8a84ea7359dd09b1f4b51bb728d4f46a0
    c/vpnkit-tap-vsockd/tap-vsockd.c

With minimum changes to make it build.
2020-03-19 09:13:32 -05:00
YAMAMOTO Takashi
b748fcde0a vpnkit/protocol.c: make this compile 2020-03-19 09:13:32 -05:00
YAMAMOTO Takashi
261249cc99 vpnkit: Add a few files from vpnkit
From:
    https://github.com/moby/vpnkit
    commit 2ffc1dd8a84ea7359dd09b1f4b51bb728d4f46a0
    c/vpnkit-tap-vsockd/protocol.h
    c/vpnkit-tap-vsockd/protocol.c
2020-03-19 09:13:32 -05:00
Andrey Zabolotnyi
73b655f3b2
stm32h7_qspi: support for custom clock (not just HCLK) and support for DUAL/QUAD commands (#582)
* stm32h7_qspi: Board.h now may define the BOARD_QSPI_CLK macro to select one of
RCC_D1CCIPR_QSPISEL_{HCLK,PLL1,PLL2,PER} clocks to use with QUADSPI peripherial.
Defaults to HCLK for backward compatibility.
New macros in qspi.h: QSPICMD_IDUAL and QSPICMD_IQUAD for selecting the bit
width for instruction code (1,2 or 4 bits) of a qspi_cmdinfo_s, and
QSPIMEM_IDUAL and QSPIMEM_IQUAD for selecting the bit width of a qspi_meminfo_s.

* NX style fixes
2020-03-19 05:59:18 -07:00
David Sidrane
4e475cb630 stm32f7:spi nxstyle 2020-03-17 07:42:28 -06:00
David Sidrane
da854ccb99 stm32:spi nxstyle 2020-03-17 07:42:28 -06:00
Daniel Agar
6189b2c8bd stm32:spi Add buffers for DMA 2020-03-17 07:42:28 -06:00
David Sidrane
6f32a6ad8f stm32f7:spi Add buffers for DMA 2020-03-17 07:42:28 -06:00
Nathan Hartman
a5e643b0cd Fix typos in comments and documentation. 2020-03-16 20:01:11 -06:00
YAMAMOTO Takashi
f4e7845b85 esp32: emulate byte access for module text
Tested on ESP-EYE.
2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
855751b534 Introduce instruction memory allocator
Necessary for dlfcn etc on ESP32, which has separate memory regions
for instruction and data.

known issues/todo
 * consider something similar to dual heaps for PROTOECTED
 * consider to adapt binfmt as well
2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
03a916acb8 Kconfig: Add kconfig options for module text allocator
Enable it for ESP32.
2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
e135c938d2 xtensa: Implement a few relocations 2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
8657305883 arch/xtensa/include/elf.h: Initial version 2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
5a716b799b xtensa_user_handler: rsync after wsr.ps 2020-03-16 07:31:46 -05:00
YAMAMOTO Takashi
3b528c6010 xtensa_user_handler: Save PS correctly
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
2020-03-16 19:13:33 +09:00
YAMAMOTO Takashi
951cfbd1d5 xtensa_user_handler: Fix registers in comments 2020-03-16 05:08:43 -05:00
YAMAMOTO Takashi
7aebcc4bf6 xtensa_user_handler: Fix registers in comments 2020-03-16 02:24:16 -05:00
YAMAMOTO Takashi
23db3b2a48 ESP32: Use __asm__ __volatile__ for inline assembly 2020-03-13 19:06:15 -06:00
YAMAMOTO Takashi
3a03a307b9 arch/xtensa/src/common/xtensa_abi.h: nxstyle fixes
The remaining errors:

    Operator/assignment must be preceded with whitespace

I didn't fix them because they are in assembly code, which
nxstyle doesn't understand.
2020-03-13 18:58:04 -06:00
YAMAMOTO Takashi
086e8ffb12 arch/xtensa/src/esp32/esp32_cpustart.c: nxstyle fixes
The remaining errors:

    Mixed case identifier found

I didn't fix them because they were on ROM symbols,
which are not supposed to obey NuttX's coding style.
2020-03-13 18:51:26 -06:00
YAMAMOTO Takashi
da57a7d6aa Fix a few nxstyle complaints in arm hostfs
Unfortunately nxstyle is still not happy because it doesn't
like the following construct.  I'm not sure what to do here.

      struct
      {
        const char *pathname;
        long mode;
        size_t len;
      } open =
      {
        .pathname = pathname,
        .mode = host_flags_to_mode(flags),
        .len = strlen(pathname),
      };
2020-03-13 11:28:30 -06:00
David Sidrane
ea81924fce Revert "arch/arm/src/stm32f7/stm32_flash.c: Add flash block mapping support for progmem."
This reverts commit 29164c5706.
2020-03-13 09:31:46 -06:00
anjana-tel
737dcdbe93 Update up_usestack.c 2020-03-13 02:42:34 -05:00
Jari van Ewijk
0a2d005d8a
NXP S32K1XX peripheral clock fixes (#555)
* S32K1XX peripheral clock config. Only apply divider when it is set. + Style fixes

* S32K1XX clock names change mixed case identifiers + style fixes

* S32K1XX - Style fix 1
2020-03-12 10:18:09 -07:00
AlexanderVasiljev
265a54365b
Stm32F7: add external ram config (#529)
* Stm32F7: add external ram config
2020-03-12 08:40:01 -06:00
YAMAMOTO Takashi
9aec40744c xtensa_hostfs.c: Change the license to Apache 2.0
This file is based on arch/arm/src/common/up_hostfs.c.
The license change was ok'ed by the author. (@xiaoxiang781216)
2020-03-12 09:03:31 -05:00
YAMAMOTO Takashi
7a06ff0392 xtensa: hostfs using simcall
Tested on qemu -semihosting
2020-03-12 09:03:31 -05:00
YAMAMOTO Takashi
c18d7dc434 xtensa: Implement simcall 2020-03-12 09:03:31 -05:00
YAMAMOTO Takashi
7774cdd7aa Appease many of nxstyle errors for esp32 related files
I skipped the following files because they were not simple.
I'll create separate PRs.

    arch/xtensa/src/esp32/esp32_cpustart.c
    arch/xtensa/src/common/xtensa_abi.h
    boards/xtensa/esp32/esp32-core/include/board.h

Also, I skipped the following files and directories because
they looked too huge and/or foreign.

    arch/xtensa/include/esp32/tie.h
    arch/xtensa/include/xtensa/xtensa_corebits.h
    arch/xtensa/src/esp32/hardware/
    arch/xtensa/include/esp32/tie-asm.h
    arch/xtensa/include/esp32/core-isa.h
    arch/xtensa/include/xtensa/core.h

I also fixed a few "is is" style typos when unwrapping long lines.
2020-03-12 07:45:44 -06:00
Gregory Nutt
bfc15a6295 z20x: Fixes related to W25 boot configurations.
arch/z80/src/ez80/ez80_timerisr.c:  Correct a mismatch between the programmed reload value and the timer input clock frequency.

arch/z80/src/ez80/ez80f92.h:  Correct error in timer input clock divider:  Bits 2-3, not bits 3-4.

boards/z80/ez80/z20x/src/w25_main.c:  Correct an uninitialized return value; private function was not declard static.
2020-03-11 18:24:43 -03:00
Andrey Zabolotnyi
4e65d543d8
Add OUTTOGGLE mode to STM32H7 timer driver (#541)
* stm32h7: New timer output mode STM32_TIM_CH_OUTTOGGLE.
In this mode timer generates a square waveform on given timer channel.
The maximal waveform freq is timer clock divided by 4 (prescaler 1, period 1 results in 2 clocks '0' and 2 clocks '1').

* stm32_tim.h styling fixes.
2020-03-11 05:18:43 -07:00
Gregory Nutt
2c8d876ab8 eZ80F92: Eliminate Spurious Interrupts
arch/z80/src/ez80/ez80f92_init.asm:  Timer control register was not being cleared and, as a result, timer interrupts may have been already enabled when the CPU was started by the debugger.  This would result in spurious interrupts and Unexpected Interrupt crashes.

arch/z80/src/comming/up_initialize.c:  Fix a trivial typo.

While we are at it, change the license headers in all relevant files in the affected directories to the Apache 2.0 license.  Run all affected files through nxstyle.
2020-03-10 23:44:23 +01:00
Andrey Zabolotnyi
e5f5509054
stm32h7: Added basic support for STM32H753II. (#527)
Co-authored-by: Андрей Заболотный <zapparello@ya.ru>
2020-03-10 07:55:18 -07:00
Ouss4
a506012074 arch/arm/src/stm32/stm32_uart.h: Fix nxstyle complaints. 2020-03-10 06:53:00 -05:00
Markus Bernet
b50aa49953 stm32/stm32f7/stm32h7: Fix bugs in SERIAL_CONSOLE definition 2020-03-10 08:08:20 -03:00
YAMAMOTO Takashi
d4b0590abb Fix some nxstyle complaints in arm addrenv 2020-03-10 03:55:25 -05:00
Gregory Nutt
199b4d6852 z20x: Changes to reduce serial Rx data overrun
boards/z80/ez80/z20x:  Increase RX buffer size to 4Kb, reduce BAUD to 2400 in w25boot configuration
arch/z80/src/ez80/ez80_serial.c:  Reduce Rx FIFO trigger level for eZ80F92 to 1 so that will respond more quickly to incoming data.
2020-03-09 22:51:54 +01:00
Petro Karashchenko
3fa6baec98 spi: change spi_send() interface to support of 32-bit word transfer
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2020-03-09 08:03:35 -06:00
liuhaitao
29be471f58 sama5/serial: correct usage of USE_SERIALDRIVER and USE_EARLYSERIALINIT
Also fix the following build warning:
chip/sam_serialinit.c: In function 'sam_earlyserialinit':
chip/sam_serialinit.c:71:4: warning: implicit declaration of function 'uart_earlyserialinit'; did you mean 'sam_earlyserialinit'? [-Wimplicit-function-declaration]
   71 |    uart_earlyserialinit();
      |    ^~~~~~~~~~~~~~~~~~~~
      |    sam_earlyserialinit

Change-Id: I93adc5be739c222482b552b6e143e44c8c047794
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-03-09 08:00:56 -06:00
Gregory Nutt
4ae9ae9693 z80x: W25 Bootloader Improvements
boards/z80/ez80/z20x/src/w25_main.c:  Improve user interface.

There is still an error occurring while downloading Intex HEX files to FLASH.  That is unrelated to this and appears to be a problem libs/libc/hex2gbin/lib_hex2bin.c
2020-03-08 23:33:04 +01:00
Johanne Schock
757c37fbc9 fixed long line warnings from nxstyle 2020-03-08 08:52:46 -06:00
Johanne Schock
ac1f5d673a Fixed formatting and comments in board.h and kinetis_k28memorymap.h
Fixed clock calculation in board.h
2020-03-08 08:52:46 -06:00
Johanne Schock
050e45bfe7 Changes for Freedom K28 USB device support 2020-03-07 13:07:37 -06:00
Gregory Nutt
faca2f220e z20x: Timer/Spi Fixes
arch/z80/src/ez80/ez80_timerisr.c:  Fix an error that looks the file got damaged by a bad keystroke in the editor while a string was highlighted.
boards/z80/ez80/z20x/src/ez80_spi.c:  Fix some bad conditional compilationi. Prevented W25 chip select from being initialized.
2020-03-07 17:30:02 +01:00
Gregory Nutt
493b8de938 Revert "Change SAMA5 files to have apache license headers:"
This reverts commit f735584514.

These header changes introduce unacceptable errors:

1. The changes alter the width of the initial block comment.  That will cause nxstyle failures on most of the files.

2. The third line of the header is an (optional) short description of content of the the file.  This change erroneously removes that line.

Automated header file changes can screw up a lot of files, very quickly.
2020-03-07 08:47:48 -03:00
Gregory Nutt
78563d555a arch/z80/src/ez80/ez80_spi.c: Correct oversight in previous commit
Commit 797e45d6bf attempted to reduce the frequency of SPI reconfiguration by keeping track of the current frequency and mode settings and changing these settings only when the new settings differ from the old settings.

However, the original commit neglected to save the new frequency setting and, hence, was not effective in what it was trying to do:  Every time the SPI setfrequency() method was called, it still looked like a new frequency and the frequency was still reconfigured, even though it hadn't really changed.
2020-03-07 09:59:23 +01:00
Adam Feuer
2478d12a0a arch/arm/src/sama5/hardware/_sama5d3x_memorymap.h: Restore lines (#464)
Restore lines from bad nxstyle fixes; restore file to previous state
2020-03-06 16:51:15 -06:00
Gregory Nutt
797e45d6bf z20x: SPI and timer fixes
arch/z80/src/ez80/ez80_spi.c:  Add logic checks to eliminate unnecessary SPI reconfiguration.
arch/z80/src/ez80/ez80_timerisr.c and arch/z80/src/ez80/ez80f92.h:  Fix numerous places where configurations began with CONFIGS_ instead of CONFIG_
2020-03-06 23:28:35 +01:00
Gregory Nutt
ee9949a724 z20x: Fix some SPI/W25/Timer issues.
arch/z80/src/ez80/ez80_spi.c:  Do not configure SPI chip select pin.  It is not used by the driver and configuring it just clobbers other usage of that pin.  Add some additional debug outputs; correct some exiting debug outputs.

drivers/mtd/w25.c:  Add some debug output.

boards/z80/ez80/z20x/src/ez80_w25.c:  Correct SPI bus number used in initialization.  Only SPI1 is supported.

arch/z80/src/ez80/ez80_timerisr.c:  Some initial timer configuration fixes.
2020-03-06 21:09:14 +01:00
Juha Niskanen
9f6df9ce62 arch/arm/src/stm32l4/stm32l4_iwdg.c: Do not unconditionally enable debug
The DBGMCU_APB1_FZ bit persists over regular software resets until next POR-reset. It can impact device power consumption and things that persist over resets are a bane for FOTA updates so make it disabled by default.

OpenOCD sets this via DAP when connecting to target so enabling this from Kconfig is only useful for users of some other debug tooling.
2020-03-06 07:09:35 -06:00
Adam Feuer
f735584514 Change SAMA5 files to have apache license headers:
- No code changes
- All files are now utf-8 encoded
- Some non-utf-8 characters in comments were changed or removed
2020-03-06 10:33:08 +00:00
Masayuki Ishikawa
da3fb9c94f arch: xtensa: Call the waiti instruction in up_idle()
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-03-06 01:46:09 -06:00
patacongo
730133d84a SAMA5D27 peripheral support - USB Host working (#444)
* SAMA5D27 peripheral support - USB Host working

    - updated nsh defconfig with vfat for testing USB Host
    - sama5d2_xult: USB Host worked.
    - ported sam_bringup.c code from sama5d3-xplained
    - USB 2.0 HS now working
    - other perpherals may work, but haven't been tested

* update license headers to approve NuttX Apache-2.0
2020-03-05 18:24:11 -06:00
Gregory Nutt
859d694c78 z20x: Correct RAM wait states. 2020-03-05 17:49:58 -03:00
Gregory Nutt
de07abe632 ez80f92: Interrupt improvements.
arch/z80/: include/ez80/irq.h, src/ez80/ez80f92_*.asm:  Correct some comments related to vector address offsets.
boards/z80/ez80/z20x/scripts/z20x_loader.linkcmd:  Fix RAM offset in linker script
2020-03-05 18:54:24 +01:00
Masayuki Ishikawa
a5cb0b3731 arch: xtensa: Fix SMP related logic
NOTE: Applied the same logic as in other SMP architectures
2020-03-04 23:34:43 -06:00
liuhaitao
b27cbf6de1 arch/x86: correct typo error to fix x86 boards build break 2020-03-04 07:03:22 -06:00
Masayuki Ishikawa
e16c3ca25b arch: esp32: Fix compile error with xtensa-esp32-elf-gcc 8.2.0 2020-03-04 03:51:13 -06:00
liuhaitao
923c05f17f arch/x86_64: fix two typo errors to pass build
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-03-04 00:42:32 -06:00
Sonic Yang
b984752aec Flat address x86_64 port of Nuttx (#411)
* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer

* arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2

* arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly

* arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling

* arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure

* arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method

* arch: x86_64: Fix C alias of page table and GDT/IST

* arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup

* arch: x86_64: Consolidate MSR definition in arch/arch.h

* arch: x86_64: Edit the way of handling GDT/IST in C into structures

* arch: x86_64: Correct the starting point of isr/irq stack

* arch: x86_64: Update up_initialize.c with the new initializing procedure

* arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT

* arch: x86_64: Overhual of interrupt initialization procedure

* arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory]

* arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure

* arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug

* arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot

* arch: x86_64: Correctly apply license header, comment and format code

* arch: x86_64: properly send a SIGFPE on floating point error

* arch: x86_64: Remove unused variable in up_restore_auxstate

* arch: x86_64: properly trash the processor with an infinite loop

* arch: x86_64: Fix typo in ISR handler causing ISR not handled

* arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path

* arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE

* arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method

* board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support

* arch: x86_64: update defconfigs

* arch: x86_64: rename qemu as qemu-intel64

* arch: x86_64: update Board readme
2020-03-03 19:02:59 -06:00
GOERLITZ Otmar
9623ffaf6d arch/arm/src/stm32/hardware/stm32f30xxx_rcc.h: Correction to RCC_CFGR3 definitions 2020-03-03 17:23:50 -06:00
Gregory Nutt
2eff5a6c63 z20X: Continued development of the W25 Bootloader.
Kconfig files.  Repartition some functionality.  Bootloader support will need to be provided in logic under arch/z80/src/ez80 so the critical configuration selections were moved the Kconfig file there.

arch/z80/src/ez80/ez80_i2c.h:  Rename arch/z80/src/ez80/ez80f91_i2c.h.  It is sharable by both ez80f91 and ez80f92.

arch/z80/src/ez80/:  Add logic to perform an additional level of interrupt redirection.  This is necessary because the the interrupt handling is part of the loader FLASH-based logic.  In order to share interrupts with the program loaded into RAM by the loader, another layer or redirection is required to get control to the interrupt handlers in the loaded program.  See ez809f2_loader.asm and ez80f92_program.asm

boards/z80/ez80/z20x/scripts:  Reduce size of the interrupt re-direction buffer from 1Kb to 512b.
2020-03-03 19:39:57 -03:00
Gregory Nutt
a21120e3b6 Correct PR424 to coding standard
Run all .c files modified by PR424 through nxstyle and correct most of the complaints (many long line complaints ignored for now).  Update file headers to use Apache 2.0 license.
2020-03-03 13:59:54 -06:00
Daniel Agar
415fc17e98 stm32h7: spi_exchange (no dma) available with CONFIG_STM32H7_SPI_DMATHRESHOLD 2020-03-03 13:30:52 -06:00
Daniel Agar
a0169e4c37 stm32f7: spi_exchange (no dma) available with CONFIG_STM32F7_SPI_DMATHRESHOLD 2020-03-03 13:30:52 -06:00
Daniel Agar
0600d08d1a stm32: spi_exchange (no dma) available with CONFIG_STM32_SPI_DMATHRESHOLD 2020-03-03 13:30:52 -06:00
GAEHWILER Reto
e31f0f37f1 arch/arm/src/stm32h7/stm32_ethernet.c: Fix for network lock downs
Fix for network lock downs due to not freed buffers
2020-03-03 09:33:18 -06:00
GAEHWILER Reto
85e461c59c STM32H7/STM32F30: Typos, register correction and extension
* Correction in stm32h7x3xx_rcc
* Adding GPIO_TIM2_CH1OUT_1 to stm32f30xxx_pinmap
* Comment typo fix in drivers/mmcsd/mmcsd_spi.c
2020-03-03 09:20:58 -06:00
GAEHWILER Reto
7ffb5c11a0 arch/arm/src/stm32h7/stm32_ethernet.c: Re-organization of stm32_phy_boardinitialize
PHY has to be up and running before ethreset call
2020-03-03 09:18:02 -06:00
Juha Niskanen
f3490e42c3 Fix typos in comments 2020-03-03 09:11:57 -06:00
johannes-nivus
a7d783d463 NXP Freedom K28F Board SD-Card support (#423)
* Adds SDHC support for NXP Freedom-K28F
2020-03-03 09:06:17 -06:00
rajeshwaribhat
e671a10b2a RX65N RTC Driver added 2020-03-03 08:30:49 -06:00
Daniel Agar
30a48e4217 arm/stm32h7 add STM32H7_SPI_DMATHRESHOLD 2020-03-02 23:08:12 +01:00
Daniel Agar
c10fbbbb5f stm32f76xx77xx_dma.h fix DMAMAP_SPI2_RX_2/DMAMAP_SPI2_TX_2 2020-03-02 23:08:12 +01:00
Daniel Agar
608b59792e arm/stm32f7 add STM32F7_SPI_DMATHRESHOLD 2020-03-02 23:08:12 +01:00
Daniel Agar
afb2248b7a arm/stm32 add STM32_SPI_DMATHRESHOLD 2020-03-02 23:08:12 +01:00
Augusto Fraga Giachero
0be87af99d arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Cancel timeout on i2c stop
Not canceling the I2C timeout watch dog immediately after finishing
all I2C transactions in interrupt context can lead to a race condition
due to nxsem_wait(&priv->wait) in lpc17_40_i2c_start() not resuming
execution fast enough (this can be easily triggered if another task /
thread is using a lot of cpu time).

Falling to cancel the watchdog up to time will cause the priv->wait
semaphore to be incremented twice (first by lpc17_40_i2c_stop() then
by lpc17_40_i2c_timeout()), so all I2C transactions after that will
return immediately and priv->msgs will hold pointers to memory it
doesn't own anymore.

Canceling the priv->timeout watch dog in lpc17_40_i2c_stop() prevents
this as it is executed from the I2C interrupt handler.

arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Fix timeout calculation

For each byte received / transmitted, an acknowledge bit is also
transmitted / received, requiring effectively 9 bits for each byte.
2020-03-02 22:14:05 +01:00
Gregory Nutt
e814977c0f boards/z80/ez80/z20x/: Add W25 bootloader
The SD boot loader was not satisfactory because 1) the SD slot is on an optional board and, hence, cannot be part of a fundamental solution.  And 2) it is too big.

The only storage on borard is the Winbond W25 SPI-bsed FLASH.  This commit adds support for a bootload to 1) read code in HEX format from a serial port and write it to the W25 FLASH, or 2) read code in binary form from the W25 FLASH into SRAM and execute the loaded program.

boards/z80/ez80/z20x/configs:  Added w25boot configuration
boards/z80/ez80/z20x/src:  Add bootloader logic, w25_main.c.  Add logic to manage shared SRAM memory map so that the loaded program does not clobber the bootloader memory.  Add logic to recover the bootloader memory into the heap after the loaded program as started.
boards/z80/ez80/z20x/scripts:  Rework scripts and configuration to support a bootloader and program build.  The boolloader cannot use all of SRAM; the program must not clobber the SRAM region used by the bootloader.
2020-03-02 14:05:09 -03:00
David Sidrane
fd3148dba6
imxrt: Adds the ability to run from OCRAM (#407)
* imxrt: GPIO make tables const
* imxrt: Call out to board to set up FlexRAM
* imxrt: Add Knob for adding the ROM bootloaders 40Kib of RAM to heap
* imxrt: imxrt1060-evk:Add the ability to run from OCRAM
2020-03-01 06:05:42 -06:00